iPXE
Macros | Functions | Variables
tg3.c File Reference
#include <mii.h>
#include <stdio.h>
#include <errno.h>
#include <unistd.h>
#include <byteswap.h>
#include <ipxe/pci.h>
#include <ipxe/iobuf.h>
#include <ipxe/timer.h>
#include <ipxe/malloc.h>
#include <ipxe/if_ether.h>
#include <ipxe/ethernet.h>
#include <ipxe/netdevice.h>
#include "tg3.h"

Go to the source code of this file.

Macros

#define TG3_DEF_RX_MODE   0
 
#define TG3_DEF_TX_MODE   0
 
#define TG3_TX_RING_BYTES
 
#define TG3_RX_RCB_RING_BYTES(tp)   (sizeof(struct tg3_rx_buffer_desc) * (TG3_RX_RET_MAX_SIZE_5705))
 
#define TG3_RX_STD_RING_BYTES(tp)   (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)
 
#define TG3_RX_STD_BUFF_RING_BYTES(tp)   (sizeof(struct ring_info) * TG3_RX_STD_MAX_SIZE_5700)
 
#define TG3_RX_STD_RING_BYTES(tp)   (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)
 
#define NEXT_TX(N)   (((N) + 1) & (TG3_TX_RING_SIZE - 1))
 
#define TG3_RX_STD_BUFF_RING_BYTES(tp)   (sizeof(struct ring_info) * TG3_RX_STD_MAX_SIZE_5700)
 
#define TG3_RX_STD_RING_BYTES(tp)   (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)
 
#define TEST_BUFFER_SIZE   0x2000
 

Functions

 FILE_LICENCE (GPL2_ONLY)
 
static void tg3_refill_prod_ring (struct tg3 *tp)
 
void tg3_rx_prodring_fini (struct tg3_rx_prodring_set *tpr)
 
static void tg3_free_consistent (struct tg3 *tp)
 
int tg3_alloc_consistent (struct tg3 *tp)
 
static int tg3_rx_prodring_alloc (struct tg3 __unused *tp, struct tg3_rx_prodring_set *tpr)
 
static void tg3_rx_iob_free (struct io_buffer *iobs[], int i)
 
static void tg3_rx_prodring_free (struct tg3_rx_prodring_set *tpr)
 
int tg3_init_rings (struct tg3 *tp)
 
static int tg3_open (struct net_device *dev)
 
static u32 tg3_tx_avail (struct tg3 *tp)
 
static int tg3_transmit (struct net_device *dev, struct io_buffer *iob)
 
static void tg3_tx_complete (struct net_device *dev)
 
static int tg3_alloc_rx_iob (struct tg3_rx_prodring_set *tpr, u32 dest_idx_unmasked)
 
static void tg3_rx_complete (struct net_device *dev)
 
static void tg3_poll (struct net_device *dev)
 
static void tg3_close (struct net_device *dev)
 
static void tg3_irq (struct net_device *dev, int enable)
 
int tg3_do_test_dma (struct tg3 *tp, u32 __unused *buf, dma_addr_t buf_dma, int size, int to_device)
 
void tg3_read_mem (struct tg3 *tp, u32 off, u32 *val)
 
static int tg3_test_dma (struct tg3 *tp)
 
static int tg3_init_one (struct pci_device *pdev)
 
static void tg3_remove_one (struct pci_device *pci)
 

Variables

static struct net_device_operations tg3_netdev_ops
 
static struct pci_device_id tg3_nics []
 
struct pci_driver tg3_pci_driver __pci_driver
 

Macro Definition Documentation

◆ TG3_DEF_RX_MODE

#define TG3_DEF_RX_MODE   0

Definition at line 19 of file tg3.c.

◆ TG3_DEF_TX_MODE

#define TG3_DEF_TX_MODE   0

Definition at line 20 of file tg3.c.

◆ TG3_TX_RING_BYTES

#define TG3_TX_RING_BYTES
Value:
(sizeof(struct tg3_tx_buffer_desc) * \
TG3_TX_RING_SIZE)

Definition at line 31 of file tg3.c.

◆ TG3_RX_RCB_RING_BYTES

#define TG3_RX_RCB_RING_BYTES (   tp)    (sizeof(struct tg3_rx_buffer_desc) * (TG3_RX_RET_MAX_SIZE_5705))

Definition at line 35 of file tg3.c.

◆ TG3_RX_STD_RING_BYTES [1/3]

#define TG3_RX_STD_RING_BYTES (   tp)    (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)

Definition at line 354 of file tg3.c.

◆ TG3_RX_STD_BUFF_RING_BYTES [1/2]

#define TG3_RX_STD_BUFF_RING_BYTES (   tp)    (sizeof(struct ring_info) * TG3_RX_STD_MAX_SIZE_5700)

Definition at line 352 of file tg3.c.

◆ TG3_RX_STD_RING_BYTES [2/3]

#define TG3_RX_STD_RING_BYTES (   tp)    (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)

Definition at line 354 of file tg3.c.

◆ NEXT_TX

#define NEXT_TX (   N)    (((N) + 1) & (TG3_TX_RING_SIZE - 1))

Definition at line 294 of file tg3.c.

◆ TG3_RX_STD_BUFF_RING_BYTES [2/2]

#define TG3_RX_STD_BUFF_RING_BYTES (   tp)    (sizeof(struct ring_info) * TG3_RX_STD_MAX_SIZE_5700)

Definition at line 352 of file tg3.c.

◆ TG3_RX_STD_RING_BYTES [3/3]

#define TG3_RX_STD_RING_BYTES (   tp)    (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)

Definition at line 354 of file tg3.c.

◆ TEST_BUFFER_SIZE

#define TEST_BUFFER_SIZE   0x2000

Definition at line 532 of file tg3.c.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_ONLY  )

◆ tg3_refill_prod_ring()

static void tg3_refill_prod_ring ( struct tg3 tp)
static

Definition at line 400 of file tg3.c.

401 { DBGP("%s\n", __func__);
402 
403  struct tg3_rx_prodring_set *tpr = &tp->prodring;
404  int idx = tpr->rx_std_prod_idx;
405 
406  DBGCP(tp->dev, "%s\n", __func__);
407 
408  while (tpr->rx_std_iob_cnt < TG3_DEF_RX_RING_PENDING) {
409  if (tpr->rx_iobufs[idx % TG3_DEF_RX_RING_PENDING] == NULL) {
410  if (tg3_alloc_rx_iob(tpr, idx) < 0) {
411  DBGC(tp->dev, "alloc_iob() failed for descriptor %d\n", idx);
412  break;
413  }
414  DBGC2(tp->dev, "allocated iob_buffer for descriptor %d\n", idx);
415  }
416 
417  idx = (idx + 1) % TG3_RX_STD_MAX_SIZE_5700;
418  tpr->rx_std_iob_cnt++;
419  }
420 
421  if ((u32)idx != tpr->rx_std_prod_idx) {
422  tpr->rx_std_prod_idx = idx;
424  }
425 }
u32 rx_std_iob_cnt
Definition: tg3.h:2954
#define DBGC(...)
Definition: compiler.h:505
#define TG3_RX_STD_MAX_SIZE_5700
Definition: tg3.h:173
#define tw32_rx_mbox(reg, val)
Definition: tg3.h:3337
#define DBGP(...)
Definition: compiler.h:532
static struct tulip_private * tp
Definition: tulip.c:441
#define TG3_DEF_RX_RING_PENDING
Definition: tg3.h:2949
static int tg3_alloc_rx_iob(struct tg3_rx_prodring_set *tpr, u32 dest_idx_unmasked)
Definition: tg3.c:368
#define TG3_RX_STD_PROD_IDX_REG
Definition: tg3.h:445
#define DBGC2(...)
Definition: compiler.h:522
u32 rx_std_prod_idx
Definition: tg3.h:2952
#define DBGCP(...)
Definition: compiler.h:539
struct io_buffer * rx_iobufs[TG3_DEF_RX_RING_PENDING]
Definition: tg3.h:2956
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
uint32_t u32
Definition: stdint.h:23

References DBGC, DBGC2, DBGCP, DBGP, NULL, tg3_rx_prodring_set::rx_iobufs, tg3_rx_prodring_set::rx_std_iob_cnt, tg3_rx_prodring_set::rx_std_prod_idx, tg3_alloc_rx_iob(), TG3_DEF_RX_RING_PENDING, TG3_RX_STD_MAX_SIZE_5700, TG3_RX_STD_PROD_IDX_REG, tp, and tw32_rx_mbox.

Referenced by tg3_open(), and tg3_rx_complete().

◆ tg3_rx_prodring_fini()

void tg3_rx_prodring_fini ( struct tg3_rx_prodring_set tpr)

Definition at line 41 of file tg3.c.

42 { DBGP("%s\n", __func__);
43 
44  if (tpr->rx_std) {
46  tpr->rx_std = NULL;
47  }
48 }
#define DBGP(...)
Definition: compiler.h:532
#define TG3_RX_STD_RING_BYTES(tp)
Definition: tg3.c:354
static struct tulip_private * tp
Definition: tulip.c:441
struct tg3_rx_buffer_desc * rx_std
Definition: tg3.h:2955
static void free_dma(void *ptr, size_t size)
Free memory allocated with malloc_dma()
Definition: malloc.h:81
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362

References DBGP, free_dma(), NULL, tg3_rx_prodring_set::rx_std, TG3_RX_STD_RING_BYTES, and tp.

Referenced by tg3_free_consistent().

◆ tg3_free_consistent()

static void tg3_free_consistent ( struct tg3 tp)
static

Definition at line 54 of file tg3.c.

55 { DBGP("%s\n", __func__);
56 
57  if (tp->tx_ring) {
58  free_dma(tp->tx_ring, TG3_TX_RING_BYTES);
59  tp->tx_ring = NULL;
60  }
61 
62  free(tp->tx_buffers);
63  tp->tx_buffers = NULL;
64 
65  if (tp->rx_rcb) {
67  tp->rx_rcb_mapping = 0;
68  tp->rx_rcb = NULL;
69  }
70 
71  tg3_rx_prodring_fini(&tp->prodring);
72 
73  if (tp->hw_status) {
74  free_dma(tp->hw_status, TG3_HW_STATUS_SIZE);
75  tp->status_mapping = 0;
76  tp->hw_status = NULL;
77  }
78 }
void tg3_rx_prodring_fini(struct tg3_rx_prodring_set *tpr)
Definition: tg3.c:41
#define DBGP(...)
Definition: compiler.h:532
static struct tulip_private * tp
Definition: tulip.c:441
static void(* free)(struct refcnt *refcnt))
Definition: refcnt.h:54
#define TG3_HW_STATUS_SIZE
Definition: tg3.h:2669
#define TG3_TX_RING_BYTES
Definition: tg3.c:31
#define TG3_RX_RCB_RING_BYTES(tp)
Definition: tg3.c:35
static void free_dma(void *ptr, size_t size)
Free memory allocated with malloc_dma()
Definition: malloc.h:81
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362

References DBGP, free, free_dma(), NULL, TG3_HW_STATUS_SIZE, tg3_rx_prodring_fini(), TG3_RX_RCB_RING_BYTES, TG3_TX_RING_BYTES, and tp.

Referenced by tg3_alloc_consistent(), and tg3_close().

◆ tg3_alloc_consistent()

int tg3_alloc_consistent ( struct tg3 tp)

Definition at line 84 of file tg3.c.

85 { DBGP("%s\n", __func__);
86 
87  struct tg3_hw_status *sblk;
88  struct tg3_rx_prodring_set *tpr = &tp->prodring;
89 
91  if (!tp->hw_status) {
92  DBGC(tp->dev, "hw_status alloc failed\n");
93  goto err_out;
94  }
95  tp->status_mapping = virt_to_bus(tp->hw_status);
96 
97  memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
98  sblk = tp->hw_status;
99 
101  if (!tpr->rx_std) {
102  DBGC(tp->dev, "rx prodring alloc failed\n");
103  goto err_out;
104  }
105  tpr->rx_std_mapping = virt_to_bus(tpr->rx_std);
107 
108  tp->tx_buffers = zalloc(sizeof(struct ring_info) * TG3_TX_RING_SIZE);
109  if (!tp->tx_buffers)
110  goto err_out;
111 
113  if (!tp->tx_ring)
114  goto err_out;
115  tp->tx_desc_mapping = virt_to_bus(tp->tx_ring);
116 
117  /*
118  * When RSS is enabled, the status block format changes
119  * slightly. The "rx_jumbo_consumer", "reserved",
120  * and "rx_mini_consumer" members get mapped to the
121  * other three rx return ring producer indexes.
122  */
123 
124  tp->rx_rcb_prod_idx = &sblk->idx[0].rx_producer;
125 
127  if (!tp->rx_rcb)
128  goto err_out;
129  tp->rx_rcb_mapping = virt_to_bus(tp->rx_rcb);
130 
131  memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
132 
133  return 0;
134 
135 err_out:
137  return -ENOMEM;
138 }
#define TG3_DMA_ALIGNMENT
Definition: tg3.h:3313
#define DBGC(...)
Definition: compiler.h:505
static void tg3_free_consistent(struct tg3 *tp)
Definition: tg3.c:54
struct tg3_hw_status::@337 idx[16]
#define ENOMEM
Not enough space.
Definition: errno.h:534
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define DBGP(...)
Definition: compiler.h:532
#define TG3_RX_STD_RING_BYTES(tp)
Definition: tg3.c:354
u16 rx_producer
Definition: tg3.h:2696
static struct tulip_private * tp
Definition: tulip.c:441
void * zalloc(size_t size)
Allocate cleared memory.
Definition: malloc.c:624
#define TG3_HW_STATUS_SIZE
Definition: tg3.h:2669
#define TG3_TX_RING_BYTES
Definition: tg3.c:31
#define TG3_RX_RCB_RING_BYTES(tp)
Definition: tg3.c:35
dma_addr_t rx_std_mapping
Definition: tg3.h:2957
static void *__malloc malloc_dma(size_t size, size_t phys_align)
Allocate memory for DMA.
Definition: malloc.h:66
struct tg3_rx_buffer_desc * rx_std
Definition: tg3.h:2955
#define TG3_TX_RING_SIZE
Definition: tg3.h:3310
void * memset(void *dest, int character, size_t len) __nonnull

References DBGC, DBGP, ENOMEM, tg3_hw_status::idx, malloc_dma(), memset(), tg3_hw_status::rx_producer, tg3_rx_prodring_set::rx_std, tg3_rx_prodring_set::rx_std_mapping, TG3_DMA_ALIGNMENT, tg3_free_consistent(), TG3_HW_STATUS_SIZE, TG3_RX_RCB_RING_BYTES, TG3_RX_STD_RING_BYTES, TG3_TX_RING_BYTES, TG3_TX_RING_SIZE, tp, virt_to_bus(), and zalloc().

Referenced by tg3_open().

◆ tg3_rx_prodring_alloc()

static int tg3_rx_prodring_alloc ( struct tg3 __unused tp,
struct tg3_rx_prodring_set tpr 
)
static

Definition at line 151 of file tg3.c.

153 { DBGP("%s\n", __func__);
154 
155  u32 i;
156 
157  tpr->rx_std_cons_idx = 0;
158  tpr->rx_std_prod_idx = 0;
159 
160  /* Initialize invariants of the rings, we only set this
161  * stuff once. This works because the card does not
162  * write into the rx buffer posting rings.
163  */
164  /* FIXME: does TG3_RX_STD_MAX_SIZE_5700 work on all cards? */
165  for (i = 0; i < TG3_RX_STD_MAX_SIZE_5700; i++) {
166  struct tg3_rx_buffer_desc *rxd;
167 
168  rxd = &tpr->rx_std[i];
169  rxd->idx_len = (TG3_RX_STD_DMA_SZ - 64 - 2) << RXD_LEN_SHIFT;
170  rxd->type_flags = (RXD_FLAG_END << RXD_FLAGS_SHIFT);
171  rxd->opaque = (RXD_OPAQUE_RING_STD |
172  (i << RXD_OPAQUE_INDEX_SHIFT));
173  }
174 
175  return 0;
176 }
#define TG3_RX_STD_MAX_SIZE_5700
Definition: tg3.h:173
#define TG3_RX_STD_DMA_SZ
Definition: tg3.h:3315
#define DBGP(...)
Definition: compiler.h:532
u32 rx_std_cons_idx
Definition: tg3.h:2953
#define RXD_LEN_SHIFT
Definition: tg3.h:2591
#define RXD_OPAQUE_RING_STD
Definition: tg3.h:2631
#define RXD_OPAQUE_INDEX_SHIFT
Definition: tg3.h:2630
#define RXD_FLAG_END
Definition: tg3.h:2597
u32 rx_std_prod_idx
Definition: tg3.h:2952
struct tg3_rx_buffer_desc * rx_std
Definition: tg3.h:2955
#define RXD_FLAGS_SHIFT
Definition: tg3.h:2595
uint32_t u32
Definition: stdint.h:23
#define rxd
Definition: davicom.c:145

References DBGP, tg3_rx_prodring_set::rx_std, tg3_rx_prodring_set::rx_std_cons_idx, tg3_rx_prodring_set::rx_std_prod_idx, rxd, RXD_FLAG_END, RXD_FLAGS_SHIFT, RXD_LEN_SHIFT, RXD_OPAQUE_INDEX_SHIFT, RXD_OPAQUE_RING_STD, TG3_RX_STD_DMA_SZ, and TG3_RX_STD_MAX_SIZE_5700.

Referenced by tg3_init_rings().

◆ tg3_rx_iob_free()

static void tg3_rx_iob_free ( struct io_buffer iobs[],
int  i 
)
static

Definition at line 178 of file tg3.c.

179 { DBGP("%s\n", __func__);
180 
181  if (iobs[i] == NULL)
182  return;
183 
184  free_iob(iobs[i]);
185  iobs[i] = NULL;
186 }
void free_iob(struct io_buffer *iobuf)
Free I/O buffer.
Definition: iobuf.c:145
#define DBGP(...)
Definition: compiler.h:532
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362

References DBGP, free_iob(), and NULL.

Referenced by tg3_rx_prodring_free().

◆ tg3_rx_prodring_free()

static void tg3_rx_prodring_free ( struct tg3_rx_prodring_set tpr)
static

Definition at line 188 of file tg3.c.

189 { DBGP("%s\n", __func__);
190 
191  unsigned int i;
192 
193  for (i = 0; i < TG3_DEF_RX_RING_PENDING; i++)
194  tg3_rx_iob_free(tpr->rx_iobufs, i);
195 }
static void tg3_rx_iob_free(struct io_buffer *iobs[], int i)
Definition: tg3.c:178
#define DBGP(...)
Definition: compiler.h:532
#define TG3_DEF_RX_RING_PENDING
Definition: tg3.h:2949
struct io_buffer * rx_iobufs[TG3_DEF_RX_RING_PENDING]
Definition: tg3.h:2956

References DBGP, tg3_rx_prodring_set::rx_iobufs, TG3_DEF_RX_RING_PENDING, and tg3_rx_iob_free().

Referenced by tg3_close(), and tg3_init_rings().

◆ tg3_init_rings()

int tg3_init_rings ( struct tg3 tp)

tg3_free_rings(tp);

Definition at line 203 of file tg3.c.

204 { DBGP("%s\n", __func__);
205 
206  /* Free up all the SKBs. */
207 /// tg3_free_rings(tp);
208 
209  tp->last_tag = 0;
210  tp->last_irq_tag = 0;
211  tp->hw_status->status = 0;
212  tp->hw_status->status_tag = 0;
213  memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
214 
215  tp->tx_prod = 0;
216  tp->tx_cons = 0;
217  if (tp->tx_ring)
218  memset(tp->tx_ring, 0, TG3_TX_RING_BYTES);
219 
220  tp->rx_rcb_ptr = 0;
221  if (tp->rx_rcb)
222  memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
223 
224  if (tg3_rx_prodring_alloc(tp, &tp->prodring)) {
225  DBGC(tp->dev, "tg3_rx_prodring_alloc() failed\n");
226  tg3_rx_prodring_free(&tp->prodring);
227  return -ENOMEM;
228  }
229 
230  return 0;
231 }
static void tg3_rx_prodring_free(struct tg3_rx_prodring_set *tpr)
Definition: tg3.c:188
#define DBGC(...)
Definition: compiler.h:505
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define DBGP(...)
Definition: compiler.h:532
static struct tulip_private * tp
Definition: tulip.c:441
#define TG3_HW_STATUS_SIZE
Definition: tg3.h:2669
#define TG3_TX_RING_BYTES
Definition: tg3.c:31
#define TG3_RX_RCB_RING_BYTES(tp)
Definition: tg3.c:35
static int tg3_rx_prodring_alloc(struct tg3 __unused *tp, struct tg3_rx_prodring_set *tpr)
Definition: tg3.c:151
void * memset(void *dest, int character, size_t len) __nonnull

References DBGC, DBGP, ENOMEM, memset(), TG3_HW_STATUS_SIZE, tg3_rx_prodring_alloc(), tg3_rx_prodring_free(), TG3_RX_RCB_RING_BYTES, TG3_TX_RING_BYTES, and tp.

Referenced by tg3_reset_hw().

◆ tg3_open()

static int tg3_open ( struct net_device dev)
static

Definition at line 233 of file tg3.c.

234 { DBGP("%s\n", __func__);
235 
236  struct tg3 *tp = netdev_priv(dev);
237  struct tg3_rx_prodring_set *tpr = &tp->prodring;
238  int err = 0;
239 
241 
242  /* Initialize MAC address and backoff seed. */
244 
245  err = tg3_alloc_consistent(tp);
246  if (err)
247  return err;
248 
249  tpr->rx_std_iob_cnt = 0;
250 
251  err = tg3_init_hw(tp, 1);
252  if (err != 0)
253  DBGC(tp->dev, "tg3_init_hw failed: %s\n", strerror(err));
254  else
256 
257  return err;
258 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
Definition: tg3.h:3047
struct net_device * dev
Definition: tg3.h:3091
u32 rx_std_iob_cnt
Definition: tg3.h:2954
#define DBGC(...)
Definition: compiler.h:505
#define DBGP(...)
Definition: compiler.h:532
void tg3_set_power_state_0(struct tg3 *tp)
Definition: tg3_hw.c:129
static void tg3_refill_prod_ring(struct tg3 *tp)
Definition: tg3.c:400
static struct tulip_private * tp
Definition: tulip.c:441
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
void __tg3_set_mac_addr(struct tg3 *tp, int skip_mac_1)
Definition: tg3_hw.c:1093
int tg3_init_hw(struct tg3 *tp, int reset_phy)
Definition: tg3_hw.c:2572
int tg3_alloc_consistent(struct tg3 *tp)
Definition: tg3.c:84

References __tg3_set_mac_addr(), DBGC, DBGP, tg3::dev, netdev_priv(), tg3_rx_prodring_set::rx_std_iob_cnt, strerror(), tg3_alloc_consistent(), tg3_init_hw(), tg3_refill_prod_ring(), tg3_set_power_state_0(), and tp.

◆ tg3_tx_avail()

static u32 tg3_tx_avail ( struct tg3 tp)
inlinestatic

Definition at line 260 of file tg3.c.

261 { DBGP("%s\n", __func__);
262 
263  /* Tell compiler to fetch tx indices from memory. */
264  barrier();
265  return TG3_DEF_TX_RING_PENDING -
266  ((tp->tx_prod - tp->tx_cons) & (TG3_TX_RING_SIZE - 1));
267 }
#define DBGP(...)
Definition: compiler.h:532
#define TG3_DEF_TX_RING_PENDING
Definition: tg3.h:3311
static struct tulip_private * tp
Definition: tulip.c:441
#define barrier()
Optimisation barrier.
Definition: compiler.h:655
#define TG3_TX_RING_SIZE
Definition: tg3.h:3310

References barrier, DBGP, TG3_DEF_TX_RING_PENDING, TG3_TX_RING_SIZE, and tp.

Referenced by tg3_transmit().

◆ tg3_transmit()

static int tg3_transmit ( struct net_device dev,
struct io_buffer iob 
)
static

Definition at line 299 of file tg3.c.

300 { DBGP("%s\n", __func__);
301 
302  struct tg3 *tp = netdev_priv(dev);
303  u32 len, entry;
304  dma_addr_t mapping;
305 
306  if (tg3_tx_avail(tp) < 1) {
307  DBGC(dev, "Transmit ring full\n");
308  return -ENOBUFS;
309  }
310 
311  entry = tp->tx_prod;
312 
313  iob_pad(iob, ETH_ZLEN);
314  mapping = virt_to_bus(iob->data);
315  len = iob_len(iob);
316 
317  tp->tx_buffers[entry].iob = iob;
318 
319  tg3_set_txd(tp, entry, mapping, len, TXD_FLAG_END);
320 
321  entry = NEXT_TX(entry);
322 
323  /* Packets are ready, update Tx producer idx local and on card. */
324  tw32_tx_mbox(tp->prodmbox, entry);
325 
326  tp->tx_prod = entry;
327 
328  mb();
329 
330  return 0;
331 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
Definition: tg3.h:3047
#define NEXT_TX(N)
Definition: tg3.c:294
struct net_device * dev
Definition: tg3.h:3091
static u32 tg3_tx_avail(struct tg3 *tp)
Definition: tg3.c:260
#define DBGC(...)
Definition: compiler.h:505
unsigned long dma_addr_t
Definition: bnx2.h:20
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define DBGP(...)
Definition: compiler.h:532
static struct tulip_private * tp
Definition: tulip.c:441
union aes_table_entry entry[256]
Table entries, indexed by S(N)
Definition: aes.c:26
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:151
#define ETH_ZLEN
Definition: if_ether.h:10
#define TXD_FLAG_END
Definition: tg3.h:2560
void tg3_set_txd(struct tg3 *tp, int entry, dma_addr_t mapping, int len, u32 flags)
Definition: tg3_hw.c:2582
uint32_t len
Length.
Definition: ena.h:14
#define ENOBUFS
No buffer space available.
Definition: errno.h:498
void * data
Start of data.
Definition: iobuf.h:44
void mb(void)
Memory barrier.
void iob_pad(struct io_buffer *iobuf, size_t min_len)
Pad I/O buffer.
Definition: iobpad.c:49
uint32_t u32
Definition: stdint.h:23
#define tw32_tx_mbox(reg, val)
Definition: tg3.h:3336

References io_buffer::data, DBGC, DBGP, tg3::dev, ENOBUFS, entry, ETH_ZLEN, iob_len(), iob_pad(), len, mb(), netdev_priv(), NEXT_TX, tg3_set_txd(), tg3_tx_avail(), tp, tw32_tx_mbox, TXD_FLAG_END, and virt_to_bus().

◆ tg3_tx_complete()

static void tg3_tx_complete ( struct net_device dev)
static

Definition at line 333 of file tg3.c.

334 { DBGP("%s\n", __func__);
335 
336  struct tg3 *tp = netdev_priv(dev);
337  u32 hw_idx = tp->hw_status->idx[0].tx_consumer;
338  u32 sw_idx = tp->tx_cons;
339 
340  while (sw_idx != hw_idx) {
341  struct io_buffer *iob = tp->tx_buffers[sw_idx].iob;
342 
343  DBGC2(dev, "Transmitted packet: %zd bytes\n", iob_len(iob));
344 
345  netdev_tx_complete(dev, iob);
346  sw_idx = NEXT_TX(sw_idx);
347  }
348 
349  tp->tx_cons = sw_idx;
350 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
Definition: tg3.h:3047
static void netdev_tx_complete(struct net_device *netdev, struct io_buffer *iobuf)
Complete network transmission.
Definition: netdevice.h:746
#define NEXT_TX(N)
Definition: tg3.c:294
struct net_device * dev
Definition: tg3.h:3091
#define DBGP(...)
Definition: compiler.h:532
static struct tulip_private * tp
Definition: tulip.c:441
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:151
#define DBGC2(...)
Definition: compiler.h:522
uint32_t u32
Definition: stdint.h:23
A persistent I/O buffer.
Definition: iobuf.h:32

References DBGC2, DBGP, tg3::dev, iob_len(), netdev_priv(), netdev_tx_complete(), NEXT_TX, and tp.

Referenced by tg3_poll().

◆ tg3_alloc_rx_iob()

static int tg3_alloc_rx_iob ( struct tg3_rx_prodring_set tpr,
u32  dest_idx_unmasked 
)
static

Definition at line 368 of file tg3.c.

369 { DBGP("%s\n", __func__);
370 
371  struct tg3_rx_buffer_desc *desc;
372  struct io_buffer *iob;
373  dma_addr_t mapping;
374  int dest_idx, iob_idx;
375 
376  dest_idx = dest_idx_unmasked & (TG3_RX_STD_MAX_SIZE_5700 - 1);
377  desc = &tpr->rx_std[dest_idx];
378 
379  /* Do not overwrite any of the map or rp information
380  * until we are sure we can commit to a new buffer.
381  *
382  * Callers depend upon this behavior and assume that
383  * we leave everything unchanged if we fail.
384  */
386  if (iob == NULL)
387  return -ENOMEM;
388 
389  iob_idx = dest_idx % TG3_DEF_RX_RING_PENDING;
390  tpr->rx_iobufs[iob_idx] = iob;
391 
392  mapping = virt_to_bus(iob->data);
393 
394  desc->addr_hi = ((u64)mapping >> 32);
395  desc->addr_lo = ((u64)mapping & 0xffffffff);
396 
397  return 0;
398 }
unsigned long dma_addr_t
Definition: bnx2.h:20
#define TG3_RX_STD_MAX_SIZE_5700
Definition: tg3.h:173
#define TG3_RX_STD_DMA_SZ
Definition: tg3.h:3315
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:128
#define ENOMEM
Not enough space.
Definition: errno.h:534
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define DBGP(...)
Definition: compiler.h:532
uint64_t u64
Definition: stdint.h:25
#define TG3_DEF_RX_RING_PENDING
Definition: tg3.h:2949
void * data
Start of data.
Definition: iobuf.h:44
struct io_buffer * rx_iobufs[TG3_DEF_RX_RING_PENDING]
Definition: tg3.h:2956
struct tg3_rx_buffer_desc * rx_std
Definition: tg3.h:2955
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
A persistent I/O buffer.
Definition: iobuf.h:32

References alloc_iob(), io_buffer::data, DBGP, ENOMEM, NULL, tg3_rx_prodring_set::rx_iobufs, tg3_rx_prodring_set::rx_std, TG3_DEF_RX_RING_PENDING, TG3_RX_STD_DMA_SZ, TG3_RX_STD_MAX_SIZE_5700, and virt_to_bus().

Referenced by tg3_refill_prod_ring().

◆ tg3_rx_complete()

static void tg3_rx_complete ( struct net_device dev)
static

Definition at line 427 of file tg3.c.

428 { DBGP("%s\n", __func__);
429 
430  struct tg3 *tp = netdev_priv(dev);
431 
432  u32 sw_idx = tp->rx_rcb_ptr;
433  u16 hw_idx;
434  struct tg3_rx_prodring_set *tpr = &tp->prodring;
435 
436  hw_idx = *(tp->rx_rcb_prod_idx);
437 
438  while (sw_idx != hw_idx) {
439  struct tg3_rx_buffer_desc *desc = &tp->rx_rcb[sw_idx];
440  u32 desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
441  int iob_idx = desc_idx % TG3_DEF_RX_RING_PENDING;
442  struct io_buffer *iob = tpr->rx_iobufs[iob_idx];
443  unsigned int len;
444 
445  DBGC2(dev, "RX - desc_idx: %d sw_idx: %d hw_idx: %d\n", desc_idx, sw_idx, hw_idx);
446 
447  assert(iob != NULL);
448 
449  if ((desc->err_vlan & RXD_ERR_MASK) != 0 &&
451  /* drop packet */
452  DBGC(dev, "Corrupted packet received\n");
453  netdev_rx_err(dev, iob, -EINVAL);
454  } else {
455  len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) -
456  ETH_FCS_LEN;
457  iob_put(iob, len);
458  netdev_rx(dev, iob);
459 
460  DBGC2(dev, "Received packet: %d bytes %d %d\n", len, sw_idx, hw_idx);
461  }
462 
463  sw_idx++;
464  sw_idx &= TG3_RX_RET_MAX_SIZE_5705 - 1;
465 
466  tpr->rx_iobufs[iob_idx] = NULL;
467  tpr->rx_std_iob_cnt--;
468  }
469 
470  if (tp->rx_rcb_ptr != sw_idx) {
471  tw32_rx_mbox(tp->consmbox, sw_idx);
472  tp->rx_rcb_ptr = sw_idx;
473  }
474 
476 }
uint16_t u16
Definition: stdint.h:21
#define EINVAL
Invalid argument.
Definition: errno.h:428
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
Definition: tg3.h:3047
#define iob_put(iobuf, len)
Definition: iobuf.h:116
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:501
struct net_device * dev
Definition: tg3.h:3091
u32 rx_std_iob_cnt
Definition: tg3.h:2954
#define TG3_RX_RET_MAX_SIZE_5705
Definition: tg3.h:178
#define DBGC(...)
Definition: compiler.h:505
#define tw32_rx_mbox(reg, val)
Definition: tg3.h:3337
#define RXD_ERR_ODD_NIBBLE_RCVD_MII
Definition: tg3.h:2620
#define DBGP(...)
Definition: compiler.h:532
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
static void tg3_refill_prod_ring(struct tg3 *tp)
Definition: tg3.c:400
static struct tulip_private * tp
Definition: tulip.c:441
#define TG3_DEF_RX_RING_PENDING
Definition: tg3.h:2949
#define RXD_LEN_SHIFT
Definition: tg3.h:2591
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:470
uint32_t len
Length.
Definition: ena.h:14
#define DBGC2(...)
Definition: compiler.h:522
#define ETH_FCS_LEN
Definition: atl1e.h:45
struct io_buffer * rx_iobufs[TG3_DEF_RX_RING_PENDING]
Definition: tg3.h:2956
#define RXD_LEN_MASK
Definition: tg3.h:2590
#define RXD_OPAQUE_INDEX_MASK
Definition: tg3.h:2629
#define RXD_ERR_MASK
Definition: tg3.h:2625
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
uint32_t u32
Definition: stdint.h:23
A persistent I/O buffer.
Definition: iobuf.h:32

References assert(), DBGC, DBGC2, DBGP, tg3::dev, EINVAL, tg3_rx_buffer_desc::err_vlan, ETH_FCS_LEN, tg3_rx_buffer_desc::idx_len, iob_put, len, netdev_priv(), netdev_rx(), netdev_rx_err(), NULL, tg3_rx_buffer_desc::opaque, tg3_rx_prodring_set::rx_iobufs, tg3_rx_prodring_set::rx_std_iob_cnt, RXD_ERR_MASK, RXD_ERR_ODD_NIBBLE_RCVD_MII, RXD_LEN_MASK, RXD_LEN_SHIFT, RXD_OPAQUE_INDEX_MASK, TG3_DEF_RX_RING_PENDING, tg3_refill_prod_ring(), TG3_RX_RET_MAX_SIZE_5705, tp, and tw32_rx_mbox.

Referenced by tg3_poll().

◆ tg3_poll()

static void tg3_poll ( struct net_device dev)
static

Definition at line 478 of file tg3.c.

479 { DBGP("%s\n", __func__);
480 
481  struct tg3 *tp = netdev_priv(dev);
482 
483  /* ACK interrupts */
484  /*
485  *tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00);
486  */
487  tp->hw_status->status &= ~SD_STATUS_UPDATED;
488 
489  mb();
490 
491  tg3_poll_link(tp);
494 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
Definition: tg3.h:3047
struct net_device * dev
Definition: tg3.h:3091
static void tg3_tx_complete(struct net_device *dev)
Definition: tg3.c:333
void tg3_poll_link(struct tg3 *tp)
Definition: tg3_phy.c:1008
#define DBGP(...)
Definition: compiler.h:532
static struct tulip_private * tp
Definition: tulip.c:441
static void tg3_rx_complete(struct net_device *dev)
Definition: tg3.c:427
#define SD_STATUS_UPDATED
Definition: tg3.h:2672
void mb(void)
Memory barrier.

References DBGP, tg3::dev, mb(), netdev_priv(), SD_STATUS_UPDATED, tg3_poll_link(), tg3_rx_complete(), tg3_tx_complete(), and tp.

◆ tg3_close()

static void tg3_close ( struct net_device dev)
static

Definition at line 496 of file tg3.c.

497 { DBGP("%s\n", __func__);
498 
499  struct tg3 *tp = netdev_priv(dev);
500 
501  DBGP("%s\n", __func__);
502 
503  tg3_halt(tp);
504  tg3_rx_prodring_free(&tp->prodring);
505  tg3_flag_clear(tp, INIT_COMPLETE);
506 
508 
509 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
Definition: tg3.h:3047
struct net_device * dev
Definition: tg3.h:3091
static void tg3_rx_prodring_free(struct tg3_rx_prodring_set *tpr)
Definition: tg3.c:188
static void tg3_free_consistent(struct tg3 *tp)
Definition: tg3.c:54
#define DBGP(...)
Definition: compiler.h:532
int tg3_halt(struct tg3 *tp)
Definition: tg3_hw.c:1480
static struct tulip_private * tp
Definition: tulip.c:441
#define tg3_flag_clear(tp, flag)
Definition: tg3.h:3369

References DBGP, tg3::dev, netdev_priv(), tg3_flag_clear, tg3_free_consistent(), tg3_halt(), tg3_rx_prodring_free(), and tp.

◆ tg3_irq()

static void tg3_irq ( struct net_device dev,
int  enable 
)
static

Definition at line 511 of file tg3.c.

512 { DBGP("%s\n", __func__);
513 
514  struct tg3 *tp = netdev_priv(dev);
515 
516  DBGP("%s: %d\n", __func__, enable);
517 
518  if (enable)
520  else
522 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
Definition: tg3.h:3047
struct net_device * dev
Definition: tg3.h:3091
#define DBGP(...)
Definition: compiler.h:532
static struct tulip_private * tp
Definition: tulip.c:441
void tg3_enable_ints(struct tg3 *tp)
Definition: tg3_hw.c:967
void tg3_disable_ints(struct tg3 *tp)
Definition: tg3_hw.c:958

References DBGP, tg3::dev, netdev_priv(), tg3_disable_ints(), tg3_enable_ints(), and tp.

◆ tg3_do_test_dma()

int tg3_do_test_dma ( struct tg3 tp,
u32 __unused buf,
dma_addr_t  buf_dma,
int  size,
int  to_device 
)

Definition at line 2594 of file tg3_hw.c.

2595 { DBGP("%s\n", __func__);
2596 
2597  struct tg3_internal_buffer_desc test_desc;
2598  u32 sram_dma_descs;
2599  int ret;
2600  unsigned int i;
2601 
2602  sram_dma_descs = NIC_SRAM_DMA_DESC_POOL_BASE;
2603 
2606  tw32(RDMAC_STATUS, 0);
2607  tw32(WDMAC_STATUS, 0);
2608 
2609  tw32(BUFMGR_MODE, 0);
2610  tw32(FTQ_RESET, 0);
2611 
2612  test_desc.addr_hi = ((u64) buf_dma) >> 32;
2613  test_desc.addr_lo = buf_dma & 0xffffffff;
2614  test_desc.nic_mbuf = 0x00002100;
2615  test_desc.len = size;
2616 
2617  /*
2618  * HP ZX1 was seeing test failures for 5701 cards running at 33Mhz
2619  * the *second* time the tg3 driver was getting loaded after an
2620  * initial scan.
2621  *
2622  * Broadcom tells me:
2623  * ...the DMA engine is connected to the GRC block and a DMA
2624  * reset may affect the GRC block in some unpredictable way...
2625  * The behavior of resets to individual blocks has not been tested.
2626  *
2627  * Broadcom noted the GRC reset will also reset all sub-components.
2628  */
2629  if (to_device) {
2630  test_desc.cqid_sqid = (13 << 8) | 2;
2631 
2633  udelay(40);
2634  } else {
2635  test_desc.cqid_sqid = (16 << 8) | 7;
2636 
2638  udelay(40);
2639  }
2640  test_desc.flags = 0x00000005;
2641 
2642  for (i = 0; i < (sizeof(test_desc) / sizeof(u32)); i++) {
2643  u32 val;
2644 
2645  val = *(((u32 *)&test_desc) + i);
2647  sram_dma_descs + (i * sizeof(u32)));
2649  }
2651 
2652  if (to_device)
2653  tw32(FTQ_DMA_HIGH_READ_FIFO_ENQDEQ, sram_dma_descs);
2654  else
2655  tw32(FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ, sram_dma_descs);
2656 
2657  ret = -ENODEV;
2658  for (i = 0; i < 40; i++) {
2659  u32 val;
2660 
2661  if (to_device)
2663  else
2665  if ((val & 0xffff) == sram_dma_descs) {
2666  ret = 0;
2667  break;
2668  }
2669 
2670  udelay(100);
2671  }
2672 
2673  return ret;
2674 }
#define tr32(reg)
Definition: tg3.h:3339
#define WDMAC_STATUS
Definition: tg3.h:1536
#define TG3PCI_MEM_WIN_BASE_ADDR
Definition: tg3.h:407
#define WDMAC_MODE
Definition: tg3.h:1522
#define TG3PCI_MEM_WIN_DATA
Definition: tg3.h:409
#define FTQ_RCVDATA_COMP_FIFO_ENQDEQ
Definition: tg3.h:1756
#define FTQ_RESET
Definition: tg3.h:1692
#define NIC_SRAM_DMA_DESC_POOL_BASE
Definition: tg3.h:2286
#define FTQ_RCVBD_COMP_FIFO_ENQDEQ
Definition: tg3.h:1744
#define DBGP(...)
Definition: compiler.h:532
#define FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ
Definition: tg3.h:1720
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
uint64_t u64
Definition: stdint.h:25
#define RDMAC_STATUS
Definition: tg3.h:1495
static struct tulip_private * tp
Definition: tulip.c:441
#define BUFMGR_MODE
Definition: tg3.h:1419
#define FTQ_DMA_HIGH_READ_FIFO_ENQDEQ
Definition: tg3.h:1700
#define ENODEV
No such device.
Definition: errno.h:509
#define tw32_f(reg, val)
Definition: tg3.h:3333
#define RDMAC_MODE
Definition: tg3.h:1473
void __asmcall int val
Definition: setjmp.h:28
#define WDMAC_MODE_ENABLE
Definition: tg3.h:1524
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:16
#define tw32(reg, val)
Definition: tg3.h:3329
#define RDMAC_MODE_ENABLE
Definition: tg3.h:1475
uint32_t u32
Definition: stdint.h:23

References tg3_internal_buffer_desc::addr_hi, tg3_internal_buffer_desc::addr_lo, BUFMGR_MODE, tg3_internal_buffer_desc::cqid_sqid, DBGP, ENODEV, tg3_internal_buffer_desc::flags, FTQ_DMA_HIGH_READ_FIFO_ENQDEQ, FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ, FTQ_RCVBD_COMP_FIFO_ENQDEQ, FTQ_RCVDATA_COMP_FIFO_ENQDEQ, FTQ_RESET, tg3_internal_buffer_desc::len, tg3_internal_buffer_desc::nic_mbuf, NIC_SRAM_DMA_DESC_POOL_BASE, pci_write_config_dword(), RDMAC_MODE, RDMAC_MODE_ENABLE, RDMAC_STATUS, size, TG3PCI_MEM_WIN_BASE_ADDR, TG3PCI_MEM_WIN_DATA, tp, tr32, tw32, tw32_f, udelay(), val, WDMAC_MODE, WDMAC_MODE_ENABLE, and WDMAC_STATUS.

Referenced by tg3_test_dma().

◆ tg3_read_mem()

void tg3_read_mem ( struct tg3 tp,
u32  off,
u32 val 
)

Definition at line 152 of file tg3_hw.c.

153 { DBGP("%s\n", __func__);
154 
155  if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 &&
156  (off >= NIC_SRAM_STATS_BLK) && (off < NIC_SRAM_TX_BUFFER_DESC)) {
157  *val = 0;
158  return;
159  }
160 
163 
164  /* Always leave this as zero. */
166 }
#define TG3PCI_MEM_WIN_BASE_ADDR
Definition: tg3.h:407
#define TG3PCI_MEM_WIN_DATA
Definition: tg3.h:409
#define ASIC_REV_5906
Definition: tg3.h:310
#define GET_ASIC_REV(CHIP_REV_ID)
Definition: tg3.h:298
#define DBGP(...)
Definition: compiler.h:532
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
#define NIC_SRAM_TX_BUFFER_DESC
Definition: tg3.h:2288
static struct tulip_private * tp
Definition: tulip.c:441
#define NIC_SRAM_STATS_BLK
Definition: tg3.h:2200
void __asmcall int val
Definition: setjmp.h:28
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.

References ASIC_REV_5906, DBGP, GET_ASIC_REV, NIC_SRAM_STATS_BLK, NIC_SRAM_TX_BUFFER_DESC, pci_read_config_dword(), pci_write_config_dword(), TG3PCI_MEM_WIN_BASE_ADDR, TG3PCI_MEM_WIN_DATA, tp, and val.

Referenced by tg3_get_device_address(), tg3_get_eeprom_hw_cfg(), tg3_poll_fw(), and tg3_test_dma().

◆ tg3_test_dma()

static int tg3_test_dma ( struct tg3 tp)
static

Definition at line 537 of file tg3.c.

538 { DBGP("%s\n", __func__);
539 
540  dma_addr_t buf_dma;
541  u32 *buf;
542  int ret = 0;
543 
545  if (!buf) {
546  ret = -ENOMEM;
547  goto out_nofree;
548  }
549  buf_dma = virt_to_bus(buf);
550  DBGC2(tp->dev, "dma test buffer, virt: %p phys: %#016lx\n", buf, buf_dma);
551 
552  if (tg3_flag(tp, 57765_PLUS)) {
553  tp->dma_rwctrl = DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
554  goto out;
555  }
556 
557  tp->dma_rwctrl = ((0x7 << DMA_RWCTRL_PCI_WRITE_CMD_SHIFT) |
559 
560  if (tg3_flag(tp, PCI_EXPRESS)) {
561  /* DMA read watermark not used on PCIE */
562  tp->dma_rwctrl |= 0x00180000;
563  } else if (!tg3_flag(tp, PCIX_MODE)) {
564  if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
565  GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)
566  tp->dma_rwctrl |= 0x003f0000;
567  else
568  tp->dma_rwctrl |= 0x003f000f;
569  } else {
570  if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 ||
571  GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
572  u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f);
573  u32 read_water = 0x7;
574 
575  if (ccval == 0x6 || ccval == 0x7)
576  tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA;
577 
578  if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703)
579  read_water = 4;
580  /* Set bit 23 to enable PCIX hw bug fix */
581  tp->dma_rwctrl |=
582  (read_water << DMA_RWCTRL_READ_WATER_SHIFT) |
584  (1 << 23);
585  } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
586  /* 5780 always in PCIX mode */
587  tp->dma_rwctrl |= 0x00144000;
588  } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) {
589  /* 5714 always in PCIX mode */
590  tp->dma_rwctrl |= 0x00148000;
591  } else {
592  tp->dma_rwctrl |= 0x001b000f;
593  }
594  }
595 
596  if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 ||
597  GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704)
598  tp->dma_rwctrl &= 0xfffffff0;
599 
600  if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
601  GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701) {
602  /* Remove this if it causes problems for some boards. */
603  tp->dma_rwctrl |= DMA_RWCTRL_USE_MEM_READ_MULT;
604 
605  /* On 5700/5701 chips, we need to set this bit.
606  * Otherwise the chip will issue cacheline transactions
607  * to streamable DMA memory with not all the byte
608  * enables turned on. This is an error on several
609  * RISC PCI controllers, in particular sparc64.
610  *
611  * On 5703/5704 chips, this bit has been reassigned
612  * a different meaning. In particular, it is used
613  * on those chips to enable a PCI-X workaround.
614  */
615  tp->dma_rwctrl |= DMA_RWCTRL_ASSERT_ALL_BE;
616  }
617 
618  tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
619 
620 #if 0
621  /* Unneeded, already done by tg3_get_invariants. */
623 #endif
624 
625  if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 &&
626  GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701)
627  goto out;
628 
629  /* It is best to perform DMA test with maximum write burst size
630  * to expose the 5700/5701 write DMA bug.
631  */
632  tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
633  tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
634 
635  while (1) {
636  u32 *p = buf, i;
637 
638  for (i = 0; i < TEST_BUFFER_SIZE / sizeof(u32); i++)
639  p[i] = i;
640 
641  /* Send the buffer to the chip. */
642  ret = tg3_do_test_dma(tp, buf, buf_dma, TEST_BUFFER_SIZE, 1);
643  if (ret) {
644  DBGC(&tp->pdev->dev,
645  "%s: Buffer write failed. err = %d\n",
646  __func__, ret);
647  break;
648  }
649 
650  /* validate data reached card RAM correctly. */
651  for (i = 0; i < TEST_BUFFER_SIZE / sizeof(u32); i++) {
652  u32 val;
653  tg3_read_mem(tp, 0x2100 + (i*4), &val);
654  if (le32_to_cpu(val) != p[i]) {
655  DBGC(&tp->pdev->dev,
656  "%s: Buffer corrupted on device! "
657  "(%d != %d)\n", __func__, val, i);
658  /* ret = -ENODEV here? */
659  }
660  p[i] = 0;
661  }
662 
663  /* Now read it back. */
664  ret = tg3_do_test_dma(tp, buf, buf_dma, TEST_BUFFER_SIZE, 0);
665  if (ret) {
666  DBGC(&tp->pdev->dev, "%s: Buffer read failed. "
667  "err = %d\n", __func__, ret);
668  break;
669  }
670 
671  /* Verify it. */
672  for (i = 0; i < TEST_BUFFER_SIZE / sizeof(u32); i++) {
673  if (p[i] == i)
674  continue;
675 
676  if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) !=
678  tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
679  tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16;
680  tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
681  break;
682  } else {
683  DBGC(&tp->pdev->dev,
684  "%s: Buffer corrupted on read back! "
685  "(%d != %d)\n", __func__, p[i], i);
686  ret = -ENODEV;
687  goto out;
688  }
689  }
690 
691  if (i == (TEST_BUFFER_SIZE / sizeof(u32))) {
692  /* Success. */
693  ret = 0;
694  break;
695  }
696  }
697 
698  if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) !=
700  /* DMA test passed without adjusting DMA boundary,
701  * now look for chipsets that are known to expose the
702  * DMA bug without failing the test.
703  */
704  tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
705  tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16;
706 
707  tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
708  }
709 
710 out:
712 out_nofree:
713  return ret;
714 }
#define tr32(reg)
Definition: tg3.h:3339
#define TEST_BUFFER_SIZE
Definition: tg3.c:532
#define DMA_RWCTRL_WRITE_BNDRY_MASK
Definition: tg3.h:356
#define TG3_DMA_ALIGNMENT
Definition: tg3.h:3313
#define le32_to_cpu(value)
Definition: byteswap.h:113
#define DMA_RWCTRL_PCI_READ_CMD_SHIFT
Definition: tg3.h:376
#define DBGC(...)
Definition: compiler.h:505
#define DMA_RWCTRL_DIS_CACHE_ALIGNMENT
Definition: tg3.h:341
#define ASIC_REV_5700
Definition: tg3.h:299
unsigned long dma_addr_t
Definition: bnx2.h:20
#define GET_ASIC_REV(CHIP_REV_ID)
Definition: tg3.h:298
#define ENOMEM
Not enough space.
Definition: errno.h:534
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define DBGP(...)
Definition: compiler.h:532
#define u32
Definition: vga.h:21
#define ASIC_REV_5750
Definition: tg3.h:304
__be32 out[4]
Definition: CIB_PRM.h:36
static struct tulip_private * tp
Definition: tulip.c:441
#define ASIC_REV_5704
Definition: tg3.h:302
#define DMA_RWCTRL_USE_MEM_READ_MULT
Definition: tg3.h:373
#define ASIC_REV_5705
Definition: tg3.h:303
#define ASIC_REV_5703
Definition: tg3.h:301
#define DMA_RWCTRL_WRITE_WATER_SHIFT
Definition: tg3.h:372
#define tg3_flag(tp, flag)
Definition: tg3.h:3365
#define DMA_RWCTRL_WRITE_BNDRY_16
Definition: tg3.h:358
#define ENODEV
No such device.
Definition: errno.h:509
static void tg3_switch_clocks(struct tg3 *tp)
Definition: tg3_hw.c:359
#define TG3PCI_DMA_RW_CTRL
Definition: tg3.h:340
#define DMA_RWCTRL_ASSERT_ALL_BE
Definition: tg3.h:374
void __asmcall int val
Definition: setjmp.h:28
#define TG3PCI_CLOCK_CTRL
Definition: tg3.h:395
#define DBGC2(...)
Definition: compiler.h:522
#define DMA_RWCTRL_PCI_WRITE_CMD_SHIFT
Definition: tg3.h:378
static void *__malloc malloc_dma(size_t size, size_t phys_align)
Allocate memory for DMA.
Definition: malloc.h:66
#define DMA_RWCTRL_ONE_DMA
Definition: tg3.h:368
#define tw32(reg, val)
Definition: tg3.h:3329
void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val)
Definition: tg3_hw.c:152
#define ASIC_REV_5714
Definition: tg3.h:307
#define DMA_RWCTRL_READ_WATER_SHIFT
Definition: tg3.h:370
static void free_dma(void *ptr, size_t size)
Free memory allocated with malloc_dma()
Definition: malloc.h:81
uint32_t u32
Definition: stdint.h:23
#define ASIC_REV_5780
Definition: tg3.h:306
if(natsemi->flags &NATSEMI_64BIT) return 1
#define ASIC_REV_5701
Definition: tg3.h:300
int tg3_do_test_dma(struct tg3 *tp, u32 __unused *buf, dma_addr_t buf_dma, int size, int to_device)
Definition: tg3_hw.c:2594

References ASIC_REV_5700, ASIC_REV_5701, ASIC_REV_5703, ASIC_REV_5704, ASIC_REV_5705, ASIC_REV_5714, ASIC_REV_5750, ASIC_REV_5780, DBGC, DBGC2, DBGP, DMA_RWCTRL_ASSERT_ALL_BE, DMA_RWCTRL_DIS_CACHE_ALIGNMENT, DMA_RWCTRL_ONE_DMA, DMA_RWCTRL_PCI_READ_CMD_SHIFT, DMA_RWCTRL_PCI_WRITE_CMD_SHIFT, DMA_RWCTRL_READ_WATER_SHIFT, DMA_RWCTRL_USE_MEM_READ_MULT, DMA_RWCTRL_WRITE_BNDRY_16, DMA_RWCTRL_WRITE_BNDRY_MASK, DMA_RWCTRL_WRITE_WATER_SHIFT, ENODEV, ENOMEM, free_dma(), GET_ASIC_REV, if(), le32_to_cpu, malloc_dma(), out, TEST_BUFFER_SIZE, TG3_DMA_ALIGNMENT, tg3_do_test_dma(), tg3_flag, tg3_read_mem(), tg3_switch_clocks(), TG3PCI_CLOCK_CTRL, TG3PCI_DMA_RW_CTRL, tp, tr32, tw32, u32, val, and virt_to_bus().

Referenced by tg3_init_one().

◆ tg3_init_one()

static int tg3_init_one ( struct pci_device pdev)
static

Definition at line 716 of file tg3.c.

717 { DBGP("%s\n", __func__);
718 
719  struct net_device *dev;
720  struct tg3 *tp;
721  int err = 0;
722  unsigned long reg_base, reg_size;
723 
725 
726  dev = alloc_etherdev(sizeof(*tp));
727  if (!dev) {
728  DBGC(&pdev->dev, "Failed to allocate etherdev\n");
729  err = -ENOMEM;
730  goto err_out_disable_pdev;
731  }
732 
735 
736  dev->dev = &pdev->dev;
737 
738  tp = netdev_priv(dev);
739  tp->pdev = pdev;
740  tp->dev = dev;
741  tp->rx_mode = TG3_DEF_RX_MODE;
742  tp->tx_mode = TG3_DEF_TX_MODE;
743 
744  /* Subsystem IDs are required later */
745  pci_read_config_word(tp->pdev, PCI_SUBSYSTEM_VENDOR_ID, &tp->subsystem_vendor);
746  pci_read_config_word(tp->pdev, PCI_SUBSYSTEM_ID, &tp->subsystem_device);
747 
748  /* The word/byte swap controls here control register access byte
749  * swapping. DMA data byte swapping is controlled in the GRC_MODE
750  * setting below.
751  */
752  tp->misc_host_ctrl =
757 
758  /* The NONFRM (non-frame) byte/word swap controls take effect
759  * on descriptor entries, anything which isn't packet data.
760  *
761  * The StrongARM chips on the board (one for tx, one for rx)
762  * are running in big-endian mode.
763  */
766 #if __BYTE_ORDER == __BIG_ENDIAN
767  tp->grc_mode |= GRC_MODE_BSWAP_NONFRM_DATA;
768 #endif
769 
770  /* FIXME: how can we detect errors here? */
772  reg_size = pci_bar_size(pdev, PCI_BASE_ADDRESS_0);
773 
774  tp->regs = ioremap(reg_base, reg_size);
775  if (!tp->regs) {
776  DBGC(&pdev->dev, "Failed to remap device registers\n");
777  errno = -ENOENT;
778  goto err_out_disable_pdev;
779  }
780 
781  err = tg3_get_invariants(tp);
782  if (err) {
783  DBGC(&pdev->dev, "Problem fetching invariants of chip, aborting\n");
784  goto err_out_iounmap;
785  }
786 
788 
789  err = tg3_get_device_address(tp);
790  if (err) {
791  DBGC(&pdev->dev, "Could not obtain valid ethernet address, aborting\n");
792  goto err_out_iounmap;
793  }
794 
795  /*
796  * Reset chip in case UNDI or EFI driver did not shutdown
797  * DMA self test will enable WDMAC and we'll see (spurious)
798  * pending DMA on the PCI bus at that point.
799  */
803  tg3_halt(tp);
804  }
805 
806  err = tg3_test_dma(tp);
807  if (err) {
808  DBGC(&pdev->dev, "DMA engine test failed, aborting\n");
809  goto err_out_iounmap;
810  }
811 
815 
816  tp->coal_now = HOSTCC_MODE_NOW;
817 
818  err = register_netdev(dev);
819  if (err) {
820  DBGC(&pdev->dev, "Cannot register net device, aborting\n");
821  goto err_out_iounmap;
822  }
823 
824  /* Call tg3_setup_phy() to start autoneg process, which saves time
825  * over starting autoneg in tg3_open();
826  */
827  err = tg3_setup_phy(tp, 0);
828  if (err) {
829  DBGC(tp->dev, "tg3_setup_phy() call failed in %s\n", __func__);
830  goto err_out_iounmap;
831  }
832 
833  return 0;
834 
835 err_out_iounmap:
836  if (tp->regs) {
837  iounmap(tp->regs);
838  tp->regs = NULL;
839  }
840 
841  netdev_put(dev);
842 
843 err_out_disable_pdev:
845  return err;
846 }
#define MEMARB_MODE_ENABLE
Definition: tg3.h:1412
#define TG3_DEF_TX_MODE
Definition: tg3.c:20
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
#define tr32(reg)
Definition: tg3.h:3339
Definition: tg3.h:3047
struct net_device * dev
Definition: tg3.h:3091
void tg3_init_bufmgr_config(struct tg3 *tp)
Definition: tg3_hw.c:849
#define MISC_HOST_CTRL_PCISTATE_RW
Definition: tg3.h:249
#define MAILBOX_INTERRUPT_0
Definition: tg3.h:431
#define WDMAC_MODE
Definition: tg3.h:1522
#define MAILBOX_RCVRET_CON_IDX_0
Definition: tg3.h:451
#define DBGC(...)
Definition: compiler.h:505
#define GRC_MODE_BSWAP_DATA
Definition: tg3.h:1786
#define ENOENT
No such file or directory.
Definition: errno.h:514
#define PCI_BASE_ADDRESS_0
Definition: pci.h:61
int tg3_setup_phy(struct tg3 *tp, int force_reset)
Definition: tg3_phy.c:2520
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
#define PCI_SUBSYSTEM_ID
PCI subsystem ID.
Definition: pci.h:77
#define GRC_MODE_WSWAP_DATA
Definition: tg3.h:1787
struct device dev
Generic device.
Definition: pci.h:189
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:498
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:338
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define DBGP(...)
Definition: compiler.h:532
int tg3_halt(struct tg3 *tp)
Definition: tg3_hw.c:1480
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:555
#define GRC_MODE_BSWAP_NONFRM_DATA
Definition: tg3.h:1784
#define TG3_64BIT_REG_LOW
Definition: tg3.h:160
int errno
Global "last error" number.
Definition: errno.c:20
#define HOSTCC_MODE_ENABLE
Definition: tg3.h:1301
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
Definition: pci.c:96
static struct tulip_private * tp
Definition: tulip.c:441
#define GRC_MODE_WSWAP_NONFRM_DATA
Definition: tg3.h:1785
unsigned long pci_bar_size(struct pci_device *pci, unsigned int reg)
Find the size of a PCI BAR.
Definition: pciextra.c:90
#define HOSTCC_MODE_NOW
Definition: tg3.h:1303
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:667
A network device.
Definition: netdevice.h:348
#define MISC_HOST_CTRL_INDIR_ACCESS
Definition: tg3.h:252
#define TG3_DEF_RX_MODE
Definition: tg3.c:19
#define MISC_HOST_CTRL_MASK_PCI_INT
Definition: tg3.h:246
struct device * dev
Underlying hardware device.
Definition: netdevice.h:360
static struct net_device_operations tg3_netdev_ops
Definition: tg3.c:524
int tg3_get_device_address(struct tg3 *tp)
Definition: tg3_hw.c:1649
#define MISC_HOST_CTRL_WORD_SWAP
Definition: tg3.h:248
#define WDMAC_MODE_ENABLE
Definition: tg3.h:1524
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
#define MAILBOX_SNDHOST_PROD_IDX_0
Definition: tg3.h:467
void iounmap(volatile const void *io_addr)
Unmap I/O address.
#define tw32(reg, val)
Definition: tg3.h:3329
struct pci_device * pdev
Definition: tg3.h:3092
#define PCI_SUBSYSTEM_VENDOR_ID
PCI subsystem vendor ID.
Definition: pci.h:74
static int tg3_test_dma(struct tg3 *tp)
Definition: tg3.c:537
void * ioremap(unsigned long bus_addr, size_t len)
Map bus address as an I/O address.
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
#define HOSTCC_MODE
Definition: tg3.h:1299
#define MEMARB_MODE
Definition: tg3.h:1410
int tg3_get_invariants(struct tg3 *tp)
Definition: tg3_hw.c:393

References adjust_pci_device(), alloc_etherdev(), DBGC, DBGP, pci_device::dev, net_device::dev, tg3::dev, ENOENT, ENOMEM, errno, GRC_MODE_BSWAP_DATA, GRC_MODE_BSWAP_NONFRM_DATA, GRC_MODE_WSWAP_DATA, GRC_MODE_WSWAP_NONFRM_DATA, HOSTCC_MODE, HOSTCC_MODE_ENABLE, HOSTCC_MODE_NOW, ioremap(), iounmap(), MAILBOX_INTERRUPT_0, MAILBOX_RCVRET_CON_IDX_0, MAILBOX_SNDHOST_PROD_IDX_0, MEMARB_MODE, MEMARB_MODE_ENABLE, MISC_HOST_CTRL_INDIR_ACCESS, MISC_HOST_CTRL_MASK_PCI_INT, MISC_HOST_CTRL_PCISTATE_RW, MISC_HOST_CTRL_WORD_SWAP, netdev_init(), netdev_priv(), netdev_put(), NULL, pci_bar_size(), pci_bar_start(), PCI_BASE_ADDRESS_0, pci_read_config_word(), pci_set_drvdata(), PCI_SUBSYSTEM_ID, PCI_SUBSYSTEM_VENDOR_ID, tg3::pdev, register_netdev(), TG3_64BIT_REG_LOW, TG3_DEF_RX_MODE, TG3_DEF_TX_MODE, tg3_get_device_address(), tg3_get_invariants(), tg3_halt(), tg3_init_bufmgr_config(), tg3_netdev_ops, tg3_setup_phy(), tg3_test_dma(), tp, tr32, tw32, WDMAC_MODE, and WDMAC_MODE_ENABLE.

◆ tg3_remove_one()

static void tg3_remove_one ( struct pci_device pci)
static

Definition at line 848 of file tg3.c.

849 { DBGP("%s\n", __func__);
850 
851  struct net_device *netdev = pci_get_drvdata(pci);
852 
856 }
#define DBGP(...)
Definition: compiler.h:532
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:555
static struct net_device * netdev
Definition: gdbudp.c:52
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:844
A network device.
Definition: netdevice.h:348
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:511
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:348

References DBGP, netdev, netdev_nullify(), netdev_put(), pci_get_drvdata(), and unregister_netdev().

Variable Documentation

◆ tg3_netdev_ops

struct net_device_operations tg3_netdev_ops
static
Initial value:
= {
.open = tg3_open,
.close = tg3_close,
.poll = tg3_poll,
.transmit = tg3_transmit,
.irq = tg3_irq,
}
static int tg3_open(struct net_device *dev)
Definition: tg3.c:233
static void tg3_poll(struct net_device *dev)
Definition: tg3.c:478
static void tg3_irq(struct net_device *dev, int enable)
Definition: tg3.c:511
static void tg3_close(struct net_device *dev)
Definition: tg3.c:496
static int tg3_transmit(struct net_device *dev, struct io_buffer *iob)
Definition: tg3.c:299

Definition at line 524 of file tg3.c.

Referenced by tg3_init_one().

◆ tg3_nics

struct pci_device_id tg3_nics[]
static

Definition at line 858 of file tg3.c.

◆ __pci_driver

struct pci_driver tg3_pci_driver __pci_driver
Initial value:
= {
.ids = tg3_nics,
.id_count = ARRAY_SIZE(tg3_nics),
.probe = tg3_init_one,
.remove = tg3_remove_one,
}
#define ARRAY_SIZE(x)
Definition: efx_common.h:43
static void tg3_remove_one(struct pci_device *pci)
Definition: tg3.c:848
static struct pci_device_id tg3_nics[]
Definition: tg3.c:858
static int tg3_init_one(struct pci_device *pdev)
Definition: tg3.c:716

Definition at line 943 of file tg3.c.