iPXE
ath9k_calib.c
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1 /*
2  * Copyright (c) 2008-2011 Atheros Communications Inc.
3  *
4  * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
5  * Original from Linux kernel 3.0.1
6  *
7  * Permission to use, copy, modify, and/or distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #include "hw.h"
21 #include "hw-ops.h"
22 
23 /* Common calibration code */
24 
25 #define ATH9K_NF_TOO_HIGH -60
26 
28 {
29  int16_t nfval;
31  int i, j;
32 
33  for (i = 0; i < ATH9K_NF_CAL_HIST_MAX; i++)
34  sort[i] = nfCalBuffer[i];
35 
36  for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) {
37  for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - i; j++) {
38  if (sort[j] > sort[j - 1]) {
39  nfval = sort[j];
40  sort[j] = sort[j - 1];
41  sort[j - 1] = nfval;
42  }
43  }
44  }
45  nfval = sort[(ATH9K_NF_CAL_HIST_MAX - 1) >> 1];
46 
47  return nfval;
48 }
49 
51  struct ath9k_channel *chan)
52 {
53  struct ath_nf_limits *limit;
54 
55  if (!chan || IS_CHAN_2GHZ(chan))
56  limit = &ah->nf_2g;
57  else
58  limit = &ah->nf_5g;
59 
60  return limit;
61 }
62 
64  struct ath9k_channel *chan)
65 {
66  return ath9k_hw_get_nf_limits(ah, chan)->nominal;
67 }
68 
69 
71  struct ath9k_hw_cal_data *cal,
72  int16_t *nfarray)
73 {
74  struct ath_nf_limits *limit;
75  struct ath9k_nfcal_hist *h;
76  int high_nf_mid = 0;
77  u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
78  int i;
79 
80  h = cal->nfCalHist;
81  limit = ath9k_hw_get_nf_limits(ah, ah->curchan);
82 
83  for (i = 0; i < NUM_NF_READINGS; i++) {
84  if (!(chainmask & (1 << i)) ||
85  (i >= AR5416_MAX_CHAINS))
86  continue;
87 
88  h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
89 
90  if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
91  h[i].currIndex = 0;
92 
93  if (h[i].invalidNFcount > 0) {
94  h[i].invalidNFcount--;
95  h[i].privNF = nfarray[i];
96  } else {
97  h[i].privNF =
99  }
100 
101  if (!h[i].privNF)
102  continue;
103 
104  if (h[i].privNF > limit->max) {
105  high_nf_mid = 1;
106 
107  DBG2("ath9k: "
108  "NFmid[%d] (%d) > MAX (%d), %s\n",
109  i, h[i].privNF, limit->max,
110  (cal->nfcal_interference ?
111  "not corrected (due to interference)" :
112  "correcting to MAX"));
113 
114  /*
115  * Normally we limit the average noise floor by the
116  * hardware specific maximum here. However if we have
117  * encountered stuck beacons because of interference,
118  * we bypass this limit here in order to better deal
119  * with our environment.
120  */
121  if (!cal->nfcal_interference)
122  h[i].privNF = limit->max;
123  }
124  }
125 
126  /*
127  * If the noise floor seems normal for all chains, assume that
128  * there is no significant interference in the environment anymore.
129  * Re-enable the enforcement of the NF maximum again.
130  */
131  if (!high_nf_mid)
132  cal->nfcal_interference = 0;
133 }
134 
135 static int ath9k_hw_get_nf_thresh(struct ath_hw *ah,
136  int band,
137  int16_t *nft)
138 {
139  switch (band) {
140  case NET80211_BAND_5GHZ:
141  *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_5);
142  break;
143  case NET80211_BAND_2GHZ:
144  *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_2);
145  break;
146  default:
147  return 0;
148  }
149 
150  return 1;
151 }
152 
154  struct ath9k_cal_list *currCal)
155 {
156  int i;
157 
158  ath9k_hw_setup_calibration(ah, currCal);
159 
160  currCal->calState = CAL_RUNNING;
161 
162  for (i = 0; i < AR5416_MAX_CHAINS; i++) {
163  ah->meas0.sign[i] = 0;
164  ah->meas1.sign[i] = 0;
165  ah->meas2.sign[i] = 0;
166  ah->meas3.sign[i] = 0;
167  }
168 
169  ah->cal_samples = 0;
170 }
171 
172 /* This is done for the currently configured channel */
174 {
175  struct ath9k_cal_list *currCal = ah->cal_list_curr;
176 
177  if (!ah->caldata)
178  return 1;
179 
181  return 1;
182 
183  if (currCal == NULL)
184  return 1;
185 
186  if (currCal->calState != CAL_DONE) {
187  DBG("ath9k: "
188  "Calibration state incorrect, %d\n",
189  currCal->calState);
190  return 1;
191  }
192 
193  if (!(ah->supp_cals & currCal->calData->calType))
194  return 1;
195 
196  DBG("ath9k: "
197  "Resetting Cal %d state for channel %d\n",
198  currCal->calData->calType, (ah->dev->channels + ah->dev->channel)->center_freq);
199 
200  ah->caldata->CalValid &= ~currCal->calData->calType;
201  currCal->calState = CAL_WAITING;
202 
203  return 0;
204 }
205 
206 void ath9k_hw_start_nfcal(struct ath_hw *ah, int update)
207 {
208  if (ah->caldata)
209  ah->caldata->nfcal_pending = 1;
210 
213 
214  if (update)
217  else
220 
222 }
223 
224 void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
225 {
226  struct ath9k_nfcal_hist *h = NULL;
227  unsigned i, j;
228  int32_t val;
229  u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
230  s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
231 
232  if (ah->caldata)
233  h = ah->caldata->nfCalHist;
234 
235  for (i = 0; i < NUM_NF_READINGS; i++) {
236  if (chainmask & (1 << i)) {
237  s16 nfval;
238 
239  if (i >= AR5416_MAX_CHAINS)
240  continue;
241 
242  if (h)
243  nfval = h[i].privNF;
244  else
245  nfval = default_nf;
246 
247  val = REG_READ(ah, ah->nf_regs[i]);
248  val &= 0xFFFFFE00;
249  val |= (((u32) nfval << 1) & 0x1ff);
250  REG_WRITE(ah, ah->nf_regs[i], val);
251  }
252  }
253 
254  /*
255  * Load software filtered NF value into baseband internal minCCApwr
256  * variable.
257  */
263 
264  /*
265  * Wait for load to complete, should be fast, a few 10s of us.
266  * The max delay was changed from an original 250us to 10000us
267  * since 250us often results in NF load timeout and causes deaf
268  * condition during stress testing 12/12/2009
269  */
270  for (j = 0; j < 10000; j++) {
272  AR_PHY_AGC_CONTROL_NF) == 0)
273  break;
274  udelay(10);
275  }
276 
277  /*
278  * We timed out waiting for the noisefloor to load, probably due to an
279  * in-progress rx. Simply return here and allow the load plenty of time
280  * to complete before the next calibration interval. We need to avoid
281  * trying to load -50 (which happens below) while the previous load is
282  * still in progress as this can cause rx deafness. Instead by returning
283  * here, the baseband nf cal will just be capped by our present
284  * noisefloor until the next calibration timer.
285  */
286  if (j == 10000) {
287  DBG("ath9k: "
288  "Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
290  return;
291  }
292 
293  /*
294  * Restore maxCCAPower register parameter again so that we're not capped
295  * by the median we just loaded. This will be initial (and max) value
296  * of next noise floor calibration the baseband does.
297  */
299  for (i = 0; i < NUM_NF_READINGS; i++) {
300  if (chainmask & (1 << i)) {
301  if (i >= AR5416_MAX_CHAINS)
302  continue;
303 
304  val = REG_READ(ah, ah->nf_regs[i]);
305  val &= 0xFFFFFE00;
306  val |= (((u32) (-50) << 1) & 0x1ff);
307  REG_WRITE(ah, ah->nf_regs[i], val);
308  }
309  }
311 }
312 
313 
314 static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
315 {
316  struct ath_nf_limits *limit;
317  int i;
318 
319  if (IS_CHAN_2GHZ(ah->curchan))
320  limit = &ah->nf_2g;
321  else
322  limit = &ah->nf_5g;
323 
324  for (i = 0; i < NUM_NF_READINGS; i++) {
325  if (!nf[i])
326  continue;
327 
328  DBG2("ath9k: "
329  "NF calibrated [%s] [chain %d] is %d\n",
330  (i >= 3 ? "ext" : "ctl"), i % 3, nf[i]);
331 
332  if (nf[i] > ATH9K_NF_TOO_HIGH) {
333  DBG("ath9k: "
334  "NF[%d] (%d) > MAX (%d), correcting to MAX\n",
335  i, nf[i], ATH9K_NF_TOO_HIGH);
336  nf[i] = limit->max;
337  } else if (nf[i] < limit->min) {
338  DBG("ath9k: "
339  "NF[%d] (%d) < MIN (%d), correcting to NOM\n",
340  i, nf[i], limit->min);
341  nf[i] = limit->nominal;
342  }
343  }
344 }
345 
346 int ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
347 {
348  int16_t nf, nfThresh;
349  int16_t nfarray[NUM_NF_READINGS] = { 0 };
350  struct ath9k_nfcal_hist *h;
351  struct net80211_channel *c = chan->chan;
352  struct ath9k_hw_cal_data *caldata = ah->caldata;
353 
354  chan->channelFlags &= (~CHANNEL_CW_INT);
356  DBG("ath9k: "
357  "NF did not complete in calibration window\n");
358  return 0;
359  }
360 
361  ath9k_hw_do_getnf(ah, nfarray);
362  ath9k_hw_nf_sanitize(ah, nfarray);
363  nf = nfarray[0];
364  if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
365  && nf > nfThresh) {
366  DBG2("ath9k: "
367  "noise floor failed detected; detected %d, threshold %d\n",
368  nf, nfThresh);
369  chan->channelFlags |= CHANNEL_CW_INT;
370  }
371 
372  if (!caldata) {
373  chan->noisefloor = nf;
374  return 0;
375  }
376 
377  h = caldata->nfCalHist;
378  caldata->nfcal_pending = 0;
379  ath9k_hw_update_nfcal_hist_buffer(ah, caldata, nfarray);
380  chan->noisefloor = h[0].privNF;
381  return 1;
382 }
383 
385  struct ath9k_channel *chan)
386 {
387  struct ath9k_nfcal_hist *h;
388  s16 default_nf;
389  int i, j;
390 
391  ah->caldata->channel = chan->channel;
392  ah->caldata->channelFlags = chan->channelFlags & ~CHANNEL_CW_INT;
393  h = ah->caldata->nfCalHist;
394  default_nf = ath9k_hw_get_default_nf(ah, chan);
395  for (i = 0; i < NUM_NF_READINGS; i++) {
396  h[i].currIndex = 0;
397  h[i].privNF = default_nf;
398  h[i].invalidNFcount = AR_PHY_CCA_FILTERWINDOW_LENGTH;
399  for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
400  h[i].nfCalBuffer[j] = default_nf;
401  }
402  }
403 }
#define ATH9K_NF_TOO_HIGH
Definition: ath9k_calib.c:25
u16 channel
Definition: hw.h:349
Definition: hw.h:656
int16_t s16
Definition: stdint.h:20
static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
Definition: ath9k_calib.c:314
s16 nominal
Definition: hw.h:649
void ath9k_hw_start_nfcal(struct ath_hw *ah, int update)
Definition: ath9k_calib.c:206
#define IS_CHAN_2GHZ(_c)
Definition: hw.h:361
#define REG_CLR_BIT(_a, _r, _f)
Definition: hw.h:109
#define AR_PHY_AGC_CONTROL_NO_UPDATE_NF
Definition: reg.h:1915
#define REGWRITE_BUFFER_FLUSH(_ah)
Definition: hw.h:95
#define AR_PHY_CCA_FILTERWINDOW_LENGTH
Definition: calib.h:28
static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah, struct ath9k_hw_cal_data *cal, int16_t *nfarray)
Definition: ath9k_calib.c:70
#define AR_SREV_9100(ah)
Definition: reg.h:810
static __always_inline void off_t int c
Definition: efi_uaccess.h:87
static int ath9k_hw_get_nf_thresh(struct ath_hw *ah, int band, int16_t *nft)
Definition: ath9k_calib.c:135
struct net80211_channel * chan
Definition: hw.h:347
u32 channelFlags
Definition: hw.h:350
Definition: calib.h:70
#define NET80211_BAND_2GHZ
The 2.4 GHz ISM band, unlicensed in most countries.
Definition: net80211.h:45
int nfcal_pending
Definition: hw.h:339
int16_t privNF
Definition: calib.h:96
int ath9k_hw_reset_calvalid(struct ath_hw *ah)
Definition: ath9k_calib.c:173
static void ath9k_hw_setup_calibration(struct ath_hw *ah, struct ath9k_cal_list *currCal)
Definition: hw-ops.h:264
#define u32
Definition: vga.h:21
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
Definition: ath9k_calib.c:224
#define AR_PHY_AGC_CONTROL
Definition: reg.h:1909
uint8_t h
Definition: registers.h:18
signed char int8_t
Definition: stdint.h:15
u8 invalidNFcount
Definition: calib.h:97
#define CHANNEL_CW_INT
Definition: ath5k.h:628
int16_t nfCalBuffer[ATH9K_NF_CAL_HIST_MAX]
Definition: calib.h:94
#define NET80211_BAND_5GHZ
The band from 4.9 GHz to 5.7 GHz, which tends to be more restricted.
Definition: net80211.h:47
uint16_t limit
Limit.
Definition: librm.h:250
An 802.11 RF channel.
Definition: net80211.h:385
const struct ath9k_percal_data * calData
Definition: calib.h:88
#define AR_PHY_AGC_CONTROL_NF
Definition: reg.h:1911
int nfcal_interference
Definition: hw.h:340
static struct ath_nf_limits * ath9k_hw_get_nf_limits(struct ath_hw *ah, struct ath9k_channel *chan)
Definition: ath9k_calib.c:50
#define AR_PHY_AGC_CONTROL_ENABLE_NF
Definition: reg.h:1913
#define REG_READ(_ah, _reg)
Definition: hw.h:80
void __asmcall int val
Definition: setjmp.h:28
#define AR5416_MAX_CHAINS
Definition: eeprom.h:159
#define REG_SET_BIT(_a, _r, _f)
Definition: hw.h:107
s16 noisefloor
Definition: hw.h:352
signed int int32_t
Definition: stdint.h:17
#define REG_WRITE(_ah, _reg, _val)
Definition: hw.h:77
static int16_t ath9k_hw_get_nf_hist_mid(int16_t *nfCalBuffer)
Definition: ath9k_calib.c:27
#define NUM_NF_READINGS
Definition: calib.h:30
int ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
Definition: ath9k_calib.c:346
uint8_t ah
Definition: registers.h:85
#define AR_SREV_9160_10_OR_LATER(_ah)
Definition: reg.h:817
static void ath9k_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS])
Definition: hw-ops.h:252
signed short int16_t
Definition: stdint.h:16
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
static s16 ath9k_hw_get_default_nf(struct ath_hw *ah, struct ath9k_channel *chan)
Definition: ath9k_calib.c:63
void ath9k_hw_reset_calibration(struct ath_hw *ah, struct ath9k_cal_list *currCal)
Definition: ath9k_calib.c:153
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
enum ath9k_cal_state calState
Definition: calib.h:89
uint8_t u8
Definition: stdint.h:19
#define ENABLE_REGWRITE_BUFFER(_ah)
Definition: hw.h:89
#define ATH9K_NF_CAL_HIST_MAX
Definition: calib.h:31
#define DBG2(...)
Definition: compiler.h:515
struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]
Definition: hw.h:343
void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah, struct ath9k_channel *chan)
Definition: ath9k_calib.c:384