calib.h File Reference

#include "hw.h"

Go to the source code of this file.

Data Structures
struct	ar5416IniArray
struct	ath9k_percal_data
struct	ath9k_cal_list
struct	ath9k_nfcal_hist
struct	ath9k_pacal_info

Macros
#define	AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT   3
#define	AR_PHY_CCA_FILTERWINDOW_LENGTH   5
#define	NUM_NF_READINGS   6
#define	ATH9K_NF_CAL_HIST_MAX   5
#define	INIT_INI_ARRAY(iniarray, array, rows, columns)
#define	INI_RA(iniarray, row, column)   (((iniarray)->ia_array)[(row) * ((iniarray)->ia_columns) + (column)])
#define	INIT_CAL(_perCal)
#define	INSERT_CAL(_ahp, _perCal)
#define	MIN_CAL_SAMPLES   1
#define	MAX_CAL_SAMPLES   64
#define	INIT_LOG_COUNT   5
#define	PER_MIN_LOG_COUNT   2
#define	PER_MAX_LOG_COUNT   10
#define	MAX_PACAL_SKIPCOUNT   8

Enumerations
enum	ath9k_cal_state { CAL_INACTIVE, CAL_WAITING, CAL_RUNNING, CAL_DONE }

Functions
	FILE_LICENCE (BSD2)
int	ath9k_hw_reset_calvalid (struct ath_hw *ah)
void	ath9k_hw_start_nfcal (struct ath_hw *ah, int update)
void	ath9k_hw_loadnf (struct ath_hw *ah, struct ath9k_channel *chan)
int	ath9k_hw_getnf (struct ath_hw *ah, struct ath9k_channel *chan)
void	ath9k_init_nfcal_hist_buffer (struct ath_hw *ah, struct ath9k_channel *chan)
void	ath9k_hw_reset_calibration (struct ath_hw *ah, struct ath9k_cal_list *currCal)

Macro Definition Documentation

AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT

#define AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT   3

Definition at line 27 of file calib.h.

AR_PHY_CCA_FILTERWINDOW_LENGTH

#define AR_PHY_CCA_FILTERWINDOW_LENGTH   5

Definition at line 28 of file calib.h.

NUM_NF_READINGS

#define NUM_NF_READINGS   6

Definition at line 30 of file calib.h.

ATH9K_NF_CAL_HIST_MAX

#define ATH9K_NF_CAL_HIST_MAX   5

Definition at line 31 of file calib.h.

INIT_INI_ARRAY

#define INIT_INI_ARRAY	(		iniarray,
			array,
			rows,
			columns
	)

Value:

do {    \
                (iniarray)->ia_array = (u32 *)(array);          \
                (iniarray)->ia_rows = (rows);                   \
                (iniarray)->ia_columns = (columns);             \
        } while (0)

Definition at line 39 of file calib.h.

INI_RA

#define INI_RA	(		iniarray,
			row,
			column
	)		(((iniarray)->ia_array)[(row) * ((iniarray)->ia_columns) + (column)])

Definition at line 45 of file calib.h.

INIT_CAL

#define INIT_CAL

(

_perCal

)

Value:

do {                            \
                (_perCal)->calState = CAL_WAITING;      \
                (_perCal)->calNext = NULL;              \
        } while (0)

Definition at line 48 of file calib.h.

INSERT_CAL

#define INSERT_CAL	(		_ahp,
			_perCal
	)

Value:

do {                                                            \
                if ((_ahp)->cal_list_last == NULL) {                    \
                        (_ahp)->cal_list =                              \
                                (_ahp)->cal_list_last = (_perCal);      \
                        ((_ahp)->cal_list_last)->calNext = (_perCal); \
                } else {                                                \
                        ((_ahp)->cal_list_last)->calNext = (_perCal); \
                        (_ahp)->cal_list_last = (_perCal);              \
                        (_perCal)->calNext = (_ahp)->cal_list;  \
                }                                                       \
        } while (0)

Definition at line 53 of file calib.h.

MIN_CAL_SAMPLES

#define MIN_CAL_SAMPLES   1

Definition at line 73 of file calib.h.

MAX_CAL_SAMPLES

#define MAX_CAL_SAMPLES   64

Definition at line 74 of file calib.h.

INIT_LOG_COUNT

#define INIT_LOG_COUNT   5

Definition at line 75 of file calib.h.

PER_MIN_LOG_COUNT

#define PER_MIN_LOG_COUNT   2

Definition at line 76 of file calib.h.

PER_MAX_LOG_COUNT

#define PER_MAX_LOG_COUNT   10

Definition at line 77 of file calib.h.

MAX_PACAL_SKIPCOUNT

#define MAX_PACAL_SKIPCOUNT   8

Definition at line 100 of file calib.h.

Enumeration Type Documentation

ath9k_cal_state

enum ath9k_cal_state

Enumerator
CAL_INACTIVE
CAL_WAITING
CAL_RUNNING
CAL_DONE

Definition at line 66 of file calib.h.

                     {
        CAL_INACTIVE,
        CAL_WAITING,
        CAL_RUNNING,
        CAL_DONE
};

Function Documentation

FILE_LICENCE()

FILE_LICENCE

(

BSD2

)

ath9k_hw_reset_calvalid()

int ath9k_hw_reset_calvalid

(

struct ath_hw *

ah

)

Definition at line 173 of file ath9k_calib.c.

{
        struct ath9k_cal_list *currCal = ah->cal_list_curr;

        if (!ah->caldata)
                return 1;

        if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))
                return 1;

        if (currCal == NULL)
                return 1;

        if (currCal->calState != CAL_DONE) {
                DBG("ath9k: "
                        "Calibration state incorrect, %d\n",
                        currCal->calState);
                return 1;
        }

        if (!(ah->supp_cals & currCal->calData->calType))
                return 1;

        DBG("ath9k: "
                "Resetting Cal %d state for channel %d\n",
                currCal->calData->calType, (ah->dev->channels + ah->dev->channel)->center_freq);

        ah->caldata->CalValid &= ~currCal->calData->calType;
        currCal->calState = CAL_WAITING;

        return 0;
}

References ah, AR_SREV_9100, AR_SREV_9160_10_OR_LATER, CAL_DONE, CAL_WAITING, ath9k_cal_list::calData, ath9k_cal_list::calState, ath9k_percal_data::calType, DBG, and NULL.

Referenced by ath_ani_calibrate().

ath9k_hw_start_nfcal()

void ath9k_hw_start_nfcal	(	struct ath_hw *	ah,
		int	update
	)

Definition at line 206 of file ath9k_calib.c.

{
        if (ah->caldata)
                ah->caldata->nfcal_pending = 1;

        REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
                    AR_PHY_AGC_CONTROL_ENABLE_NF);

        if (update)
                REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
                    AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
        else
                REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
                    AR_PHY_AGC_CONTROL_NO_UPDATE_NF);

        REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
}

References ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF, AR_PHY_AGC_CONTROL_NF, AR_PHY_AGC_CONTROL_NO_UPDATE_NF, REG_CLR_BIT, and REG_SET_BIT.

Referenced by ar9002_hw_calibrate(), ar9002_hw_init_cal(), ar9003_hw_calibrate(), ar9003_hw_init_cal(), and ath9k_hw_reset().

ath9k_hw_loadnf()

void ath9k_hw_loadnf	(	struct ath_hw *	ah,
		struct ath9k_channel *	chan
	)

Definition at line 224 of file ath9k_calib.c.

{
        struct ath9k_nfcal_hist *h = NULL;
        unsigned i, j;
        int32_t val;
        u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
        s16 default_nf = ath9k_hw_get_default_nf(ah, chan);

        if (ah->caldata)
                h = ah->caldata->nfCalHist;

        for (i = 0; i < NUM_NF_READINGS; i++) {
                if (chainmask & (1 << i)) {
                        s16 nfval;

                        if (i >= AR5416_MAX_CHAINS)
                                continue;

                        if (h)
                                nfval = h[i].privNF;
                        else
                                nfval = default_nf;

                        val = REG_READ(ah, ah->nf_regs[i]);
                        val &= 0xFFFFFE00;
                        val |= (((u32) nfval << 1) & 0x1ff);
                        REG_WRITE(ah, ah->nf_regs[i], val);
                }
        }

        /*
         * Load software filtered NF value into baseband internal minCCApwr
         * variable.
         */
        REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
                    AR_PHY_AGC_CONTROL_ENABLE_NF);
        REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
                    AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
        REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);

        /*
         * Wait for load to complete, should be fast, a few 10s of us.
         * The max delay was changed from an original 250us to 10000us
         * since 250us often results in NF load timeout and causes deaf
         * condition during stress testing 12/12/2009
         */
        for (j = 0; j < 10000; j++) {
                if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
                     AR_PHY_AGC_CONTROL_NF) == 0)
                        break;
                udelay(10);
        }

        /*
         * We timed out waiting for the noisefloor to load, probably due to an
         * in-progress rx. Simply return here and allow the load plenty of time
         * to complete before the next calibration interval.  We need to avoid
         * trying to load -50 (which happens below) while the previous load is
         * still in progress as this can cause rx deafness. Instead by returning
         * here, the baseband nf cal will just be capped by our present
         * noisefloor until the next calibration timer.
         */
        if (j == 10000) {
                DBG("ath9k: "
                        "Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
                        REG_READ(ah, AR_PHY_AGC_CONTROL));
                return;
        }

        /*
         * Restore maxCCAPower register parameter again so that we're not capped
         * by the median we just loaded.  This will be initial (and max) value
         * of next noise floor calibration the baseband does.
         */
        ENABLE_REGWRITE_BUFFER(ah);
        for (i = 0; i < NUM_NF_READINGS; i++) {
                if (chainmask & (1 << i)) {
                        if (i >= AR5416_MAX_CHAINS)
                                continue;

                        val = REG_READ(ah, ah->nf_regs[i]);
                        val &= 0xFFFFFE00;
                        val |= (((u32) (-50) << 1) & 0x1ff);
                        REG_WRITE(ah, ah->nf_regs[i], val);
                }
        }
        REGWRITE_BUFFER_FLUSH(ah);
}

References ah, AR5416_MAX_CHAINS, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF, AR_PHY_AGC_CONTROL_NF, AR_PHY_AGC_CONTROL_NO_UPDATE_NF, ath9k_hw_get_default_nf(), DBG, ENABLE_REGWRITE_BUFFER, h, NULL, NUM_NF_READINGS, REG_CLR_BIT, REG_READ, REG_SET_BIT, REG_WRITE, REGWRITE_BUFFER_FLUSH, u32, udelay(), and val.

Referenced by ar9002_hw_calibrate(), ar9003_hw_calibrate(), and ath9k_hw_reset().

ath9k_hw_getnf()

int ath9k_hw_getnf	(	struct ath_hw *	ah,
		struct ath9k_channel *	chan
	)

Definition at line 346 of file ath9k_calib.c.

{
        int16_t nf, nfThresh;
        int16_t nfarray[NUM_NF_READINGS] = { 0 };
        struct ath9k_nfcal_hist *h;
        struct net80211_channel *c = chan->chan;
        struct ath9k_hw_cal_data *caldata = ah->caldata;

        chan->channelFlags &= (~CHANNEL_CW_INT);
        if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
                DBG("ath9k: "
                        "NF did not complete in calibration window\n");
                return 0;
        }

        ath9k_hw_do_getnf(ah, nfarray);
        ath9k_hw_nf_sanitize(ah, nfarray);
        nf = nfarray[0];
        if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
            && nf > nfThresh) {
                DBG2("ath9k: "
                        "noise floor failed detected; detected %d, threshold %d\n",
                        nf, nfThresh);
                chan->channelFlags |= CHANNEL_CW_INT;
        }

        if (!caldata) {
                chan->noisefloor = nf;
                return 0;
        }

        h = caldata->nfCalHist;
        caldata->nfcal_pending = 0;
        ath9k_hw_update_nfcal_hist_buffer(ah, caldata, nfarray);
        chan->noisefloor = h[0].privNF;
        return 1;
}

References ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF, ath9k_hw_do_getnf(), ath9k_hw_get_nf_thresh(), ath9k_hw_nf_sanitize(), ath9k_hw_update_nfcal_hist_buffer(), c, ath9k_channel::chan, CHANNEL_CW_INT, ath9k_channel::channelFlags, DBG, DBG2, h, ath9k_hw_cal_data::nfcal_pending, ath9k_hw_cal_data::nfCalHist, ath9k_channel::noisefloor, NUM_NF_READINGS, and REG_READ.

Referenced by ar9002_hw_calibrate(), ar9003_hw_calibrate(), and ath9k_hw_reset().

ath9k_init_nfcal_hist_buffer()

void ath9k_init_nfcal_hist_buffer	(	struct ath_hw *	ah,
		struct ath9k_channel *	chan
	)

Definition at line 384 of file ath9k_calib.c.

{
        struct ath9k_nfcal_hist *h;
        s16 default_nf;
        int i, j;

        ah->caldata->channel = chan->channel;
        ah->caldata->channelFlags = chan->channelFlags & ~CHANNEL_CW_INT;
        h = ah->caldata->nfCalHist;
        default_nf = ath9k_hw_get_default_nf(ah, chan);
        for (i = 0; i < NUM_NF_READINGS; i++) {
                h[i].currIndex = 0;
                h[i].privNF = default_nf;
                h[i].invalidNFcount = AR_PHY_CCA_FILTERWINDOW_LENGTH;
                for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
                        h[i].nfCalBuffer[j] = default_nf;
                }
        }
}

References ah, AR_PHY_CCA_FILTERWINDOW_LENGTH, ath9k_hw_get_default_nf(), ATH9K_NF_CAL_HIST_MAX, ath9k_channel::channel, CHANNEL_CW_INT, ath9k_channel::channelFlags, h, and NUM_NF_READINGS.

Referenced by ath9k_hw_reset().

ath9k_hw_reset_calibration()

void ath9k_hw_reset_calibration	(	struct ath_hw *	ah,
		struct ath9k_cal_list *	currCal
	)

Definition at line 153 of file ath9k_calib.c.

{
        int i;

        ath9k_hw_setup_calibration(ah, currCal);

        currCal->calState = CAL_RUNNING;

        for (i = 0; i < AR5416_MAX_CHAINS; i++) {
                ah->meas0.sign[i] = 0;
                ah->meas1.sign[i] = 0;
                ah->meas2.sign[i] = 0;
                ah->meas3.sign[i] = 0;
        }

        ah->cal_samples = 0;
}

References ah, AR5416_MAX_CHAINS, ath9k_hw_setup_calibration(), CAL_RUNNING, and ath9k_cal_list::calState.

Referenced by ar9002_hw_calibrate(), ar9002_hw_init_cal(), ar9002_hw_per_calibration(), ar9003_hw_calibrate(), ar9003_hw_init_cal(), and ar9003_hw_per_calibration().