iPXE
Data Structures | Macros | Enumerations | Functions
calib.h File Reference
#include "hw.h"

Go to the source code of this file.

Data Structures

struct  ar5416IniArray
 
struct  ath9k_percal_data
 
struct  ath9k_cal_list
 
struct  ath9k_nfcal_hist
 
struct  ath9k_pacal_info
 

Macros

#define AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT   3
 
#define AR_PHY_CCA_FILTERWINDOW_LENGTH   5
 
#define NUM_NF_READINGS   6
 
#define ATH9K_NF_CAL_HIST_MAX   5
 
#define INIT_INI_ARRAY(iniarray, array, rows, columns)
 
#define INI_RA(iniarray, row, column)   (((iniarray)->ia_array)[(row) * ((iniarray)->ia_columns) + (column)])
 
#define INIT_CAL(_perCal)
 
#define INSERT_CAL(_ahp, _perCal)
 
#define MIN_CAL_SAMPLES   1
 
#define MAX_CAL_SAMPLES   64
 
#define INIT_LOG_COUNT   5
 
#define PER_MIN_LOG_COUNT   2
 
#define PER_MAX_LOG_COUNT   10
 
#define MAX_PACAL_SKIPCOUNT   8
 

Enumerations

enum  ath9k_cal_state { CAL_INACTIVE, CAL_WAITING, CAL_RUNNING, CAL_DONE }
 

Functions

 FILE_LICENCE (BSD2)
 
 FILE_SECBOOT (FORBIDDEN)
 
int ath9k_hw_reset_calvalid (struct ath_hw *ah)
 
void ath9k_hw_start_nfcal (struct ath_hw *ah, int update)
 
void ath9k_hw_loadnf (struct ath_hw *ah, struct ath9k_channel *chan)
 
int ath9k_hw_getnf (struct ath_hw *ah, struct ath9k_channel *chan)
 
void ath9k_init_nfcal_hist_buffer (struct ath_hw *ah, struct ath9k_channel *chan)
 
void ath9k_hw_reset_calibration (struct ath_hw *ah, struct ath9k_cal_list *currCal)
 

Macro Definition Documentation

◆ AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT

#define AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT   3

Definition at line 28 of file calib.h.

◆ AR_PHY_CCA_FILTERWINDOW_LENGTH

#define AR_PHY_CCA_FILTERWINDOW_LENGTH   5

Definition at line 29 of file calib.h.

◆ NUM_NF_READINGS

#define NUM_NF_READINGS   6

Definition at line 31 of file calib.h.

◆ ATH9K_NF_CAL_HIST_MAX

#define ATH9K_NF_CAL_HIST_MAX   5

Definition at line 32 of file calib.h.

◆ INIT_INI_ARRAY

#define INIT_INI_ARRAY (   iniarray,
  array,
  rows,
  columns 
)
Value:
do { \
(iniarray)->ia_array = (u32 *)(array); \
(iniarray)->ia_rows = (rows); \
(iniarray)->ia_columns = (columns); \
} while (0)
uint32_t array
Array number.
Definition: edd.h:31
uint32_t u32
Definition: stdint.h:24

Definition at line 40 of file calib.h.

◆ INI_RA

#define INI_RA (   iniarray,
  row,
  column 
)    (((iniarray)->ia_array)[(row) * ((iniarray)->ia_columns) + (column)])

Definition at line 46 of file calib.h.

◆ INIT_CAL

#define INIT_CAL (   _perCal)
Value:
do { \
(_perCal)->calState = CAL_WAITING; \
(_perCal)->calNext = NULL; \
} while (0)
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322

Definition at line 49 of file calib.h.

◆ INSERT_CAL

#define INSERT_CAL (   _ahp,
  _perCal 
)
Value:
do { \
if ((_ahp)->cal_list_last == NULL) { \
(_ahp)->cal_list = \
(_ahp)->cal_list_last = (_perCal); \
((_ahp)->cal_list_last)->calNext = (_perCal); \
} else { \
((_ahp)->cal_list_last)->calNext = (_perCal); \
(_ahp)->cal_list_last = (_perCal); \
(_perCal)->calNext = (_ahp)->cal_list; \
} \
} while (0)
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322

Definition at line 54 of file calib.h.

◆ MIN_CAL_SAMPLES

#define MIN_CAL_SAMPLES   1

Definition at line 74 of file calib.h.

◆ MAX_CAL_SAMPLES

#define MAX_CAL_SAMPLES   64

Definition at line 75 of file calib.h.

◆ INIT_LOG_COUNT

#define INIT_LOG_COUNT   5

Definition at line 76 of file calib.h.

◆ PER_MIN_LOG_COUNT

#define PER_MIN_LOG_COUNT   2

Definition at line 77 of file calib.h.

◆ PER_MAX_LOG_COUNT

#define PER_MAX_LOG_COUNT   10

Definition at line 78 of file calib.h.

◆ MAX_PACAL_SKIPCOUNT

#define MAX_PACAL_SKIPCOUNT   8

Definition at line 101 of file calib.h.

Enumeration Type Documentation

◆ ath9k_cal_state

Enumerator
CAL_INACTIVE 
CAL_WAITING 
CAL_RUNNING 
CAL_DONE 

Definition at line 67 of file calib.h.

67  {
71  CAL_DONE
72 };
Definition: calib.h:71

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( BSD2  )

◆ FILE_SECBOOT()

FILE_SECBOOT ( FORBIDDEN  )

◆ ath9k_hw_reset_calvalid()

int ath9k_hw_reset_calvalid ( struct ath_hw ah)

Definition at line 175 of file ath9k_calib.c.

176 {
177  struct ath9k_cal_list *currCal = ah->cal_list_curr;
178 
179  if (!ah->caldata)
180  return 1;
181 
183  return 1;
184 
185  if (currCal == NULL)
186  return 1;
187 
188  if (currCal->calState != CAL_DONE) {
189  DBG("ath9k: "
190  "Calibration state incorrect, %d\n",
191  currCal->calState);
192  return 1;
193  }
194 
195  if (!(ah->supp_cals & currCal->calData->calType))
196  return 1;
197 
198  DBG("ath9k: "
199  "Resetting Cal %d state for channel %d\n",
200  currCal->calData->calType, (ah->dev->channels + ah->dev->channel)->center_freq);
201 
202  ah->caldata->CalValid &= ~currCal->calData->calType;
203  currCal->calState = CAL_WAITING;
204 
205  return 0;
206 }
#define AR_SREV_9100(ah)
Definition: reg.h:811
Definition: calib.h:71
const struct ath9k_percal_data * calData
Definition: calib.h:89
uint8_t ah
Definition: registers.h:85
#define AR_SREV_9160_10_OR_LATER(_ah)
Definition: reg.h:818
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
enum ath9k_cal_state calState
Definition: calib.h:90

References ah, AR_SREV_9100, AR_SREV_9160_10_OR_LATER, CAL_DONE, CAL_WAITING, ath9k_cal_list::calData, ath9k_cal_list::calState, ath9k_percal_data::calType, DBG, and NULL.

Referenced by ath_ani_calibrate().

◆ ath9k_hw_start_nfcal()

void ath9k_hw_start_nfcal ( struct ath_hw ah,
int  update 
)

Definition at line 208 of file ath9k_calib.c.

209 {
210  if (ah->caldata)
211  ah->caldata->nfcal_pending = 1;
212 
215 
216  if (update)
219  else
222 
224 }
#define REG_CLR_BIT(_a, _r, _f)
Definition: hw.h:110
#define AR_PHY_AGC_CONTROL_NO_UPDATE_NF
Definition: reg.h:1916
#define AR_PHY_AGC_CONTROL
Definition: reg.h:1910
#define AR_PHY_AGC_CONTROL_NF
Definition: reg.h:1912
#define AR_PHY_AGC_CONTROL_ENABLE_NF
Definition: reg.h:1914
#define REG_SET_BIT(_a, _r, _f)
Definition: hw.h:108
uint8_t ah
Definition: registers.h:85

References ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF, AR_PHY_AGC_CONTROL_NF, AR_PHY_AGC_CONTROL_NO_UPDATE_NF, REG_CLR_BIT, and REG_SET_BIT.

Referenced by ar9002_hw_calibrate(), ar9002_hw_init_cal(), ar9003_hw_calibrate(), ar9003_hw_init_cal(), and ath9k_hw_reset().

◆ ath9k_hw_loadnf()

void ath9k_hw_loadnf ( struct ath_hw ah,
struct ath9k_channel chan 
)

Definition at line 226 of file ath9k_calib.c.

227 {
228  struct ath9k_nfcal_hist *h = NULL;
229  unsigned i, j;
230  int32_t val;
231  u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
232  s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
233 
234  if (ah->caldata)
235  h = ah->caldata->nfCalHist;
236 
237  for (i = 0; i < NUM_NF_READINGS; i++) {
238  if (chainmask & (1 << i)) {
239  s16 nfval;
240 
241  if (i >= AR5416_MAX_CHAINS)
242  continue;
243 
244  if (h)
245  nfval = h[i].privNF;
246  else
247  nfval = default_nf;
248 
249  val = REG_READ(ah, ah->nf_regs[i]);
250  val &= 0xFFFFFE00;
251  val |= (((u32) nfval << 1) & 0x1ff);
252  REG_WRITE(ah, ah->nf_regs[i], val);
253  }
254  }
255 
256  /*
257  * Load software filtered NF value into baseband internal minCCApwr
258  * variable.
259  */
265 
266  /*
267  * Wait for load to complete, should be fast, a few 10s of us.
268  * The max delay was changed from an original 250us to 10000us
269  * since 250us often results in NF load timeout and causes deaf
270  * condition during stress testing 12/12/2009
271  */
272  for (j = 0; j < 10000; j++) {
274  AR_PHY_AGC_CONTROL_NF) == 0)
275  break;
276  udelay(10);
277  }
278 
279  /*
280  * We timed out waiting for the noisefloor to load, probably due to an
281  * in-progress rx. Simply return here and allow the load plenty of time
282  * to complete before the next calibration interval. We need to avoid
283  * trying to load -50 (which happens below) while the previous load is
284  * still in progress as this can cause rx deafness. Instead by returning
285  * here, the baseband nf cal will just be capped by our present
286  * noisefloor until the next calibration timer.
287  */
288  if (j == 10000) {
289  DBG("ath9k: "
290  "Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
292  return;
293  }
294 
295  /*
296  * Restore maxCCAPower register parameter again so that we're not capped
297  * by the median we just loaded. This will be initial (and max) value
298  * of next noise floor calibration the baseband does.
299  */
301  for (i = 0; i < NUM_NF_READINGS; i++) {
302  if (chainmask & (1 << i)) {
303  if (i >= AR5416_MAX_CHAINS)
304  continue;
305 
306  val = REG_READ(ah, ah->nf_regs[i]);
307  val &= 0xFFFFFE00;
308  val |= (((u32) (-50) << 1) & 0x1ff);
309  REG_WRITE(ah, ah->nf_regs[i], val);
310  }
311  }
313 }
int16_t s16
Definition: stdint.h:21
void __asmcall int val
Definition: setjmp.h:12
#define REG_CLR_BIT(_a, _r, _f)
Definition: hw.h:110
#define AR_PHY_AGC_CONTROL_NO_UPDATE_NF
Definition: reg.h:1916
#define REGWRITE_BUFFER_FLUSH(_ah)
Definition: hw.h:96
#define u32
Definition: vga.h:21
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:61
#define AR_PHY_AGC_CONTROL
Definition: reg.h:1910
uint8_t h
Definition: registers.h:18
#define AR_PHY_AGC_CONTROL_NF
Definition: reg.h:1912
#define AR_PHY_AGC_CONTROL_ENABLE_NF
Definition: reg.h:1914
#define REG_READ(_ah, _reg)
Definition: hw.h:81
#define AR5416_MAX_CHAINS
Definition: eeprom.h:160
#define REG_SET_BIT(_a, _r, _f)
Definition: hw.h:108
signed int int32_t
Definition: stdint.h:17
#define REG_WRITE(_ah, _reg, _val)
Definition: hw.h:78
#define NUM_NF_READINGS
Definition: calib.h:31
uint8_t ah
Definition: registers.h:85
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
static s16 ath9k_hw_get_default_nf(struct ath_hw *ah, struct ath9k_channel *chan)
Definition: ath9k_calib.c:65
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
uint8_t u8
Definition: stdint.h:20
#define ENABLE_REGWRITE_BUFFER(_ah)
Definition: hw.h:90

References ah, AR5416_MAX_CHAINS, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF, AR_PHY_AGC_CONTROL_NF, AR_PHY_AGC_CONTROL_NO_UPDATE_NF, ath9k_hw_get_default_nf(), DBG, ENABLE_REGWRITE_BUFFER, h, NULL, NUM_NF_READINGS, REG_CLR_BIT, REG_READ, REG_SET_BIT, REG_WRITE, REGWRITE_BUFFER_FLUSH, u32, udelay(), and val.

Referenced by ar9002_hw_calibrate(), ar9003_hw_calibrate(), and ath9k_hw_reset().

◆ ath9k_hw_getnf()

int ath9k_hw_getnf ( struct ath_hw ah,
struct ath9k_channel chan 
)

Definition at line 348 of file ath9k_calib.c.

349 {
350  int16_t nf, nfThresh;
351  int16_t nfarray[NUM_NF_READINGS] = { 0 };
352  struct ath9k_nfcal_hist *h;
353  struct net80211_channel *c = chan->chan;
354  struct ath9k_hw_cal_data *caldata = ah->caldata;
355 
356  chan->channelFlags &= (~CHANNEL_CW_INT);
358  DBG("ath9k: "
359  "NF did not complete in calibration window\n");
360  return 0;
361  }
362 
363  ath9k_hw_do_getnf(ah, nfarray);
364  ath9k_hw_nf_sanitize(ah, nfarray);
365  nf = nfarray[0];
366  if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
367  && nf > nfThresh) {
368  DBG2("ath9k: "
369  "noise floor failed detected; detected %d, threshold %d\n",
370  nf, nfThresh);
371  chan->channelFlags |= CHANNEL_CW_INT;
372  }
373 
374  if (!caldata) {
375  chan->noisefloor = nf;
376  return 0;
377  }
378 
379  h = caldata->nfCalHist;
380  caldata->nfcal_pending = 0;
381  ath9k_hw_update_nfcal_hist_buffer(ah, caldata, nfarray);
382  chan->noisefloor = h[0].privNF;
383  return 1;
384 }
static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
Definition: ath9k_calib.c:316
static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah, struct ath9k_hw_cal_data *cal, int16_t *nfarray)
Definition: ath9k_calib.c:72
static int ath9k_hw_get_nf_thresh(struct ath_hw *ah, int band, int16_t *nft)
Definition: ath9k_calib.c:137
struct net80211_channel * chan
Definition: hw.h:348
u32 channelFlags
Definition: hw.h:351
int nfcal_pending
Definition: hw.h:340
#define AR_PHY_AGC_CONTROL
Definition: reg.h:1910
uint8_t h
Definition: registers.h:18
#define CHANNEL_CW_INT
Definition: ath5k.h:630
u8 band
The band with which this channel is associated.
Definition: net80211.h:388
An 802.11 RF channel.
Definition: net80211.h:385
#define AR_PHY_AGC_CONTROL_NF
Definition: reg.h:1912
#define REG_READ(_ah, _reg)
Definition: hw.h:81
s16 noisefloor
Definition: hw.h:353
#define NUM_NF_READINGS
Definition: calib.h:31
uint8_t ah
Definition: registers.h:85
static void ath9k_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS])
Definition: hw-ops.h:253
signed short int16_t
Definition: stdint.h:16
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
#define DBG2(...)
Definition: compiler.h:515
struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]
Definition: hw.h:344

References ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF, ath9k_hw_do_getnf(), ath9k_hw_get_nf_thresh(), ath9k_hw_nf_sanitize(), ath9k_hw_update_nfcal_hist_buffer(), net80211_channel::band, ath9k_channel::chan, CHANNEL_CW_INT, ath9k_channel::channelFlags, DBG, DBG2, h, ath9k_hw_cal_data::nfcal_pending, ath9k_hw_cal_data::nfCalHist, ath9k_channel::noisefloor, NUM_NF_READINGS, and REG_READ.

Referenced by ar9002_hw_calibrate(), ar9003_hw_calibrate(), and ath9k_hw_reset().

◆ ath9k_init_nfcal_hist_buffer()

void ath9k_init_nfcal_hist_buffer ( struct ath_hw ah,
struct ath9k_channel chan 
)

Definition at line 386 of file ath9k_calib.c.

388 {
389  struct ath9k_nfcal_hist *h;
390  s16 default_nf;
391  int i, j;
392 
393  ah->caldata->channel = chan->channel;
394  ah->caldata->channelFlags = chan->channelFlags & ~CHANNEL_CW_INT;
395  h = ah->caldata->nfCalHist;
396  default_nf = ath9k_hw_get_default_nf(ah, chan);
397  for (i = 0; i < NUM_NF_READINGS; i++) {
398  h[i].currIndex = 0;
399  h[i].privNF = default_nf;
400  h[i].invalidNFcount = AR_PHY_CCA_FILTERWINDOW_LENGTH;
401  for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
402  h[i].nfCalBuffer[j] = default_nf;
403  }
404  }
405 }
u16 channel
Definition: hw.h:350
int16_t s16
Definition: stdint.h:21
#define AR_PHY_CCA_FILTERWINDOW_LENGTH
Definition: calib.h:29
u32 channelFlags
Definition: hw.h:351
uint8_t h
Definition: registers.h:18
#define CHANNEL_CW_INT
Definition: ath5k.h:630
#define NUM_NF_READINGS
Definition: calib.h:31
uint8_t ah
Definition: registers.h:85
static s16 ath9k_hw_get_default_nf(struct ath_hw *ah, struct ath9k_channel *chan)
Definition: ath9k_calib.c:65
#define ATH9K_NF_CAL_HIST_MAX
Definition: calib.h:32

References ah, AR_PHY_CCA_FILTERWINDOW_LENGTH, ath9k_hw_get_default_nf(), ATH9K_NF_CAL_HIST_MAX, ath9k_channel::channel, CHANNEL_CW_INT, ath9k_channel::channelFlags, h, and NUM_NF_READINGS.

Referenced by ath9k_hw_reset().

◆ ath9k_hw_reset_calibration()

void ath9k_hw_reset_calibration ( struct ath_hw ah,
struct ath9k_cal_list currCal 
)

Definition at line 155 of file ath9k_calib.c.

157 {
158  int i;
159 
160  ath9k_hw_setup_calibration(ah, currCal);
161 
162  currCal->calState = CAL_RUNNING;
163 
164  for (i = 0; i < AR5416_MAX_CHAINS; i++) {
165  ah->meas0.sign[i] = 0;
166  ah->meas1.sign[i] = 0;
167  ah->meas2.sign[i] = 0;
168  ah->meas3.sign[i] = 0;
169  }
170 
171  ah->cal_samples = 0;
172 }
static void ath9k_hw_setup_calibration(struct ath_hw *ah, struct ath9k_cal_list *currCal)
Definition: hw-ops.h:265
#define AR5416_MAX_CHAINS
Definition: eeprom.h:160
uint8_t ah
Definition: registers.h:85
enum ath9k_cal_state calState
Definition: calib.h:90

References ah, AR5416_MAX_CHAINS, ath9k_hw_setup_calibration(), CAL_RUNNING, and ath9k_cal_list::calState.

Referenced by ar9002_hw_calibrate(), ar9002_hw_init_cal(), ar9002_hw_per_calibration(), ar9003_hw_calibrate(), ar9003_hw_init_cal(), and ar9003_hw_per_calibration().