iPXE
pcnet32.c
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2010 Andrei Faur <da3drus@gmail.com>
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of the
7  * License, or any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17  * 02110-1301, USA.
18  *
19  */
20 
21 FILE_LICENCE ( GPL2_OR_LATER );
22 
23 #include <stdint.h>
24 #include <stdio.h>
25 #include <stdlib.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <assert.h>
29 #include <byteswap.h>
30 #include <errno.h>
31 #include <ipxe/ethernet.h>
32 #include <ipxe/if_ether.h>
33 #include <ipxe/io.h>
34 #include <ipxe/iobuf.h>
35 #include <ipxe/malloc.h>
36 #include <ipxe/netdevice.h>
37 #include <ipxe/pci.h>
38 #include <ipxe/timer.h>
39 #include <mii.h>
40 #include "pcnet32.h"
41 
42 static u16 pcnet32_wio_read_csr ( unsigned long addr, int index )
43 {
45  return inw ( addr + PCNET32_WIO_RDP );
46 }
47 
48 static void pcnet32_wio_write_csr ( unsigned long addr, int index, u16 val )
49 {
52 }
53 
54 static u16 pcnet32_wio_read_bcr ( unsigned long addr, int index )
55 {
57  return inw ( addr + PCNET32_WIO_BDP );
58 }
59 
60 static void pcnet32_wio_write_bcr ( unsigned long addr, int index, u16 val )
61 {
64 }
65 
66 static u16 pcnet32_wio_read_rap ( unsigned long addr )
67 {
68  return inw ( addr + PCNET32_WIO_RAP );
69 }
70 
71 static void pcnet32_wio_write_rap ( unsigned long addr , u16 val )
72 {
74 }
75 
76 static void pcnet32_wio_reset ( unsigned long addr )
77 {
79 }
80 
81 static int pcnet32_wio_check ( unsigned long addr )
82 {
83  outw ( 88, addr + PCNET32_WIO_RAP );
84  return ( inw ( addr + PCNET32_WIO_RAP ) == 88 );
85 }
86 
87 static struct pcnet32_access pcnet32_wio = {
89  .write_csr = pcnet32_wio_write_csr,
90  .read_bcr = pcnet32_wio_read_bcr,
91  .write_bcr = pcnet32_wio_write_bcr,
92  .read_rap = pcnet32_wio_read_rap,
93  .write_rap = pcnet32_wio_write_rap,
94  .reset = pcnet32_wio_reset,
95 };
96 
97 static u16 pcnet32_dwio_read_csr ( unsigned long addr, int index )
98 {
100  return ( inl ( addr + PCNET32_DWIO_RDP ) & 0xffff );
101 }
102 
103 static void pcnet32_dwio_write_csr ( unsigned long addr, int index, u16 val )
104 {
106  outl ( val, addr + PCNET32_DWIO_RDP );
107 }
108 
109 static u16 pcnet32_dwio_read_bcr ( unsigned long addr, int index )
110 {
112  return ( inl ( addr + PCNET32_DWIO_BDP ) & 0xffff );
113 }
114 
115 static void pcnet32_dwio_write_bcr ( unsigned long addr, int index, u16 val )
116 {
118  outl ( val, addr + PCNET32_DWIO_BDP );
119 }
120 
121 static u16 pcnet32_dwio_read_rap ( unsigned long addr )
122 {
123  return ( inl ( addr + PCNET32_DWIO_RAP ) & 0xffff );
124 }
125 
126 static void pcnet32_dwio_write_rap ( unsigned long addr , u16 val )
127 {
128  outl ( val, addr + PCNET32_DWIO_RAP );
129 }
130 
131 static void pcnet32_dwio_reset ( unsigned long addr )
132 {
134 }
135 
136 static int pcnet32_dwio_check ( unsigned long addr )
137 {
138  outl ( 88, addr + PCNET32_DWIO_RAP );
139  return ( ( inl ( addr + PCNET32_DWIO_RAP ) & 0xffff ) == 88 );
140 }
141 
142 
143 static struct pcnet32_access pcnet32_dwio = {
145  .write_csr = pcnet32_dwio_write_csr,
146  .read_bcr = pcnet32_dwio_read_bcr,
147  .write_bcr = pcnet32_dwio_write_bcr,
148  .read_rap = pcnet32_dwio_read_rap,
149  .write_rap = pcnet32_dwio_write_rap,
150  .reset = pcnet32_dwio_reset,
151 };
152 
153 static int
154 pcnet32_mdio_read ( struct net_device *netdev, int phy, int reg )
155 {
156  struct pcnet32_private *priv = netdev->priv;
157  unsigned long ioaddr = priv->pci_dev->ioaddr;
158  u16 val_out;
159 
160  if ( ! priv->mii )
161  return 0;
162 
163  /* First, select PHY chip and the register we want to read */
164  priv->a->write_bcr ( ioaddr, 33,
165  ( ( phy & 0x1f ) << 5 ) | ( reg & 0x1f ) );
166 
167  /* Read the selected register's value */
168  val_out = priv->a->read_bcr ( ioaddr, 34 );
169 
170  return val_out;
171 }
172 
173 static void
174 __unused pcnet32_mdio_write ( struct net_device *netdev, int phy, int reg, int val )
175 {
176  struct pcnet32_private *priv = netdev->priv;
177  unsigned long ioaddr = priv->pci_dev->ioaddr;
178 
179  if ( ! priv->mii )
180  return;
181 
182  /* First, select PHY chip and the register we want to write to */
183  priv->a->write_bcr ( ioaddr, 33,
184  ( ( phy & 0x1f ) << 5 ) | ( reg & 0x1f ) );
185 
186  /* Write val to the selected register */
187  priv->a->write_bcr ( ioaddr, 34, val );
188 }
189 
190 
191 /**
192  * pcnet32_refill_rx_ring - Allocates iobufs for every Rx descriptor
193  * that doesn't have one and isn't in use by the hardware
194  *
195  * @v priv Driver private structure
196  */
197 static void
199 {
200  struct pcnet32_rx_desc *rx_curr_desc;
201  u16 status;
202  int i;
203 
204  DBGP ( "pcnet32_refill_rx_ring\n" );
205 
206  for ( i = 0; i < RX_RING_SIZE; i++ ) {
207  rx_curr_desc = priv->rx_base + i;
208 
209  status = le16_to_cpu ( rx_curr_desc->status );
210 
211  /* Don't touch descriptors owned by the hardware */
212  if ( status & DescOwn )
213  continue;
214 
215  /* Descriptors with iobufs still need to be processed */
216  if ( priv->rx_iobuf[i] != NULL )
217  continue;
218 
219  /* If alloc_iob fails, try again later (next poll) */
220  if ( ! ( priv->rx_iobuf[i] = alloc_iob ( PKT_BUF_SIZE ) ) ) {
221  DBG ( "Refill rx ring failed\n" );
222  break;
223  }
224 
225  rx_curr_desc->base =
226  cpu_to_le32 ( virt_to_bus ( priv->rx_iobuf[i]->data ) );
227  rx_curr_desc->buf_length = cpu_to_le16 ( -PKT_BUF_SIZE );
228  rx_curr_desc->msg_length = rx_curr_desc->reserved = 0;
229 
230  /* Owner changes after the other status fields are set */
231  wmb();
232  rx_curr_desc->status = cpu_to_le16 ( DescOwn );
233  }
234 
235 }
236 
237 /**
238  * pcnet32_setup_rx_resources - allocate Rx resources (Descriptors)
239  *
240  * @v priv Driver private structure
241  *
242  * @ret rc Returns 0 on success, negative on failure
243  */
244 static int
246 {
247  DBGP ( "pcnet32_setup_rx_resources\n" );
248 
250 
251  DBG ( "priv->rx_base = %#08lx\n", virt_to_bus ( priv->rx_base ) );
252 
253  if ( ! priv->rx_base ) {
254  return -ENOMEM;
255  }
256 
257  memset ( priv->rx_base, 0, RX_RING_BYTES );
258 
260 
261  priv->rx_curr = 0;
262 
263  return 0;
264 }
265 
266 static void
268 {
269  int i;
270 
271  DBGP ( "pcnet32_free_rx_resources\n" );
272 
273  free_phys ( priv->rx_base, RX_RING_BYTES );
274 
275  for ( i = 0; i < RX_RING_SIZE; i++ ) {
276  free_iob ( priv->rx_iobuf[i] );
277  priv->rx_iobuf[i] = NULL;
278  }
279 }
280 
281 /**
282  * pcnet32_setup_tx_resources - allocate Tx resources (Descriptors)
283  *
284  * @v priv Driver private structure
285  *
286  * @ret rc Returns 0 on success, negative on failure
287  */
288 static int
290 {
291  DBGP ( "pcnet32_setup_tx_resources\n" );
292 
294 
295  if ( ! priv->tx_base ) {
296  return -ENOMEM;
297  }
298 
299  memset ( priv->tx_base, 0, TX_RING_BYTES );
300 
301  DBG ( "priv->tx_base = %#08lx\n", virt_to_bus ( priv->tx_base ) );
302 
303  priv->tx_curr = 0;
304  priv->tx_fill_ctr = 0;
305  priv->tx_tail = 0;
306 
307  return 0;
308 }
309 
310 static void
312 {
313  DBGP ( "pcnet32_free_tx_resources\n" );
314 
315  free_phys ( priv->tx_base, TX_RING_BYTES );
316 }
317 
318 static int
320 {
321  int fdx, mii, fset;
322  int media;
323  int rc;
324  unsigned long ioaddr;
325  struct pcnet32_access *a;
326  int chip_version;
327  char *chipname;
328 
329  ioaddr = priv->pci_dev->ioaddr;
330  a = priv->a;
331 
332  chip_version = a->read_csr ( ioaddr, 88 )
333  | ( a->read_csr ( ioaddr, 89 ) << 16 );
334 
335  rc = -ENODEV;
336 
337  DBG ( "PCnet chip version is 0x%X\n", chip_version );
338  if ( ( chip_version & 0xfff ) != 0x003 )
339  goto err_unsupported;
340 
341  fdx = mii = fset = 0;
342  chip_version = ( chip_version >> 12 ) & 0xffff;
343 
344  switch (chip_version) {
345  case 0x2420:
346  chipname = "PCnet/PCI 79C970";
347  break;
348  case 0x2430:
349  /* 970 gives the wrong chip id back */
350  chipname = "PCnet/PCI 79C970";
351  break;
352  case 0x2621:
353  chipname = "PCnet/PCI II 79C970A";
354  fdx = 1;
355  break;
356  case 0x2623:
357  chipname = "PCnet/FAST 79C971";
358  fdx = 1;
359  mii = 1;
360  fset = 1;
361  break;
362  case 0x2624:
363  chipname = "PCnet/FAST+ 79C972";
364  fdx = 1;
365  mii = 1;
366  fset = 1;
367  break;
368  case 0x2625:
369  chipname = "PCnet/FAST III 79C973";
370  fdx = 1;
371  mii = 1;
372  break;
373  case 0x2626:
374  chipname = "PCnet/Home 79C978";
375  fdx = 1;
376  /*
377  * This is based on specs published at www.amd.com. This section
378  * assumes that a NIC with a 79C978 wants to go into 1Mb HomePNA
379  * mode. The 79C978 can also go into standard ethernet, and
380  * there probably should be some sort of module option to select
381  * the mode by which the card should operate
382  */
383  /* switch to home wiring mode */
384  media = a->read_bcr(ioaddr, 49);
385 
386  DBG ( "media reset to %#x.\n", media );
387  a->write_bcr(ioaddr, 49, media);
388  break;
389  case 0x2627:
390  chipname = "PCnet/FAST III 79C975";
391  fdx = 1;
392  mii = 1;
393  break;
394  case 0x2628:
395  chipname = "PCnet/PRO 79C976";
396  fdx = 1;
397  mii = 1;
398  break;
399  default:
400  chipname = "UNKNOWN";
401  DBG ( "PCnet version %#x, no PCnet32 chip.\n", chip_version );
402  goto err_unsupported;
403  }
404 
405  DBG ( "PCnet chipname %s\n", chipname );
406 
407  /*
408  * On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
409  * starting until the packet is loaded. Strike one for reliability, lose
410  * one for latency - although on PCI this isn't a big loss. Older chips
411  * have FIFO's smaller than a packet, so you can't do this.
412  * Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
413  */
414  if (fset) {
415  a->write_bcr ( ioaddr, 18,
416  ( a->read_bcr ( ioaddr, 18 ) | 0x0860 ) );
417  a->write_csr ( ioaddr, 80, 0x0c00 );
418  }
419 
420  priv->full_duplex = fdx;
421  priv->mii = mii;
422 
423  return 0;
424 
425 err_unsupported:
426  return rc;
427 }
428 
429 /**
430  * pcnet32_set_ops - Determines the ops used to access the registers
431  *
432  * @v priv Driver private structure
433  *
434  * @ret rc Returns 0 on success, negative on failure
435  */
436 static int
438 {
439  int rc;
440  unsigned long ioaddr;
441 
442  ioaddr = priv->pci_dev->ioaddr;
443 
444  /* Check if CSR0 has its default value and perform a write / read
445  in the RAP register to see if it works. Based on these results
446  determine what mode the NIC is in (WIO / DWIO)
447  */
448  rc = -ENODEV;
449 
450  if ( pcnet32_wio_read_csr ( ioaddr, 0 ) == 4 &&
451  pcnet32_wio_check ( ioaddr ) ) {
452  priv->a = &pcnet32_wio;
453  } else {
455  if ( pcnet32_dwio_read_csr ( ioaddr, 0 ) == 4 &&
456  pcnet32_dwio_check ( ioaddr ) ) {
457  priv->a = &pcnet32_dwio;
458  } else {
459  goto err_unsupported;
460  }
461  }
462 
463  return 0;
464 
465 err_unsupported:
466  return rc;
467 }
468 
469 /**
470  * pcnet32_setup_init_block - setup the NICs initialization block
471  *
472  * @v priv Driver private structure
473  *
474  * @ret rc Returns 0 on success, negative on failure
475  */
476 static void
478 {
479  int i;
480 
481  /* Configure the network port based on what we've established so far */
482  priv->init_block.mode =
483  cpu_to_le16 ( ( priv->options & PCNET32_PORT_PORTSEL ) << 7 );
484 
485  /* Setup RLEN and TLEN fields */
486  priv->init_block.tlen_rlen =
488  ( PCNET32_LOG_TX_BUFFERS << 12 ) );
489 
490  /* Fill in physical address */
491  for ( i = 0; i < ETH_ALEN; i++)
492  priv->init_block.phys_addr[i] = priv->netdev->hw_addr[i];
493 
494  /* No multicasting scheme, accept everything */
495  priv->init_block.filter[0] = 0xffffffff;
496  priv->init_block.filter[1] = 0xffffffff;
497 
498  priv->init_block.rx_ring =
499  cpu_to_le32 ( virt_to_bus ( priv->rx_base ) );
500  priv->init_block.tx_ring =
501  cpu_to_le32 ( virt_to_bus ( priv->tx_base ) );
502 
503  /* Make sure all changes are visible */
504  wmb();
505 }
506 
507 /**
508  * pcnet32_setup_probe_phy - go through all PHYs and see which one is present
509  *
510  * @v priv Driver private structure
511  */
512 static void
514 {
515  unsigned long ioaddr = priv->pci_dev->ioaddr;
516  unsigned int phycount = 0;
517  int phy_id;
518  int i;
519 
520  if ( priv->mii ) {
521  phy_id = ( ( priv->a->read_bcr ( ioaddr, 33 ) ) >> 5 ) & 0x1f;
522  for ( i = 0; i < PCNET32_MAX_PHYS; i++ ) {
523  unsigned short id1, id2;
524  id1 = pcnet32_mdio_read ( priv->netdev, i, MII_PHYSID1 );
525  if ( id1 == 0xffff )
526  continue;
527  id2 = pcnet32_mdio_read ( priv->netdev, i, MII_PHYSID2 );
528  if ( id2 == 0xffff )
529  continue;
530  if ( i == 31 && ( ( priv->chip_version + 1 ) & 0xfffe ) == 0x2624 )
531  continue;
532 
533  phycount++;
534  phy_id = i;
535  }
536  priv->a->write_bcr ( ioaddr, 33, phy_id << 5 );
537  if ( phycount > 1 )
538  priv->options |= PCNET32_PORT_MII;
539  }
540 }
541 
542 /**
543  * pcnet32_setup_mac_addr - check for inconsistency between CSR12-14
544  * and PROM addresses
545  *
546  * @v priv Driver private structure
547  */
548 static int
550 {
551  int i;
552  u8 promaddr[ETH_ALEN];
553  unsigned long ioaddr = priv->pci_dev->ioaddr;
554 
555  /* In most chips, after a chip reset, the ethernet address is read from
556  * the station address PROM at the base address and programmed into the
557  * "Physical Address Registers" CSR12-14.
558  * As a precautionary measure, we read the PROM values and complain if
559  * they disagree with the CSRs. If they miscompare, and the PROM addr
560  * is valid, then the PROM addr is used.
561  */
562  for ( i = 0; i < 3; i++ ) {
563  unsigned int val;
564  val = priv->a->read_csr ( ioaddr, i + 12 ) & 0x0ffff;
565  /* There may be endianness issues here. */
566  priv->netdev->hw_addr[2 * i] = val & 0x0ff;
567  priv->netdev->hw_addr[2 * i + 1] = ( val >> 8 ) & 0x0ff;
568  }
569 
570  for ( i = 0; i < ETH_ALEN; i++ )
571  promaddr[i] = inb ( ioaddr + i );
572 
573  if ( memcmp ( promaddr, priv->netdev->hw_addr, ETH_ALEN ) ||
574  ! is_valid_ether_addr ( priv->netdev->hw_addr ) ) {
575  if ( is_valid_ether_addr ( promaddr ) ) {
576  DBG ( "CSR address is invalid, using PROM addr\n" );
577  memcpy ( priv->netdev->hw_addr, promaddr, ETH_ALEN );
578  }
579  }
580 
581  /* If ethernet address is not valid, return error */
582  if ( ! is_valid_ether_addr ( priv->netdev->hw_addr ) )
583  return -EADDRNOTAVAIL;
584 
585  return 0;
586 }
587 
588 /**
589  * pcnet32_setup_if_duplex - Sets the NICs used interface and duplex mode
590  *
591  * @v priv Driver private structure
592  */
593 static void
595 {
596  unsigned long ioaddr = priv->pci_dev->ioaddr;
597  u16 val;
598 
599  /* Set/Reset autoselect bit */
600  val = priv->a->read_bcr ( ioaddr, 2 ) & ~2;
601  if ( priv->options & PCNET32_PORT_ASEL )
602  val |= 2;
603  priv->a->write_bcr ( ioaddr, 2, val );
604 
605  /* Handle full duplex setting */
606  if ( priv->full_duplex ) {
607  val = priv->a->read_bcr ( ioaddr, 9 ) & ~3;
608  if ( priv->options & PCNET32_PORT_FD ) {
609  val |= 1;
610  if ( priv->options == ( PCNET32_PORT_FD | PCNET32_PORT_AUI ) )
611  val |= 2;
612  } else if ( priv->options & PCNET32_PORT_ASEL ) {
613  /* Workaround of xSeries 250, on for 79C975 only */
614  if ( priv->chip_version == 0x2627 )
615  val |= 3;
616  }
617  priv->a->write_bcr ( ioaddr, 9, val );
618  }
619 
620  /* Set/Reset GPSI bit in test register */
621  val = priv->a->read_csr ( ioaddr, 124 ) & ~0x10;
622  if ( ( priv->options & PCNET32_PORT_PORTSEL ) == PCNET32_PORT_GPSI )
623  val |= 0x10;
624  priv->a->write_bcr ( ioaddr, 124, val );
625 
626  /* Allied Telesyn AT are 100Mbit only and do not negotiate */
627  u16 subsys_vend_id, subsys_dev_id;
628  pci_read_config_word ( priv->pci_dev,
630  &subsys_vend_id );
631  pci_read_config_word ( priv->pci_dev,
633  &subsys_dev_id );
634  if ( subsys_vend_id == PCI_VENDOR_ID_AT &&
635  ( ( subsys_dev_id == PCI_SUBDEVICE_ID_AT_2700FX ) ||
636  ( subsys_dev_id == PCI_SUBDEVICE_ID_AT_2701FX ) ) ) {
638  }
639 
640  if ( priv->mii && ! ( priv->options & PCNET32_PORT_ASEL ) ) {
641  /* Disable Auto Negotiation, set 10Mbps, HD */
642  val = priv->a->read_bcr ( ioaddr, 32 ) & ~0x38;
643  if ( priv->options & PCNET32_PORT_FD )
644  val |= 0x10;
645  if ( priv->options & PCNET32_PORT_100 )
646  val |= 0x08;
647  priv->a->write_bcr ( ioaddr, 32, val );
648  } else if ( priv->options & PCNET32_PORT_ASEL ) {
649  /* 79C970 chips do not have the BCR32 register */
650  if ( ( priv->chip_version != 0x2420 ) &&
651  ( priv->chip_version != 0x2621 ) ) {
652  /* Enable Auto Negotiation, setup, disable FD */
653  val = priv->a->read_bcr ( ioaddr, 32 ) & ~0x98;
654  val |= 0x20;
655  priv->a->write_bcr ( ioaddr, 32, val );
656  }
657  }
658 }
659 
660 /**
661  * pcnet32_hw_start - Starts up the NIC
662  *
663  * @v priv Driver private structure
664  */
665 static void
667 {
668  unsigned long ioaddr = priv->pci_dev->ioaddr;
669  int i;
670 
671  /* Begin initialization procedure */
672  priv->a->write_csr ( ioaddr, 0, Init );
673 
674  /* Wait for the initialization to be done */
675  i = 0;
676  while ( i++ < 100 )
677  if ( priv->a->read_csr ( ioaddr, 0 ) & InitDone )
678  break;
679 
680  /* Start the chip */
681  priv->a->write_csr ( ioaddr, 0, Strt );
682 }
683 
684 /**
685  * open - Called when a network interface is made active
686  *
687  * @v netdev Network device
688  * @ret rc Return status code, 0 on success, negative value on failure
689  **/
690 static int
692 {
693  struct pcnet32_private *priv = netdev_priv ( netdev );
694  unsigned long ioaddr = priv->pci_dev->ioaddr;
695  int rc;
696  u16 val;
697 
698  /* Setup TX and RX descriptors */
699  if ( ( rc = pcnet32_setup_tx_resources ( priv ) ) != 0 ) {
700  DBG ( "Error setting up TX resources\n" );
701  goto err_setup_tx;
702  }
703 
704  if ( ( rc = pcnet32_setup_rx_resources ( priv ) ) != 0 ) {
705  DBG ( "Error setting up RX resources\n" );
706  goto err_setup_rx;
707  }
708 
709  /* Reset the chip */
710  priv->a->reset ( ioaddr );
711 
712  /* Switch pcnet32 to 32bit mode */
713  priv->a->write_bcr ( ioaddr, 20, PCNET32_SWSTYLE_PCNET32 );
714 
715  /* Setup the interface and duplex mode */
717 
718  /* Disable interrupts */
719  val = priv->a->read_csr ( ioaddr, 3 );
721  priv->a->write_csr ( ioaddr, 3, val );
722 
723  /* Setup initialization block */
725 
726  /* Fill in the address of the initialization block */
727  priv->a->write_csr ( ioaddr, 1,
728  ( virt_to_bus ( &priv->init_block ) ) & 0xffff );
729  priv->a->write_csr ( ioaddr, 2,
730  ( virt_to_bus ( &priv->init_block ) ) >> 16 );
731 
732  /* Enable Auto-Pad, disable interrupts */
733  priv->a->write_csr ( ioaddr, 4, 0x0915 );
734 
736 
737  return 0;
738 
739 err_setup_rx:
741 err_setup_tx:
742  priv->a->reset( priv->pci_dev->ioaddr );
743  return rc;
744 }
745 
746 /**
747  * transmit - Transmit a packet
748  *
749  * @v netdev Network device
750  * @v iobuf I/O buffer
751  *
752  * @ret rc Returns 0 on success, negative on failure
753  */
754 static int
755 pcnet32_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
756 {
757  struct pcnet32_private *priv = netdev_priv ( netdev );
758  unsigned long ioaddr = priv->pci_dev->ioaddr;
759  uint32_t tx_len = iob_len ( iobuf );
760  struct pcnet32_tx_desc *tx_curr_desc;
761 
762  DBGP ( "pcnet32_transmit\n" );
763 
764  if ( priv->tx_fill_ctr == TX_RING_SIZE ) {
765  DBG ( "Tx overflow\n" );
766  return -ENOTSUP;
767  }
768 
769  priv->tx_iobuf[priv->tx_curr] = iobuf;
770 
771  tx_curr_desc = priv->tx_base + priv->tx_curr;
772 
773  /* Configure current descriptor to transmit packet */
774  tx_curr_desc->length = cpu_to_le16 ( -tx_len );
775  tx_curr_desc->misc = 0x00000000;
776  tx_curr_desc->base = cpu_to_le32 ( virt_to_bus ( iobuf->data ) );
777 
778  /* Owner changes after the other status fields are set */
779  wmb();
780  tx_curr_desc->status =
782 
783  /* Trigger an immediate send poll */
784  priv->a->write_csr ( ioaddr, 0,
785  ( priv->irq_enabled ? IntEnable : 0 ) | TxDemand );
786 
787  /* Point to the next free descriptor */
788  priv->tx_curr = ( priv->tx_curr + 1 ) % TX_RING_SIZE;
789 
790  /* Increment number of tx descriptors in use */
791  priv->tx_fill_ctr++;
792 
793  return 0;
794 }
795 
796 /**
797  * pcnet32_process_tx_packets - Checks for successfully sent packets,
798  * reports them to iPXE with netdev_tx_complete()
799  *
800  * @v netdev Network device
801  */
802 static void
804 {
805  struct pcnet32_private *priv = netdev_priv ( netdev );
806  struct pcnet32_tx_desc *tx_curr_desc;
807 
808  DBGP ( "pcnet32_process_tx_packets\n" );
809 
810  while ( priv->tx_tail != priv->tx_curr ) {
811  tx_curr_desc = priv->tx_base + priv->tx_tail;
812 
813  u16 status = le16_to_cpu ( tx_curr_desc->status );
814 
815  DBG ( "Before OWN bit check, status: %#08x\n", status );
816 
817  /* Skip this descriptor if hardware still owns it */
818  if ( status & DescOwn )
819  break;
820 
821  DBG ( "Transmitted packet.\n" );
822  DBG ( "priv->tx_fill_ctr= %d\n", priv->tx_fill_ctr );
823  DBG ( "priv->tx_tail = %d\n", priv->tx_tail );
824  DBG ( "priv->tx_curr = %d\n", priv->tx_curr );
825  DBG ( "tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
826 
827  /* This packet is ready for completion */
828  netdev_tx_complete ( netdev, priv->tx_iobuf[priv->tx_tail]);
829 
830  /* Clear the descriptor */
831  memset ( tx_curr_desc, 0, sizeof(*tx_curr_desc) );
832 
833  /* Reduce the number of tx descriptors in use */
834  priv->tx_fill_ctr--;
835 
836  /* Go to next available descriptor */
837  priv->tx_tail = ( priv->tx_tail + 1 ) % TX_RING_SIZE;
838  }
839 }
840 
841 /**
842  * pcnet32_process_rx_packets - Checks for received packets, reports them
843  * to iPXE with netdev_rx() or netdev_rx_err() if there was an error receiving
844  * the packet
845  *
846  * @v netdev Network device
847  */
848 static void
850 {
851  struct pcnet32_private *priv = netdev_priv ( netdev );
852  struct pcnet32_rx_desc *rx_curr_desc;
853  u16 status;
854  u32 len;
855  int i;
856 
857  DBGP ( "pcnet32_process_rx_packets\n" );
858 
859  for ( i = 0; i < RX_RING_SIZE; i++ ) {
860  rx_curr_desc = priv->rx_base + priv->rx_curr;
861 
862  status = le16_to_cpu ( rx_curr_desc->status );
863  rmb();
864 
865  DBG ( "Before OWN bit check, status: %#08x\n", status );
866 
867  /* Skip this descriptor if hardware still owns it */
868  if ( status & DescOwn )
869  break;
870 
871  /* We own the descriptor, but it has not been refilled yet */
872  if ( priv->rx_iobuf[priv->rx_curr] == NULL )
873  break;
874 
875  DBG ( "Received packet.\n" );
876  DBG ( "priv->rx_curr = %d\n", priv->rx_curr );
877  DBG ( "rx_len = %d\n",
878  ( le32_to_cpu ( rx_curr_desc->msg_length ) & 0xfff ) - 4 );
879  DBG ( "rx_curr_desc = %#08lx\n",
880  virt_to_bus ( rx_curr_desc ) );
881 
882  /* Check ERR bit */
883  if ( status & 0x4000 ) {
884  netdev_rx_err ( netdev, priv->rx_iobuf[priv->rx_curr],
885  -EINVAL );
886  DBG ( "Corrupted packet received!\n");
887  } else {
888  /* Adjust size of the iobuf to reflect received data */
889  len = ( le32_to_cpu ( rx_curr_desc->msg_length ) & 0xfff ) - 4;
890  iob_put ( priv->rx_iobuf[priv->rx_curr], len );
891 
892  /* Add this packet to the receive queue */
893  netdev_rx ( netdev, priv->rx_iobuf[priv->rx_curr] );
894  }
895 
896  /* Invalidate iobuf and descriptor */
897  priv->rx_iobuf[priv->rx_curr] = NULL;
898  memset ( rx_curr_desc, 0, sizeof(*rx_curr_desc) );
899 
900  /* Point to the next free descriptor */
901  priv->rx_curr = ( priv->rx_curr + 1 ) % RX_RING_SIZE;
902  }
903 
904  /* Allocate new iobufs where needed */
906 }
907 
908 /**
909  * poll - Poll for received packets
910  *
911  * @v netdev Network device
912  */
913 static void
915 {
916  struct pcnet32_private *priv = netdev_priv ( netdev );
917  unsigned long ioaddr = priv->pci_dev->ioaddr;
918  u16 status;
919 
920  DBGP ( "pcnet32_poll\n" );
921 
922  status = priv->a->read_csr ( ioaddr, 0 );
923 
924  /* Clear interrupts */
925  priv->a->write_csr ( ioaddr, 0, status );
926 
927  DBG ( "pcnet32_poll: mask = %#04x, status = %#04x\n",
928  priv->a->read_csr ( ioaddr, 3 ), status );
929 
930  /* Return when RINT or TINT are not set */
931  if ( ( status & 0x0500 ) == 0x0000 )
932  return;
933 
934  /* Process transmitted packets */
936 
937  /* Process received packets */
939 }
940 
941 /**
942  * close - Disable network interface
943  *
944  * @v netdev network interface device structure
945  **/
946 static void
948 {
949  struct pcnet32_private *priv = netdev_priv ( netdev );
950  unsigned long ioaddr = priv->pci_dev->ioaddr;
951 
952  DBGP ( "pcnet32_close\n" );
953 
954  /* Reset the chip */
956 
957  /* Stop the PCNET32 - it occasionally polls memory if we don't */
958  priv->a->write_csr ( ioaddr, 0, Stop );
959 
960  /* Switch back to 16bit mode to avoid problems with dumb
961  * DOS packet driver after a warm reboot */
962  priv->a->write_bcr ( ioaddr, 20, PCNET32_SWSTYLE_LANCE );
963 
966 }
967 
968 static void pcnet32_irq_enable ( struct pcnet32_private *priv )
969 {
970  unsigned long ioaddr = priv->pci_dev->ioaddr;
971  u16 val;
972 
973  DBGP ( "pcnet32_irq_enable\n" );
974 
975  /* Enable TINT and RINT masks */
976  val = priv->a->read_csr ( ioaddr, 3 );
977  val &= ~( RxIntMask | TxIntMask );
978  priv->a->write_csr ( ioaddr, 3, val );
979 
980  /* Enable interrupts */
981  priv->a->write_csr ( ioaddr, 0, IntEnable );
982 
983  priv->irq_enabled = 1;
984 }
985 
986 static void pcnet32_irq_disable ( struct pcnet32_private *priv )
987 {
988  unsigned long ioaddr = priv->pci_dev->ioaddr;
989 
990  DBGP ( "pcnet32_irq_disable\n" );
991 
992  priv->a->write_csr ( ioaddr, 0, 0x0000 );
993 
994  priv->irq_enabled = 0;
995 }
996 
997 /**
998  * irq - enable or disable interrupts
999  *
1000  * @v netdev network adapter
1001  * @v action requested interrupt action
1002  **/
1003 static void
1004 pcnet32_irq ( struct net_device *netdev, int action )
1005 {
1006  struct pcnet32_private *priv = netdev_priv ( netdev );
1007 
1008  DBGP ( "pcnet32_irq\n" );
1009 
1010  switch ( action ) {
1011  case 0:
1013  break;
1014  default:
1016  break;
1017  }
1018 }
1019 
1021  .open = pcnet32_open,
1022  .transmit = pcnet32_transmit,
1023  .poll = pcnet32_poll,
1024  .close = pcnet32_close,
1025  .irq = pcnet32_irq,
1026 };
1027 
1028 /**
1029  * probe - Initial configuration of NIC
1030  *
1031  * @v pdev PCI device
1032  * @v ent PCI IDs
1033  *
1034  * @ret rc Return status code
1035  **/
1036 static int
1037 pcnet32_probe ( struct pci_device *pdev )
1038 {
1039  struct net_device *netdev;
1040  struct pcnet32_private *priv;
1041  unsigned long ioaddr;
1042  int rc;
1043 
1044  DBGP ( "pcnet32_probe\n" );
1045 
1046  DBG ( "Found %s, vendor = %#04x, device = %#04x\n",
1047  pdev->id->name, pdev->id->vendor, pdev->id->device );
1048 
1049  /* Allocate our private data */
1050  netdev = alloc_etherdev ( sizeof ( *priv ) );
1051  if ( ! netdev ) {
1052  rc = -ENOMEM;
1053  goto err_alloc_etherdev;
1054  }
1055 
1056  /* Link our operations to the netdev struct */
1058 
1059  /* Link the PCI device to the netdev struct */
1060  pci_set_drvdata ( pdev, netdev );
1061  netdev->dev = &pdev->dev;
1062 
1063  /* Get a reference to our private data */
1064  priv = netdev_priv ( netdev );
1065 
1066  /* We'll need these set up for the rest of the routines */
1067  priv->pci_dev = pdev;
1068  priv->netdev = netdev;
1069 
1070  ioaddr = pdev->ioaddr;
1071 
1072  /* Only use irqs under UNDI */
1073  priv->irq_enabled = 0;
1074 
1075  /* Reset the chip */
1077 
1078  if ( ( rc = pcnet32_set_ops ( priv ) ) != 0 ) {
1079  DBG ( "Setting driver operations failed\n");
1080  goto err_set_ops;
1081  }
1082 
1083  if ( ( rc = pcnet32_chip_detect ( priv ) ) != 0 ) {
1084  DBG ( "pcnet32_chip_detect failed\n" );
1085  goto err_chip_detect;
1086  }
1087 
1088  /* Enter bus mastering mode */
1089  adjust_pci_device ( pdev );
1090 
1091  /* Verify and get MAC address */
1092  if ( ( rc = pcnet32_setup_mac_addr ( priv ) ) != 0 ) {
1093  DBG ( "Setting MAC address failed\n" );
1094  goto err_mac_addr;
1095  }
1096 
1097  DBG ( "IO Addr 0x%lX, MAC Addr %s\n", ioaddr,
1098  eth_ntoa ( netdev->hw_addr ) );
1099 
1100  priv->options = PCNET32_PORT_ASEL;
1101 
1102  /* Detect special T1/E1 WAN card by checking for MAC address */
1103  if ( netdev->hw_addr[0] == 0x00 &&
1104  netdev->hw_addr[1] == 0xE0 &&
1105  netdev->hw_addr[2] == 0x75 )
1106  priv->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI;
1107 
1108  /* Probe the PHY so we can check link state and speed */
1110 
1111  if ( ( rc = register_netdev ( netdev ) ) != 0 ) {
1112  DBG ( "Error registering netdev\n" );
1113  goto err_register;
1114  }
1115 
1116  netdev_link_up ( netdev );
1117 
1118  return 0;
1119 
1120 err_register:
1121  netdev_put ( netdev );
1122 err_chip_detect:
1123 err_set_ops:
1124 err_alloc_etherdev:
1125 err_mac_addr:
1126  return rc;
1127 }
1128 
1129 /**
1130  * remove - Device Removal Routine
1131  *
1132  * @v pdev PCI device information struct
1133  **/
1134 static void
1135 pcnet32_remove ( struct pci_device *pdev )
1136 {
1137  struct net_device *netdev = pci_get_drvdata ( pdev );
1138  unsigned long ioaddr = pdev->ioaddr;
1139 
1140  DBGP ( "pcnet32_remove\n" );
1141 
1142  /* Reset the chip */
1144 
1146  netdev_nullify ( netdev );
1147  netdev_put ( netdev );
1148 }
1149 
1150 static struct pci_device_id pcnet32_nics[] = {
1151  PCI_ROM(0x1022, 0x2000, "pcnet32", "AMD PCnet/PCI", 0),
1152  PCI_ROM(0x1022, 0x2625, "pcnetfastiii", "AMD PCNet FAST III", 0),
1153  PCI_ROM(0x1022, 0x2001, "amdhomepna", "AMD PCnet/HomePNA", 0),
1154 };
1155 
1156 struct pci_driver pcnet32_driver __pci_driver = {
1157  .ids = pcnet32_nics,
1158  .id_count = ARRAY_SIZE ( pcnet32_nics ),
1159  .probe = pcnet32_probe,
1160  .remove = pcnet32_remove,
1161 };
static struct pcnet32_access pcnet32_dwio
Definition: pcnet32.c:143
uint16_t u16
Definition: stdint.h:21
static u16 pcnet32_wio_read_bcr(unsigned long addr, int index)
Definition: pcnet32.c:54
#define EINVAL
Invalid argument.
Definition: errno.h:428
#define PCI_SUBDEVICE_ID_AT_2701FX
Definition: pcnet32.h:88
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:572
iPXE I/O API
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
#define PCNET32_DWIO_RESET
Definition: pcnet32.h:60
static void netdev_tx_complete(struct net_device *netdev, struct io_buffer *iobuf)
Complete network transmission.
Definition: netdevice.h:752
wmb()
static struct mii_phy mii
#define iob_put(iobuf, len)
Definition: iobuf.h:120
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:527
uint16_t inw(volatile uint16_t *io_addr)
Read 16-bit word from I/O-mapped device.
static void pcnet32_wio_reset(unsigned long addr)
Definition: pcnet32.c:76
A PCI driver.
Definition: pci.h:227
static int pcnet32_setup_rx_resources(struct pcnet32_private *priv)
pcnet32_setup_rx_resources - allocate Rx resources (Descriptors)
Definition: pcnet32.c:245
Definition: pcnet32.h:168
static int pcnet32_setup_mac_addr(struct pcnet32_private *priv)
pcnet32_setup_mac_addr - check for inconsistency between CSR12-14 and PROM addresses
Definition: pcnet32.c:549
static unsigned int unsigned int reg
Definition: myson.h:162
static u16 pcnet32_wio_read_rap(unsigned long addr)
Definition: pcnet32.c:66
struct pci_driver pcnet32_driver __pci_driver
Definition: pcnet32.c:1156
#define le32_to_cpu(value)
Definition: byteswap.h:113
int(* open)(struct net_device *netdev)
Open network device.
Definition: netdevice.h:222
#define PCNET32_DWIO_RAP
Definition: pcnet32.h:59
#define TX_RING_BYTES
Definition: eepro100.h:23
#define outw(data, io_addr)
Definition: io.h:319
unsigned long ioaddr
I/O address.
Definition: pci.h:203
static u16 pcnet32_wio_read_csr(unsigned long addr, int index)
Definition: pcnet32.c:42
static int pcnet32_mdio_read(struct net_device *netdev, int phy, int reg)
Definition: pcnet32.c:154
Error codes.
#define PCNET32_PORT_AUI
Definition: pcnet32.h:63
I/O buffers.
void free_iob(struct io_buffer *iobuf)
Free I/O buffer.
Definition: iobuf.c:146
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:229
#define PCNET32_PORT_100
Definition: pcnet32.h:70
#define RX_RING_BYTES
Definition: eepro100.h:22
#define PKT_BUF_SIZE
Definition: pcnet32.h:46
static void pcnet32_close(struct net_device *netdev)
close - Disable network interface
Definition: pcnet32.c:947
s16 buf_length
Definition: pcnet32.h:93
static void *__malloc malloc_phys(size_t size, size_t phys_align)
Allocate memory with specified physical alignment.
Definition: malloc.h:62
static void pcnet32_remove(struct pci_device *pdev)
remove - Device Removal Routine
Definition: pcnet32.c:1135
static void pcnet32_process_tx_packets(struct net_device *netdev)
pcnet32_process_tx_packets - Checks for successfully sent packets, reports them to iPXE with netdev_t...
Definition: pcnet32.c:803
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
static int pcnet32_set_ops(struct pcnet32_private *priv)
pcnet32_set_ops - Determines the ops used to access the registers
Definition: pcnet32.c:437
#define PCNET32_WIO_RESET
Definition: pcnet32.h:55
iPXE timers
#define PCNET32_LOG_RX_BUFFERS
Definition: pcnet32.h:31
static void pcnet32_process_rx_packets(struct net_device *netdev)
pcnet32_process_rx_packets - Checks for received packets, reports them to iPXE with netdev_rx() or ne...
Definition: pcnet32.c:849
#define PCNET32_WIO_BDP
Definition: pcnet32.h:56
#define PCNET32_MAX_PHYS
Definition: pcnet32.h:77
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:129
#define PCI_SUBSYSTEM_ID
PCI subsystem ID.
Definition: pci.h:78
struct device dev
Generic device.
Definition: pci.h:190
uint32_t a
Definition: md4.c:28
static u16 pcnet32_dwio_read_csr(unsigned long addr, int index)
Definition: pcnet32.c:97
#define ENOTSUP
Operation not supported.
Definition: errno.h:589
Dynamic memory allocation.
static void pcnet32_dwio_write_rap(unsigned long addr, u16 val)
Definition: pcnet32.c:126
static void pcnet32_poll(struct net_device *netdev)
poll - Poll for received packets
Definition: pcnet32.c:914
uint8_t status
Status.
Definition: ena.h:16
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:504
static void pcnet32_wio_write_rap(unsigned long addr, u16 val)
Definition: pcnet32.c:71
u32 msg_length
Definition: pcnet32.h:95
#define TX_RING_ALIGN
Definition: 3c90x.h:267
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:341
#define rmb()
Definition: io.h:484
#define ENOMEM
Not enough space.
Definition: errno.h:534
static unsigned long ioaddr
Definition: davicom.c:129
void * memcpy(void *dest, const void *src, size_t len) __nonnull
static void pcnet32_free_tx_resources(struct pcnet32_private *priv)
Definition: pcnet32.c:311
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
static int pcnet32_dwio_check(unsigned long addr)
Definition: pcnet32.c:136
#define RX_RING_ALIGN
Definition: 3c90x.h:268
#define DBGP(...)
Definition: compiler.h:532
Assertions.
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:561
Ethernet protocol.
#define PCNET32_PORT_MII
Definition: pcnet32.h:66
void * priv
Driver private data.
Definition: netdevice.h:431
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:774
static struct net_device * netdev
Definition: gdbudp.c:52
static int pcnet32_chip_detect(struct pcnet32_private *priv)
Definition: pcnet32.c:319
static void pcnet32_irq(struct net_device *netdev, int action)
irq - enable or disable interrupts
Definition: pcnet32.c:1004
#define PCNET32_PORT_ASEL
Definition: pcnet32.h:69
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:874
static struct pcnet32_access pcnet32_wio
Definition: pcnet32.c:87
#define PCNET32_DWIO_BDP
Definition: pcnet32.h:61
#define cpu_to_le32(value)
Definition: byteswap.h:107
static int pcnet32_setup_tx_resources(struct pcnet32_private *priv)
pcnet32_setup_tx_resources - allocate Tx resources (Descriptors)
Definition: pcnet32.c:289
static int pcnet32_open(struct net_device *netdev)
open - Called when a network interface is made active
Definition: pcnet32.c:691
static int pcnet32_probe(struct pci_device *pdev)
probe - Initial configuration of NIC
Definition: pcnet32.c:1037
#define outl(data, io_addr)
Definition: io.h:329
PCI bus.
A PCI device.
Definition: pci.h:188
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:697
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:155
const char * eth_ntoa(const void *ll_addr)
Transcribe Ethernet address.
Definition: ethernet.c:175
static u16 pcnet32_dwio_read_rap(unsigned long addr)
Definition: pcnet32.c:121
static void __unused pcnet32_mdio_write(struct net_device *netdev, int phy, int reg, int val)
Definition: pcnet32.c:174
#define PCNET32_LOG_TX_BUFFERS
Definition: pcnet32.h:30
A network device.
Definition: netdevice.h:352
#define PCI_VENDOR_ID_AT
Definition: pcnet32.h:80
#define PCNET32_PORT_FD
Definition: pcnet32.h:71
static void pcnet32_hw_start(struct pcnet32_private *priv)
pcnet32_hw_start - Starts up the NIC
Definition: pcnet32.c:666
#define ENODEV
No such device.
Definition: errno.h:509
static int pcnet32_transmit(struct net_device *netdev, struct io_buffer *iobuf)
transmit - Transmit a packet
Definition: pcnet32.c:755
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:517
static void pcnet32_setup_if_duplex(struct pcnet32_private *priv)
pcnet32_setup_if_duplex - Sets the NICs used interface and duplex mode
Definition: pcnet32.c:594
#define ARRAY_SIZE(x)
Definition: efx_common.h:43
u32 addr
Definition: sky2.h:8
#define PCNET32_SWSTYLE_LANCE
Definition: pcnet32.h:73
uint8_t inb(volatile uint8_t *io_addr)
Read byte from I/O-mapped device.
#define ETH_ALEN
Definition: if_ether.h:8
A PCI device ID list entry.
Definition: pci.h:152
#define PCNET32_WIO_RDP
Definition: pcnet32.h:53
#define le16_to_cpu(value)
Definition: byteswap.h:112
unsigned int uint32_t
Definition: stdint.h:12
const char * name
Name.
Definition: pci.h:154
static int is_valid_ether_addr(const void *addr)
Check if Ethernet address is valid.
Definition: ethernet.h:77
#define RX_RING_SIZE
Definition: 3c515.c:87
void __asmcall int val
Definition: setjmp.h:28
Network device operations.
Definition: netdevice.h:213
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:489
struct device * dev
Underlying hardware device.
Definition: netdevice.h:364
#define EADDRNOTAVAIL
Address not available.
Definition: errno.h:308
static void pcnet32_refill_rx_ring(struct pcnet32_private *priv)
pcnet32_refill_rx_ring - Allocates iobufs for every Rx descriptor that doesn't have one and isn't in ...
Definition: pcnet32.c:198
Network device management.
#define __unused
Declare a variable or data structure as unused.
Definition: compiler.h:573
Definition: pcnet32.h:167
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:351
#define PCNET32_PORT_PORTSEL
Definition: pcnet32.h:68
uint16_t vendor
PCI vendor ID.
Definition: pci.h:156
#define PCNET32_DWIO_RDP
Definition: pcnet32.h:58
uint16_t device
PCI device ID.
Definition: pci.h:158
uint32_t len
Length.
Definition: ena.h:14
static struct tlan_private * priv
Definition: tlan.c:224
Media Independent Interface constants.
#define PCI_SUBDEVICE_ID_AT_2700FX
Definition: pcnet32.h:84
#define MII_PHYSID2
Definition: atl1e.h:874
FILE_LICENCE(GPL2_OR_LATER)
void * data
Start of data.
Definition: iobuf.h:48
#define PCNET32_WIO_RAP
Definition: pcnet32.h:54
static void pcnet32_dwio_reset(unsigned long addr)
Definition: pcnet32.c:131
static void pcnet32_setup_init_block(struct pcnet32_private *priv)
pcnet32_setup_init_block - setup the NICs initialization block
Definition: pcnet32.c:477
uint32_t inl(volatile uint32_t *io_addr)
Read 32-bit dword from I/O-mapped device.
static void pcnet32_wio_write_bcr(unsigned long addr, int index, u16 val)
Definition: pcnet32.c:60
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
struct pci_device_id * id
Driver device ID.
Definition: pci.h:223
static void pcnet32_dwio_write_csr(unsigned long addr, int index, u16 val)
Definition: pcnet32.c:103
static void pcnet32_wio_write_csr(unsigned long addr, int index, u16 val)
Definition: pcnet32.c:48
#define cpu_to_le16(value)
Definition: byteswap.h:106
static char media[]
Definition: sundance.c:85
static int pcnet32_wio_check(unsigned long addr)
Definition: pcnet32.c:81
static void free_phys(void *ptr, size_t size)
Free memory allocated with malloc_phys()
Definition: malloc.h:77
#define PCI_SUBSYSTEM_VENDOR_ID
PCI subsystem vendor ID.
Definition: pci.h:75
static u16 pcnet32_dwio_read_bcr(unsigned long addr, int index)
Definition: pcnet32.c:109
#define PCNET32_PORT_GPSI
Definition: pcnet32.h:65
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
#define PCNET32_SWSTYLE_PCNET32
Definition: pcnet32.h:75
#define MII_PHYSID1
Definition: atl1e.h:873
static void pcnet32_dwio_write_bcr(unsigned long addr, int index, u16 val)
Definition: pcnet32.c:115
uint64_t index
Index of the first segment within the content.
Definition: pccrc.h:21
static void pcnet32_setup_probe_phy(struct pcnet32_private *priv)
pcnet32_setup_probe_phy - go through all PHYs and see which one is present
Definition: pcnet32.c:513
static struct pci_device_id pcnet32_nics[]
Definition: pcnet32.c:1150
static void pcnet32_irq_disable(struct pcnet32_private *priv)
Definition: pcnet32.c:986
int memcmp(const void *first, const void *second, size_t len)
Compare memory regions.
Definition: string.c:113
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
Definition: netdevice.h:381
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
static struct net_device_operations pcnet32_operations
Definition: pcnet32.c:1020
u16(* read_csr)(unsigned long, int)
Definition: pcnet32.h:118
String functions.
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:286
Definition: pcnet32.h:166
uint8_t u8
Definition: stdint.h:19
static void pcnet32_irq_enable(struct pcnet32_private *priv)
Definition: pcnet32.c:968
uint32_t u32
Definition: stdint.h:23
#define TX_RING_SIZE
Definition: 3c515.c:86
static void pcnet32_free_rx_resources(struct pcnet32_private *priv)
Definition: pcnet32.c:267
void * memset(void *dest, int character, size_t len) __nonnull
A persistent I/O buffer.
Definition: iobuf.h:33