b44.c File Reference

#include <string.h>
#include <errno.h>
#include <assert.h>
#include <stdio.h>
#include <unistd.h>
#include <byteswap.h>
#include <ipxe/io.h>
#include <mii.h>
#include <ipxe/iobuf.h>
#include <ipxe/malloc.h>
#include <ipxe/pci.h>
#include <ipxe/netdevice.h>
#include <ipxe/ethernet.h>
#include <ipxe/if_ether.h>
#include "b44.h"

Go to the source code of this file.

Macros
#define	VIRT_TO_B44(addr)   ( virt_to_bus(addr) + SB_PCI_DMA )
#define	CTRL_MASK   (DMARX_CTRL_ENABLE | (RX_PKT_OFFSET << DMARX_CTRL_ROSHIFT))

Functions
	FILE_LICENCE (GPL2_OR_LATER)
static int	ring_next (int index)
static u32	br32 (const struct b44_private *bp, u32 reg)
static void	bw32 (const struct b44_private *bp, u32 reg, u32 val)
static void	bflush (const struct b44_private *bp, u32 reg, u32 timeout)
static int	b44_address_ok (void *address)
	Check if card can access address. More...
static u32	pending_tx_index (struct b44_private *bp)
	Ring cells waiting to be processed are between 'tx_cur' and 'pending' indexes in the ring. More...
static u32	pending_rx_index (struct b44_private *bp)
	Ring cells waiting to be processed are between 'rx_cur' and 'pending' indexes in the ring. More...
static int	b44_wait_bit (struct b44_private *bp, unsigned long reg, u32 bit, unsigned long timeout, const int clear)
	Wait until the given bit is set/cleared. More...
static u32	ssb_get_core_rev (struct b44_private *bp)
static int	ssb_is_core_up (struct b44_private *bp)
static u32	ssb_pci_setup (struct b44_private *bp, u32 cores)
static void	ssb_core_disable (struct b44_private *bp)
static void	ssb_core_reset (struct b44_private *bp)
static void	b44_chip_reset (struct b44_private *bp, int reset_kind)
static void	b44_halt (struct b44_private *bp)
	called by b44_poll in the error path More...
static void	b44_init_hw (struct b44_private *bp, int reset_kind)
static void	b44_populate_rx_descriptor (struct b44_private *bp, u32 idx)
static void	b44_rx_refill (struct b44_private *bp, u32 pending)
static void	b44_free_rx_ring (struct b44_private *bp)
static int	b44_init_rx_ring (struct b44_private *bp)
static void	b44_free_tx_ring (struct b44_private *bp)
static int	b44_init_tx_ring (struct b44_private *bp)
static int	b44_phy_read (struct b44_private *bp, int reg, u32 *val)
static int	b44_phy_write (struct b44_private *bp, int reg, u32 val)
static int	b44_phy_reset (struct b44_private *bp)
static void	b44_cam_write (struct b44_private *bp, unsigned char *data, int index)
static void	b44_set_mac_addr (struct b44_private *bp)
static void	b44_read_eeprom (struct b44_private *bp, u8 *data)
static void	b44_load_mac_and_phy_addr (struct b44_private *bp)
static void	b44_set_rx_mode (struct net_device *netdev)
static int	b44_probe (struct pci_device *pci)
	Probe device. More...
static void	b44_remove (struct pci_device *pci)
	Remove device. More...
static void	b44_irq (struct net_device *netdev, int enable)
	Enable or disable interrupts. More...
static int	b44_open (struct net_device *netdev)
	Open network device. More...
static void	b44_close (struct net_device *netdev)
	Close network device. More...
static int	b44_transmit (struct net_device *netdev, struct io_buffer *iobuf)
	Transmit packet. More...
static void	b44_tx_complete (struct b44_private *bp)
	Recycles sent TX descriptors and notifies network stack. More...
static void	b44_process_rx_packets (struct b44_private *bp)
static void	b44_poll (struct net_device *netdev)
	Poll for completed and received packets. More...

Variables
static struct net_device_operations	b44_operations
static struct pci_device_id	b44_nics []
struct pci_driver b44_driver	__pci_driver

Macro Definition Documentation

VIRT_TO_B44

#define VIRT_TO_B44

(

addr

)

( virt_to_bus(addr) + SB_PCI_DMA )

Definition at line 79 of file b44.c.

CTRL_MASK

#define CTRL_MASK   (DMARX_CTRL_ENABLE | (RX_PKT_OFFSET << DMARX_CTRL_ROSHIFT))

Function Documentation

FILE_LICENCE()

FILE_LICENCE

(

GPL2_OR_LATER

)

ring_next()

static int ring_next ( int  index )

inlinestatic

Definition at line 51 of file b44.c.

{
        /* B44_RING_SIZE is a power of 2 :) */
        return (index + 1) & (B44_RING_SIZE - 1);
}

References B44_RING_SIZE, and index.

Referenced by b44_process_rx_packets(), b44_rx_refill(), b44_transmit(), and b44_tx_complete().

br32()

static u32 br32 ( const struct b44_private *  bp, u32  reg  )

inlinestatic

Definition at line 60 of file b44.c.

{
        return readl(bp->regs + reg);
}

References bp, readl(), and reg.

Referenced by b44_chip_reset(), b44_init_hw(), b44_phy_read(), b44_poll(), b44_set_mac_addr(), b44_set_rx_mode(), b44_wait_bit(), pending_rx_index(), pending_tx_index(), ssb_core_disable(), ssb_core_reset(), ssb_get_core_rev(), ssb_is_core_up(), and ssb_pci_setup().

bw32()

static void bw32 ( const struct b44_private *  bp, u32  reg, u32  val  )

inlinestatic

Definition at line 66 of file b44.c.

{
        writel(val, bp->regs + reg);
}

References bp, reg, val, and writel().

Referenced by b44_cam_write(), b44_chip_reset(), b44_halt(), b44_init_hw(), b44_irq(), b44_phy_read(), b44_phy_write(), b44_poll(), b44_populate_rx_descriptor(), b44_set_mac_addr(), b44_set_rx_mode(), b44_transmit(), ssb_core_disable(), ssb_core_reset(), and ssb_pci_setup().

bflush()

static void bflush ( const struct b44_private *  bp, u32  reg, u32  timeout  )

inlinestatic

Definition at line 72 of file b44.c.

{
        readl(bp->regs + reg);
        udelay(timeout);
}

References bp, readl(), reg, timeout(), and udelay().

Referenced by b44_chip_reset(), b44_halt(), b44_poll(), ssb_core_disable(), and ssb_core_reset().

b44_address_ok()

static int b44_address_ok ( void *  address )

inlinestatic

Check if card can access address.

Parameters

address	Virtual address
address_ok	Card can access address

Definition at line 89 of file b44.c.

                                 {

        /* Card can address anything with a 30-bit address */
        if ( ( virt_to_bus ( address ) & ~B44_30BIT_DMA_MASK ) == 0 )
                return 1;

        return 0;
}

References address, B44_30BIT_DMA_MASK, and virt_to_bus().

Referenced by b44_init_rx_ring(), b44_init_tx_ring(), b44_rx_refill(), and b44_transmit().

pending_tx_index()

static u32 pending_tx_index ( struct b44_private *  bp )

static

Ring cells waiting to be processed are between 'tx_cur' and 'pending' indexes in the ring.

Definition at line 102 of file b44.c.

{
        u32 pending = br32(bp, B44_DMATX_STAT);
        pending &= DMATX_STAT_CDMASK;

        pending /= sizeof(struct dma_desc);
        return pending & (B44_RING_SIZE - 1);
}

References B44_DMATX_STAT, B44_RING_SIZE, bp, br32(), DMATX_STAT_CDMASK, and pending.

Referenced by b44_tx_complete().

pending_rx_index()

static u32 pending_rx_index ( struct b44_private *  bp )

static

Ring cells waiting to be processed are between 'rx_cur' and 'pending' indexes in the ring.

Definition at line 116 of file b44.c.

{
        u32 pending = br32(bp, B44_DMARX_STAT);
        pending &= DMARX_STAT_CDMASK;

        pending /= sizeof(struct dma_desc);
        return pending & (B44_RING_SIZE - 1);
}

References B44_DMARX_STAT, B44_RING_SIZE, bp, br32(), DMARX_STAT_CDMASK, and pending.

Referenced by b44_process_rx_packets().

b44_wait_bit()

static int b44_wait_bit ( struct b44_private *  bp, unsigned long  reg, u32  bit, unsigned long  timeout, const int  clear  )

static

Wait until the given bit is set/cleared.

Definition at line 129 of file b44.c.

{
        unsigned long i;

        for (i = 0; i < timeout; i++) {
                u32 val = br32(bp, reg);

                if (clear && !(val & bit))
                        break;

                if (!clear && (val & bit))
                        break;

                udelay(10);
        }
        if (i == timeout) {
                return -ENODEV;
        }
        return 0;
}

References bit, bp, br32(), clear, ENODEV, reg, timeout(), udelay(), and val.

Referenced by b44_cam_write(), b44_chip_reset(), b44_phy_read(), b44_phy_write(), and ssb_core_disable().

ssb_get_core_rev()

static u32 ssb_get_core_rev ( struct b44_private *  bp )

inlinestatic

Definition at line 164 of file b44.c.

{
        return (br32(bp, B44_SBIDHIGH) & SBIDHIGH_RC_MASK);
}

References B44_SBIDHIGH, bp, br32(), and SBIDHIGH_RC_MASK.

Referenced by ssb_pci_setup().

ssb_is_core_up()

static int ssb_is_core_up ( struct b44_private *  bp )

inlinestatic

Definition at line 170 of file b44.c.

{
        return ((br32(bp, B44_SBTMSLOW) & (SSB_CORE_DOWN | SBTMSLOW_CLOCK))
                                                        == SBTMSLOW_CLOCK);
}

References B44_SBTMSLOW, bp, br32(), SBTMSLOW_CLOCK, and SSB_CORE_DOWN.

Referenced by b44_chip_reset().

ssb_pci_setup()

static u32 ssb_pci_setup ( struct b44_private *  bp, u32  cores  )

static

Definition at line 177 of file b44.c.

{
        u32 bar_orig, pci_rev, val;

        pci_read_config_dword(bp->pci, SSB_BAR0_WIN, &bar_orig);
        pci_write_config_dword(bp->pci, SSB_BAR0_WIN,
                               BCM4400_PCI_CORE_ADDR);
        pci_rev = ssb_get_core_rev(bp);

        val = br32(bp, B44_SBINTVEC);
        val |= cores;
        bw32(bp, B44_SBINTVEC, val);

        val = br32(bp, SSB_PCI_TRANS_2);
        val |= SSB_PCI_PREF | SSB_PCI_BURST;
        bw32(bp, SSB_PCI_TRANS_2, val);

        pci_write_config_dword(bp->pci, SSB_BAR0_WIN, bar_orig);

        return pci_rev;
}

References B44_SBINTVEC, BCM4400_PCI_CORE_ADDR, bp, br32(), bw32(), pci_read_config_dword(), pci_write_config_dword(), SSB_BAR0_WIN, ssb_get_core_rev(), SSB_PCI_BURST, SSB_PCI_PREF, SSB_PCI_TRANS_2, and val.

Referenced by b44_chip_reset().

ssb_core_disable()

static void ssb_core_disable ( struct b44_private *  bp )

static

Definition at line 200 of file b44.c.

{
        if (br32(bp, B44_SBTMSLOW) & SBTMSLOW_RESET)
                return;

        bw32(bp, B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_CLOCK));
        b44_wait_bit(bp, B44_SBTMSLOW, SBTMSLOW_REJECT, 100000, 0);
        b44_wait_bit(bp, B44_SBTMSHIGH, SBTMSHIGH_BUSY, 100000, 1);

        bw32(bp, B44_SBTMSLOW, (SBTMSLOW_FGC | SBTMSLOW_CLOCK |
                                                SSB_CORE_DOWN));
        bflush(bp, B44_SBTMSLOW, 1);

        bw32(bp, B44_SBTMSLOW, SSB_CORE_DOWN);
        bflush(bp, B44_SBTMSLOW, 1);
}

References B44_SBTMSHIGH, B44_SBTMSLOW, b44_wait_bit(), bflush(), bp, br32(), bw32(), SBTMSHIGH_BUSY, SBTMSLOW_CLOCK, SBTMSLOW_FGC, SBTMSLOW_REJECT, SBTMSLOW_RESET, and SSB_CORE_DOWN.

Referenced by b44_remove(), and ssb_core_reset().

ssb_core_reset()

static void ssb_core_reset ( struct b44_private *  bp )

static

Definition at line 218 of file b44.c.

{
        u32 val;
        const u32 mask = (SBTMSLOW_CLOCK | SBTMSLOW_FGC | SBTMSLOW_RESET);

        ssb_core_disable(bp);

        bw32(bp, B44_SBTMSLOW, mask);
        bflush(bp, B44_SBTMSLOW, 1);

        /* Clear SERR if set, this is a hw bug workaround.  */
        if (br32(bp, B44_SBTMSHIGH) & SBTMSHIGH_SERR)
                bw32(bp, B44_SBTMSHIGH, 0);

        val = br32(bp, B44_SBIMSTATE);
        if (val & (SBIMSTATE_BAD)) {
                bw32(bp, B44_SBIMSTATE, val & ~SBIMSTATE_BAD);
        }

        bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
        bflush(bp, B44_SBTMSLOW, 1);

        bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK));
        bflush(bp, B44_SBTMSLOW, 1);
}

References B44_SBIMSTATE, B44_SBTMSHIGH, B44_SBTMSLOW, bflush(), bp, br32(), bw32(), SBIMSTATE_BAD, SBTMSHIGH_SERR, SBTMSLOW_CLOCK, SBTMSLOW_FGC, SBTMSLOW_RESET, ssb_core_disable(), and val.

Referenced by b44_chip_reset().

b44_chip_reset()

static void b44_chip_reset ( struct b44_private *  bp, int  reset_kind  )

static

Definition at line 258 of file b44.c.

{
        if (ssb_is_core_up(bp)) {
                bw32(bp, B44_RCV_LAZY, 0);

                bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE);

                b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 200, 1);

                bw32(bp, B44_DMATX_CTRL, 0);

                bp->tx_dirty = bp->tx_cur = 0;

                if (br32(bp, B44_DMARX_STAT) & DMARX_STAT_EMASK)
                        b44_wait_bit(bp, B44_DMARX_STAT, DMARX_STAT_SIDLE,
                                                                  100, 0);

                bw32(bp, B44_DMARX_CTRL, 0);

                bp->rx_cur = 0;
        } else {
                ssb_pci_setup(bp, SBINTVEC_ENET0);
        }

        ssb_core_reset(bp);

        /* Don't enable PHY if we are only doing a partial reset. */
        if (reset_kind == B44_CHIP_RESET_PARTIAL)
                return;

        /* Make PHY accessible. */
        bw32(bp, B44_MDIO_CTRL,
             (MDIO_CTRL_PREAMBLE | (0x0d & MDIO_CTRL_MAXF_MASK)));
        bflush(bp, B44_MDIO_CTRL, 1);

        /* Enable internal or external PHY */
        if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) {
                bw32(bp, B44_ENET_CTRL, ENET_CTRL_EPSEL);
                bflush(bp, B44_ENET_CTRL, 1);
        } else {
                u32 val = br32(bp, B44_DEVCTRL);
                if (val & DEVCTRL_EPR) {
                        bw32(bp, B44_DEVCTRL, (val & ~DEVCTRL_EPR));
                        bflush(bp, B44_DEVCTRL, 100);
                }
        }
}

References B44_CHIP_RESET_PARTIAL, B44_DEVCTRL, B44_DMARX_CTRL, B44_DMARX_STAT, B44_DMATX_CTRL, B44_ENET_CTRL, B44_MDIO_CTRL, B44_RCV_LAZY, b44_wait_bit(), bflush(), bp, br32(), bw32(), DEVCTRL_EPR, DEVCTRL_IPP, DMARX_STAT_EMASK, DMARX_STAT_SIDLE, ENET_CTRL_DISABLE, ENET_CTRL_EPSEL, MDIO_CTRL_MAXF_MASK, MDIO_CTRL_PREAMBLE, SBINTVEC_ENET0, ssb_core_reset(), ssb_is_core_up(), ssb_pci_setup(), and val.

Referenced by b44_close(), b44_halt(), b44_init_hw(), and b44_probe().

b44_halt()

static void b44_halt ( struct b44_private *  bp )

static

called by b44_poll in the error path

Definition at line 310 of file b44.c.

{
        /* disable ints */
        bw32(bp, B44_IMASK, 0);
        bflush(bp, B44_IMASK, 1);

        DBG("b44: powering down PHY\n");
        bw32(bp, B44_MAC_CTRL, MAC_CTRL_PHY_PDOWN);

        /*
         * Now reset the chip, but without enabling
         * the MAC&PHY part of it.
         * This has to be done _after_ we shut down the PHY
         */
        b44_chip_reset(bp, B44_CHIP_RESET_PARTIAL);
}

References b44_chip_reset(), B44_CHIP_RESET_PARTIAL, B44_IMASK, B44_MAC_CTRL, bflush(), bp, bw32(), DBG, and MAC_CTRL_PHY_PDOWN.

Referenced by b44_poll().

b44_init_hw()

static void b44_init_hw ( struct b44_private *  bp, int  reset_kind  )

static

Definition at line 335 of file b44.c.

{
        u32 val;
#define CTRL_MASK (DMARX_CTRL_ENABLE | (RX_PKT_OFFSET << DMARX_CTRL_ROSHIFT))

        b44_chip_reset(bp, B44_CHIP_RESET_FULL);
        if (reset_kind == B44_FULL_RESET) {
                b44_phy_reset(bp);
        }

        /* Enable CRC32, set proper LED modes and power on PHY */
        bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL);
        bw32(bp, B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT));

        /* This sets the MAC address too.  */
        b44_set_rx_mode(bp->netdev);

        /* MTU + eth header + possible VLAN tag + struct rx_header */
        bw32(bp, B44_RXMAXLEN, B44_MAX_MTU + ETH_HLEN + 8 + RX_HEADER_LEN);
        bw32(bp, B44_TXMAXLEN, B44_MAX_MTU + ETH_HLEN + 8 + RX_HEADER_LEN);

        bw32(bp, B44_TX_HIWMARK, TX_HIWMARK_DEFLT);
        if (reset_kind == B44_PARTIAL_RESET) {
                bw32(bp, B44_DMARX_CTRL, CTRL_MASK);
        } else {
                bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
                bw32(bp, B44_DMATX_ADDR, VIRT_TO_B44(bp->tx));

                bw32(bp, B44_DMARX_CTRL, CTRL_MASK);
                bw32(bp, B44_DMARX_ADDR, VIRT_TO_B44(bp->rx));
                bw32(bp, B44_DMARX_PTR, B44_RX_RING_LEN_BYTES);

                bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
        }

        val = br32(bp, B44_ENET_CTRL);
        bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
#undef CTRL_MASK
}

References b44_chip_reset(), B44_CHIP_RESET_FULL, B44_DMARX_ADDR, B44_DMARX_CTRL, B44_DMARX_PTR, B44_DMATX_ADDR, B44_DMATX_CTRL, B44_ENET_CTRL, B44_FULL_RESET, B44_MAC_CTRL, B44_MAX_MTU, B44_MIB_CTRL, B44_PARTIAL_RESET, b44_phy_reset(), B44_RCV_LAZY, B44_RX_RING_LEN_BYTES, B44_RXMAXLEN, b44_set_rx_mode(), B44_TX_HIWMARK, B44_TXMAXLEN, bp, br32(), bw32(), CTRL_MASK, DMATX_CTRL_ENABLE, ENET_CTRL_ENABLE, ETH_HLEN, MAC_CTRL_CRC32_ENAB, MAC_CTRL_PHY_LEDCTRL, MIB_CTRL_CLR_ON_READ, RCV_LAZY_FC_SHIFT, RX_HEADER_LEN, TX_HIWMARK_DEFLT, val, and VIRT_TO_B44.

Referenced by b44_open(), and b44_poll().

b44_populate_rx_descriptor()

static void b44_populate_rx_descriptor ( struct b44_private *  bp, u32  idx  )

static

Definition at line 379 of file b44.c.

{
        struct rx_header *rh;
        u32 ctrl, addr;

        rh = bp->rx_iobuf[idx]->data;
        rh->len = 0;
        rh->flags = 0;
        ctrl = DESC_CTRL_LEN & (RX_PKT_BUF_SZ - RX_PKT_OFFSET);
        if (idx == B44_RING_LAST) {
                ctrl |= DESC_CTRL_EOT;
        }
        addr = VIRT_TO_B44(bp->rx_iobuf[idx]->data);

        bp->rx[idx].ctrl = cpu_to_le32(ctrl);
        bp->rx[idx].addr = cpu_to_le32(addr);
        bw32(bp, B44_DMARX_PTR, idx * sizeof(struct dma_desc));
}

References addr, B44_DMARX_PTR, B44_RING_LAST, bp, bw32(), cpu_to_le32, ctrl, DESC_CTRL_EOT, DESC_CTRL_LEN, rx_header::flags, rx_header::len, RX_PKT_BUF_SZ, RX_PKT_OFFSET, and VIRT_TO_B44.

Referenced by b44_init_rx_ring(), and b44_rx_refill().

b44_rx_refill()

static void b44_rx_refill ( struct b44_private *  bp, u32  pending  )

static

Definition at line 404 of file b44.c.

{
        struct io_buffer *iobuf;
        u32 i;

        // skip pending
        for (i = pending + 1; i != bp->rx_cur; i = ring_next(i)) {
                if (bp->rx_iobuf[i] != NULL)
                        continue;

                iobuf = alloc_iob(RX_PKT_BUF_SZ);
                if (!iobuf) {
                        DBG("Refill rx ring failed!!\n");
                        break;
                }
                if (!b44_address_ok(iobuf->data)) {
                        DBG("Refill rx ring bad address!!\n");
                        free_iob(iobuf);
                        break;
                }
                bp->rx_iobuf[i] = iobuf;

                b44_populate_rx_descriptor(bp, i);
        }
}

References alloc_iob(), b44_address_ok(), b44_populate_rx_descriptor(), bp, io_buffer::data, DBG, free_iob(), NULL, pending, ring_next(), and RX_PKT_BUF_SZ.

Referenced by b44_init_rx_ring(), and b44_process_rx_packets().

b44_free_rx_ring()

static void b44_free_rx_ring ( struct b44_private *  bp )

static

Definition at line 431 of file b44.c.

{
        u32 i;

        if (bp->rx) {
                for (i = 0; i < B44_RING_SIZE; i++) {
                        free_iob(bp->rx_iobuf[i]);
                        bp->rx_iobuf[i] = NULL;
                }
                free_phys(bp->rx, B44_RX_RING_LEN_BYTES);
                bp->rx = NULL;
        }
}

References B44_RING_SIZE, B44_RX_RING_LEN_BYTES, bp, free_iob(), free_phys(), and NULL.

Referenced by b44_close(), and b44_init_rx_ring().

b44_init_rx_ring()

static int b44_init_rx_ring ( struct b44_private *  bp )

static

Definition at line 446 of file b44.c.

{
        b44_free_rx_ring(bp);

        bp->rx = malloc_phys(B44_RX_RING_LEN_BYTES, B44_DMA_ALIGNMENT);
        if (!bp->rx)
                return -ENOMEM;
        if (!b44_address_ok(bp->rx)) {
                free_phys(bp->rx, B44_RX_RING_LEN_BYTES);
                return -ENOTSUP;
        }

        memset(bp->rx_iobuf, 0, sizeof(bp->rx_iobuf));

        bp->rx_iobuf[0] = alloc_iob(RX_PKT_BUF_SZ);
        b44_populate_rx_descriptor(bp, 0);
        b44_rx_refill(bp, 0);

        DBG("Init RX rings: rx=0x%08lx\n", VIRT_TO_B44(bp->rx));
        return 0;
}

References alloc_iob(), b44_address_ok(), B44_DMA_ALIGNMENT, b44_free_rx_ring(), b44_populate_rx_descriptor(), b44_rx_refill(), B44_RX_RING_LEN_BYTES, bp, DBG, ENOMEM, ENOTSUP, free_phys(), malloc_phys(), memset(), RX_PKT_BUF_SZ, and VIRT_TO_B44.

Referenced by b44_open(), and b44_poll().

b44_free_tx_ring()

static void b44_free_tx_ring ( struct b44_private *  bp )

static

Definition at line 469 of file b44.c.

{
        if (bp->tx) {
                free_phys(bp->tx, B44_TX_RING_LEN_BYTES);
                bp->tx = NULL;
        }
}

References B44_TX_RING_LEN_BYTES, bp, free_phys(), and NULL.

Referenced by b44_close(), and b44_init_tx_ring().

b44_init_tx_ring()

static int b44_init_tx_ring ( struct b44_private *  bp )

static

Definition at line 478 of file b44.c.

{
        b44_free_tx_ring(bp);

        bp->tx = malloc_phys(B44_TX_RING_LEN_BYTES, B44_DMA_ALIGNMENT);
        if (!bp->tx)
                return -ENOMEM;
        if (!b44_address_ok(bp->tx)) {
                free_phys(bp->tx, B44_TX_RING_LEN_BYTES);
                return -ENOTSUP;
        }

        memset(bp->tx, 0, B44_TX_RING_LEN_BYTES);
        memset(bp->tx_iobuf, 0, sizeof(bp->tx_iobuf));

        DBG("Init TX rings: tx=0x%08lx\n", VIRT_TO_B44(bp->tx));
        return 0;
}

References b44_address_ok(), B44_DMA_ALIGNMENT, b44_free_tx_ring(), B44_TX_RING_LEN_BYTES, bp, DBG, ENOMEM, ENOTSUP, free_phys(), malloc_phys(), memset(), and VIRT_TO_B44.

Referenced by b44_open(), and b44_poll().

b44_phy_read()

static int b44_phy_read ( struct b44_private *  bp, int  reg, u32 *  val  )

static

Definition at line 501 of file b44.c.

{
        int err;

        u32 arg1 = (MDIO_OP_READ << MDIO_DATA_OP_SHIFT);
        u32 arg2 = (bp->phy_addr << MDIO_DATA_PMD_SHIFT);
        u32 arg3 = (reg << MDIO_DATA_RA_SHIFT);
        u32 arg4 = (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT);
        u32 argv = arg1 | arg2 | arg3 | arg4;

        bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
        bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START | argv));
        err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
        *val = br32(bp, B44_MDIO_DATA) & MDIO_DATA_DATA;

        return err;
}

References arg1, arg2, arg3, arg4, B44_EMAC_ISTAT, B44_MDIO_DATA, b44_wait_bit(), bp, br32(), bw32(), EMAC_INT_MII, MDIO_DATA_DATA, MDIO_DATA_OP_SHIFT, MDIO_DATA_PMD_SHIFT, MDIO_DATA_RA_SHIFT, MDIO_DATA_SB_START, MDIO_DATA_TA_SHIFT, MDIO_OP_READ, MDIO_TA_VALID, reg, and val.

Referenced by b44_phy_reset().

b44_phy_write()

static int b44_phy_write ( struct b44_private *  bp, int  reg, u32  val  )

static

Definition at line 520 of file b44.c.

{
        u32 arg1 = (MDIO_OP_WRITE << MDIO_DATA_OP_SHIFT);
        u32 arg2 = (bp->phy_addr << MDIO_DATA_PMD_SHIFT);
        u32 arg3 = (reg << MDIO_DATA_RA_SHIFT);
        u32 arg4 = (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT);
        u32 arg5 = (val & MDIO_DATA_DATA);
        u32 argv = arg1 | arg2 | arg3 | arg4 | arg5;


        bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
        bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START | argv));
        return b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
}

References arg1, arg2, arg3, arg4, arg5, B44_EMAC_ISTAT, B44_MDIO_DATA, b44_wait_bit(), bp, bw32(), EMAC_INT_MII, MDIO_DATA_DATA, MDIO_DATA_OP_SHIFT, MDIO_DATA_PMD_SHIFT, MDIO_DATA_RA_SHIFT, MDIO_DATA_SB_START, MDIO_DATA_TA_SHIFT, MDIO_OP_WRITE, MDIO_TA_VALID, reg, and val.

Referenced by b44_phy_reset().

b44_phy_reset()

static int b44_phy_reset ( struct b44_private *  bp )

static

Definition at line 536 of file b44.c.

{
        u32 val;
        int err;

        err = b44_phy_write(bp, MII_BMCR, BMCR_RESET);
        if (err)
                return err;

        udelay(100);
        err = b44_phy_read(bp, MII_BMCR, &val);
        if (!err) {
                if (val & BMCR_RESET) {
                        return -ENODEV;
                }
        }

        return 0;
}

References b44_phy_read(), b44_phy_write(), BMCR_RESET, bp, ENODEV, MII_BMCR, udelay(), and val.

Referenced by b44_init_hw().

b44_cam_write()

static void b44_cam_write ( struct b44_private *  bp, unsigned char *  data, int  index  )

static

Definition at line 561 of file b44.c.

{
        u32 val;

        val  = ((u32) data[2]) << 24;
        val |= ((u32) data[3]) << 16;
        val |= ((u32) data[4]) << 8;
        val |= ((u32) data[5]) << 0;
        bw32(bp, B44_CAM_DATA_LO, val);


        val = (CAM_DATA_HI_VALID |
               (((u32) data[0]) << 8) | (((u32) data[1]) << 0));

        bw32(bp, B44_CAM_DATA_HI, val);

        val = CAM_CTRL_WRITE | (index << CAM_CTRL_INDEX_SHIFT);
        bw32(bp, B44_CAM_CTRL, val);

        b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);
}

References B44_CAM_CTRL, B44_CAM_DATA_HI, B44_CAM_DATA_LO, b44_wait_bit(), bp, bw32(), CAM_CTRL_BUSY, CAM_CTRL_INDEX_SHIFT, CAM_CTRL_WRITE, CAM_DATA_HI_VALID, data, index, u32, and val.

Referenced by b44_set_mac_addr(), and b44_set_rx_mode().

b44_set_mac_addr()

static void b44_set_mac_addr ( struct b44_private *  bp )

static

Definition at line 585 of file b44.c.

{
        u32 val;
        bw32(bp, B44_CAM_CTRL, 0);
        b44_cam_write(bp, bp->netdev->ll_addr, 0);
        val = br32(bp, B44_CAM_CTRL);
        bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
}

References B44_CAM_CTRL, b44_cam_write(), bp, br32(), bw32(), CAM_CTRL_ENABLE, and val.

Referenced by b44_set_rx_mode().

b44_read_eeprom()

static void b44_read_eeprom ( struct b44_private *  bp, u8 *  data  )

static

Definition at line 596 of file b44.c.

{
        long i;
        u16 *ptr = (u16 *) data;

        for (i = 0; i < 128; i += 2)
                ptr[i / 2] = cpu_to_le16(readw(bp->regs + 4096 + i));
}

References bp, cpu_to_le16, data, and readw().

Referenced by b44_load_mac_and_phy_addr().

b44_load_mac_and_phy_addr()

static void b44_load_mac_and_phy_addr ( struct b44_private *  bp )

static

Definition at line 606 of file b44.c.

{
        u8 eeprom[128];

        /* Load MAC address, note byteswapping */
        b44_read_eeprom(bp, &eeprom[0]);
        bp->netdev->hw_addr[0] = eeprom[79];
        bp->netdev->hw_addr[1] = eeprom[78];
        bp->netdev->hw_addr[2] = eeprom[81];
        bp->netdev->hw_addr[3] = eeprom[80];
        bp->netdev->hw_addr[4] = eeprom[83];
        bp->netdev->hw_addr[5] = eeprom[82];

        /* Load PHY address */
        bp->phy_addr = eeprom[90] & 0x1f;
}

References b44_read_eeprom(), and bp.

Referenced by b44_probe().

b44_set_rx_mode()

static void b44_set_rx_mode ( struct net_device *  netdev )

static

Definition at line 624 of file b44.c.

{
        struct b44_private *bp = netdev->priv;
        unsigned char zero[6] = { 0, 0, 0, 0, 0, 0 };
        u32 val;
        int i;

        val = br32(bp, B44_RXCONFIG);
        val &= ~RXCONFIG_PROMISC;
        val |= RXCONFIG_ALLMULTI;

        b44_set_mac_addr(bp);

        for (i = 1; i < 64; i++)
                b44_cam_write(bp, zero, i);

        bw32(bp, B44_RXCONFIG, val);
        val = br32(bp, B44_CAM_CTRL);
        bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
}

References B44_CAM_CTRL, b44_cam_write(), B44_RXCONFIG, b44_set_mac_addr(), bp, br32(), bw32(), CAM_CTRL_ENABLE, netdev, net_device::priv, RXCONFIG_ALLMULTI, RXCONFIG_PROMISC, and val.

Referenced by b44_init_hw().

b44_probe()

static int b44_probe ( struct pci_device *  pci )

static

Probe device.

Parameters

pci	PCI device
id	Matching entry in ID table

Return values

rc	Return status code

Definition at line 655 of file b44.c.

{
        struct net_device *netdev;
        struct b44_private *bp;
        int rc;

        /* Set up netdev */
        netdev = alloc_etherdev(sizeof(*bp));
        if (!netdev)
                return -ENOMEM;

        netdev_init(netdev, &b44_operations);
        pci_set_drvdata(pci, netdev);
        netdev->dev = &pci->dev;

        /* Set up private data */
        bp = netdev->priv;
        memset(bp, 0, sizeof(*bp));
        bp->netdev = netdev;
        bp->pci = pci;

        /* Map device registers */
        bp->regs = pci_ioremap(pci, pci->membase, B44_REGS_SIZE);
        if (!bp->regs) {
                netdev_put(netdev);
                return -ENOMEM;
        }

        /* Enable PCI bus mastering */
        adjust_pci_device(pci);

        b44_load_mac_and_phy_addr(bp);

        rc = register_netdev(netdev);
        if (rc != 0) {
                iounmap(bp->regs);
                netdev_put(netdev);
                return rc;
        }

        /* Link management currently not implemented */
        netdev_link_up(netdev);

        b44_chip_reset(bp, B44_CHIP_RESET_FULL);

        DBG("b44 %s (%04x:%04x) regs=%p MAC=%s\n", pci->id->name,
            pci->id->vendor, pci->id->device, bp->regs,
            eth_ntoa(netdev->ll_addr));

        return 0;
}

References adjust_pci_device(), alloc_etherdev(), b44_chip_reset(), B44_CHIP_RESET_FULL, b44_load_mac_and_phy_addr(), b44_operations, B44_REGS_SIZE, bp, DBG, pci_device::dev, net_device::dev, pci_device_id::device, ENOMEM, eth_ntoa(), pci_device::id, iounmap(), net_device::ll_addr, pci_device::membase, memset(), pci_device_id::name, netdev, netdev_init(), netdev_link_up(), netdev_put(), b44_private::pci, pci_ioremap(), pci_set_drvdata(), net_device::priv, rc, register_netdev(), and pci_device_id::vendor.

b44_remove()

static void b44_remove ( struct pci_device *  pci )

static

Remove device.

Parameters

pci	PCI device

Definition at line 713 of file b44.c.

{
        struct net_device *netdev = pci_get_drvdata(pci);
        struct b44_private *bp = netdev->priv;

        ssb_core_disable(bp);
        unregister_netdev(netdev);
        iounmap(bp->regs);
        netdev_nullify(netdev);
        netdev_put(netdev);
}

References bp, iounmap(), netdev, netdev_nullify(), netdev_put(), pci_get_drvdata(), net_device::priv, ssb_core_disable(), and unregister_netdev().

b44_irq()

static void b44_irq ( struct net_device *  netdev, int  enable  )

static

Enable or disable interrupts.

Parameters

netdev	Network device
enable	Interrupts should be enabled

Definition at line 731 of file b44.c.

{
        struct b44_private *bp = netdev->priv;

        /* Interrupt mask specifies which events generate interrupts */
        bw32(bp, B44_IMASK, enable ? IMASK_DEF : IMASK_DISABLE);
}

References B44_IMASK, bp, bw32(), IMASK_DEF, IMASK_DISABLE, netdev, and net_device::priv.

Referenced by b44_open(), and b44_poll().

b44_open()

static int b44_open ( struct net_device *  netdev )

static

Open network device.

Parameters

netdev

Network device

Return values

rc	Return status code

Definition at line 745 of file b44.c.

{
        struct b44_private *bp = netdev->priv;
        int rc;

        rc = b44_init_tx_ring(bp);
        if (rc != 0)
                return rc;

        rc = b44_init_rx_ring(bp);
        if (rc != 0)
                return rc;

        b44_init_hw(bp, B44_FULL_RESET);

        /* Disable interrupts */
        b44_irq(netdev, 0);

        return 0;
}

References B44_FULL_RESET, b44_init_hw(), b44_init_rx_ring(), b44_init_tx_ring(), b44_irq(), bp, netdev, net_device::priv, and rc.

b44_close()

static void b44_close ( struct net_device *  netdev )

static

Close network device.

Parameters

netdev

Network device

Definition at line 771 of file b44.c.

{
        struct b44_private *bp = netdev->priv;

        b44_chip_reset(bp, B44_FULL_RESET);
        b44_free_tx_ring(bp);
        b44_free_rx_ring(bp);
}

References b44_chip_reset(), b44_free_rx_ring(), b44_free_tx_ring(), B44_FULL_RESET, bp, netdev, and net_device::priv.

b44_transmit()

static int b44_transmit ( struct net_device *  netdev, struct io_buffer *  iobuf  )

static

Transmit packet.

Parameters

netdev	Network device
iobuf	I/O buffer

Return values

rc	Return status code

Definition at line 787 of file b44.c.

{
        struct b44_private *bp = netdev->priv;
        u32 cur = bp->tx_cur;
        u32 ctrl;

        /* Check for TX ring overflow */
        if (bp->tx[cur].ctrl) {
                DBG("tx overflow\n");
                return -ENOBUFS;
        }

        /* Check for addressability */
        if (!b44_address_ok(iobuf->data))
                return -ENOTSUP;

        /* Will call netdev_tx_complete() on the iobuf later */
        bp->tx_iobuf[cur] = iobuf;

        /* Set up TX descriptor */
        ctrl = (iob_len(iobuf) & DESC_CTRL_LEN) |
            DESC_CTRL_IOC | DESC_CTRL_SOF | DESC_CTRL_EOF;

        if (cur == B44_RING_LAST)
                ctrl |= DESC_CTRL_EOT;

        bp->tx[cur].ctrl = cpu_to_le32(ctrl);
        bp->tx[cur].addr = cpu_to_le32(VIRT_TO_B44(iobuf->data));

        /* Update next available descriptor index */
        cur = ring_next(cur);
        bp->tx_cur = cur;
        wmb();

        /* Tell card that a new TX descriptor is ready */
        bw32(bp, B44_DMATX_PTR, cur * sizeof(struct dma_desc));
        return 0;
}

References b44_address_ok(), B44_DMATX_PTR, B44_RING_LAST, bp, bw32(), cpu_to_le32, ctrl, io_buffer::data, DBG, DESC_CTRL_EOF, DESC_CTRL_EOT, DESC_CTRL_IOC, DESC_CTRL_LEN, DESC_CTRL_SOF, ENOBUFS, ENOTSUP, iob_len(), netdev, net_device::priv, ring_next(), VIRT_TO_B44, and wmb().

b44_tx_complete()

static void b44_tx_complete ( struct b44_private *  bp )

static

Recycles sent TX descriptors and notifies network stack.

Parameters

bp	Driver state

Definition at line 831 of file b44.c.

{
        u32 cur, i;

        cur = pending_tx_index(bp);

        for (i = bp->tx_dirty; i != cur; i = ring_next(i)) {
                /* Free finished frame */
                netdev_tx_complete(bp->netdev, bp->tx_iobuf[i]);
                bp->tx_iobuf[i] = NULL;

                /* Clear TX descriptor */
                bp->tx[i].ctrl = 0;
                bp->tx[i].addr = 0;
        }
        bp->tx_dirty = cur;
}

References bp, netdev_tx_complete(), NULL, pending_tx_index(), and ring_next().

Referenced by b44_poll().

b44_process_rx_packets()

static void b44_process_rx_packets ( struct b44_private *  bp )

static

Definition at line 850 of file b44.c.

{
        struct io_buffer *iob;  /* received data */
        struct rx_header *rh;
        u32 pending, i;
        u16 len;

        pending = pending_rx_index(bp);

        for (i = bp->rx_cur; i != pending; i = ring_next(i)) {
                iob = bp->rx_iobuf[i];
                if (iob == NULL)
                        break;

                rh = iob->data;
                len = le16_to_cpu(rh->len);

                /*
                 * Guard against incompletely written RX descriptors.
                 * Without this, things can get really slow!
                 */
                if (len == 0)
                        break;

                /* Discard CRC that is generated by the card */
                len -= 4;

                /* Check for invalid packets and errors */
                if (len > RX_PKT_BUF_SZ - RX_PKT_OFFSET ||
                    (rh->flags & cpu_to_le16(RX_FLAG_ERRORS))) {
                        DBG("rx error len=%d flags=%04x\n", len,
                                         cpu_to_le16(rh->flags));
                        rh->len = 0;
                        rh->flags = 0;
                        netdev_rx_err(bp->netdev, iob, -EINVAL);
                        continue;
                }

                /* Clear RX descriptor */
                rh->len = 0;
                rh->flags = 0;
                bp->rx_iobuf[i] = NULL;

                /* Hand off the IO buffer to the network stack */
                iob_reserve(iob, RX_PKT_OFFSET);
                iob_put(iob, len);
                netdev_rx(bp->netdev, iob);
        }
        bp->rx_cur = i;
        b44_rx_refill(bp, pending_rx_index(bp));
}

References b44_rx_refill(), bp, cpu_to_le16, io_buffer::data, DBG, EINVAL, rx_header::flags, iob_put, iob_reserve, le16_to_cpu, len, rx_header::len, netdev_rx(), netdev_rx_err(), NULL, pending, pending_rx_index(), ring_next(), RX_FLAG_ERRORS, RX_PKT_BUF_SZ, and RX_PKT_OFFSET.

Referenced by b44_poll().

b44_poll()

static void b44_poll ( struct net_device *  netdev )

static

Poll for completed and received packets.

Parameters

netdev

Network device

Definition at line 907 of file b44.c.

{
        struct b44_private *bp = netdev->priv;
        u32 istat;

        /* Interrupt status */
        istat = br32(bp, B44_ISTAT);
        istat &= IMASK_DEF;     /* only the events we care about */

        if (!istat)
                return;
        if (istat & ISTAT_TX)
                b44_tx_complete(bp);
        if (istat & ISTAT_RX)
                b44_process_rx_packets(bp);
        if (istat & ISTAT_ERRORS) {
                DBG("b44 error istat=0x%08x\n", istat);

                /* Reset B44 core partially to avoid long waits */
                b44_irq(bp->netdev, 0);
                b44_halt(bp);
                b44_init_tx_ring(bp);
                b44_init_rx_ring(bp);
                b44_init_hw(bp, B44_FULL_RESET_SKIP_PHY);
        }

        /* Acknowledge interrupt */
        bw32(bp, B44_ISTAT, 0);
        bflush(bp, B44_ISTAT, 1);
}

References B44_FULL_RESET_SKIP_PHY, b44_halt(), b44_init_hw(), b44_init_rx_ring(), b44_init_tx_ring(), b44_irq(), B44_ISTAT, b44_process_rx_packets(), b44_tx_complete(), bflush(), bp, br32(), bw32(), DBG, IMASK_DEF, ISTAT_ERRORS, ISTAT_RX, ISTAT_TX, netdev, and net_device::priv.

Variable Documentation

b44_operations

struct net_device_operations b44_operations

static

Initial value:

= {
        .open = b44_open,
        .close = b44_close,
        .transmit = b44_transmit,
        .poll = b44_poll,
        .irq = b44_irq,
}

Definition at line 939 of file b44.c.

Referenced by b44_probe().

b44_nics

struct pci_device_id b44_nics[]

static

Initial value:

= {
        PCI_ROM(0x14e4, 0x170c, "BCM4401-B0", "BCM4401-B0", 0),
        PCI_ROM(0x14e4, 0x4401, "BCM4401", "BCM4401", 0),
        PCI_ROM(0x14e4, 0x4402, "BCM4401-B1", "BCM4401-B1", 0),
}

Definition at line 948 of file b44.c.

__pci_driver

struct pci_driver b44_driver __pci_driver

Initial value:

= {
        .ids = b44_nics,
        .id_count = sizeof b44_nics / sizeof b44_nics[0],
        .probe = b44_probe,
        .remove = b44_remove,
}

Definition at line 955 of file b44.c.