iPXE
realtek.c
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
3  *
4  * (EEPROM code originally implemented for rtl8139.c)
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of the
9  * License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19  * 02110-1301, USA.
20  *
21  * You can also choose to distribute this program under the terms of
22  * the Unmodified Binary Distribution Licence (as given in the file
23  * COPYING.UBDL), provided that you have satisfied its requirements.
24  */
25 
26 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
27 
28 #include <stdint.h>
29 #include <string.h>
30 #include <unistd.h>
31 #include <errno.h>
32 #include <byteswap.h>
33 #include <ipxe/netdevice.h>
34 #include <ipxe/ethernet.h>
35 #include <ipxe/if_ether.h>
36 #include <ipxe/iobuf.h>
37 #include <ipxe/malloc.h>
38 #include <ipxe/pci.h>
39 #include <ipxe/dma.h>
40 #include <ipxe/nvs.h>
41 #include <ipxe/threewire.h>
42 #include <ipxe/bitbash.h>
43 #include <ipxe/mii.h>
44 #include "realtek.h"
45 
46 /** @file
47  *
48  * Realtek 10/100/1000 network card driver
49  *
50  * Based on the following datasheets:
51  *
52  * http://www.datasheetarchive.com/dl/Datasheets-8/DSA-153536.pdf
53  * http://www.datasheetarchive.com/indexdl/Datasheet-028/DSA00494723.pdf
54  */
55 
56 /******************************************************************************
57  *
58  * Debugging
59  *
60  ******************************************************************************
61  */
62 
63 /**
64  * Dump all registers (for debugging)
65  *
66  * @v rtl Realtek device
67  */
68 static __attribute__ (( unused )) void realtek_dump ( struct realtek_nic *rtl ){
69  uint8_t regs[256];
70  unsigned int i;
71 
72  /* Do nothing unless debug output is enabled */
73  if ( ! DBG_LOG )
74  return;
75 
76  /* Dump registers (via byte accesses; may not work for all registers) */
77  for ( i = 0 ; i < sizeof ( regs ) ; i++ )
78  regs[i] = readb ( rtl->regs + i );
79  DBGC ( rtl, "REALTEK %p register dump:\n", rtl );
80  DBGC_HDA ( rtl, 0, regs, sizeof ( regs ) );
81 }
82 
83 /******************************************************************************
84  *
85  * EEPROM interface
86  *
87  ******************************************************************************
88  */
89 
90 /** Pin mapping for SPI bit-bashing interface */
91 static const uint8_t realtek_eeprom_bits[] = {
96 };
97 
98 /**
99  * Open bit-bashing interface
100  *
101  * @v basher Bit-bashing interface
102  */
103 static void realtek_spi_open_bit ( struct bit_basher *basher ) {
104  struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
105  spibit.basher );
106 
107  /* Enable EEPROM access */
109  readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
110 }
111 
112 /**
113  * Close bit-bashing interface
114  *
115  * @v basher Bit-bashing interface
116  */
117 static void realtek_spi_close_bit ( struct bit_basher *basher ) {
118  struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
119  spibit.basher );
120 
121  /* Disable EEPROM access */
123  readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
124 }
125 
126 /**
127  * Read input bit
128  *
129  * @v basher Bit-bashing interface
130  * @v bit_id Bit number
131  * @ret zero Input is a logic 0
132  * @ret non-zero Input is a logic 1
133  */
134 static int realtek_spi_read_bit ( struct bit_basher *basher,
135  unsigned int bit_id ) {
136  struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
137  spibit.basher );
138  uint8_t mask = realtek_eeprom_bits[bit_id];
139  uint8_t reg;
140 
142  reg = readb ( rtl->regs + RTL_9346CR );
143  DBG_ENABLE ( DBGLVL_IO );
144  return ( reg & mask );
145 }
146 
147 /**
148  * Set/clear output bit
149  *
150  * @v basher Bit-bashing interface
151  * @v bit_id Bit number
152  * @v data Value to write
153  */
154 static void realtek_spi_write_bit ( struct bit_basher *basher,
155  unsigned int bit_id, unsigned long data ) {
156  struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
157  spibit.basher );
158  uint8_t mask = realtek_eeprom_bits[bit_id];
159  uint8_t reg;
160 
162  reg = readb ( rtl->regs + RTL_9346CR );
163  reg &= ~mask;
164  reg |= ( data & mask );
165  writeb ( reg, rtl->regs + RTL_9346CR );
166  readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
167  DBG_ENABLE ( DBGLVL_IO );
168 }
169 
170 /** SPI bit-bashing interface */
173  .close = realtek_spi_close_bit,
174  .read = realtek_spi_read_bit,
175  .write = realtek_spi_write_bit,
176 };
177 
178 /**
179  * Initialise EEPROM
180  *
181  * @v netdev Network device
182  * @ret rc Return status code
183  */
184 static int realtek_init_eeprom ( struct net_device *netdev ) {
185  struct realtek_nic *rtl = netdev->priv;
186  uint16_t id;
187  int rc;
188 
189  /* Initialise SPI bit-bashing interface */
192  init_spi_bit_basher ( &rtl->spibit );
193 
194  /* Detect EEPROM type and initialise three-wire device */
195  if ( readl ( rtl->regs + RTL_RCR ) & RTL_RCR_9356SEL ) {
196  DBGC ( rtl, "REALTEK %p EEPROM is a 93C56\n", rtl );
197  init_at93c56 ( &rtl->eeprom, 16 );
198  } else {
199  DBGC ( rtl, "REALTEK %p EEPROM is a 93C46\n", rtl );
200  init_at93c46 ( &rtl->eeprom, 16 );
201  }
202 
203  /* Check for EEPROM presence. Some onboard NICs will have no
204  * EEPROM connected, with the BIOS being responsible for
205  * programming the initial register values.
206  */
207  if ( ( rc = nvs_read ( &rtl->eeprom.nvs, RTL_EEPROM_ID,
208  &id, sizeof ( id ) ) ) != 0 ) {
209  DBGC ( rtl, "REALTEK %p could not read EEPROM ID: %s\n",
210  rtl, strerror ( rc ) );
211  return rc;
212  }
213  if ( id != cpu_to_le16 ( RTL_EEPROM_ID_MAGIC ) ) {
214  DBGC ( rtl, "REALTEK %p EEPROM ID incorrect (%#04x); assuming "
215  "no EEPROM\n", rtl, le16_to_cpu ( id ) );
216  return -ENODEV;
217  }
218 
219  /* Initialise space for non-volatile options, if available
220  *
221  * We use offset 0x40 (i.e. address 0x20), length 0x40. This
222  * block is marked as VPD in the Realtek datasheets, so we use
223  * it only if we detect that the card is not supporting VPD.
224  */
225  if ( readb ( rtl->regs + RTL_CONFIG1 ) & RTL_CONFIG1_VPD ) {
226  DBGC ( rtl, "REALTEK %p EEPROM in use for VPD; cannot use "
227  "for options\n", rtl );
228  } else {
229  nvo_init ( &rtl->nvo, &rtl->eeprom.nvs, RTL_EEPROM_VPD,
231  }
232 
233  return 0;
234 }
235 
236 /******************************************************************************
237  *
238  * MII interface
239  *
240  ******************************************************************************
241  */
242 
243 /**
244  * Read from MII register
245  *
246  * @v mdio MII interface
247  * @v phy PHY address
248  * @v reg Register address
249  * @ret value Data read, or negative error
250  */
251 static int realtek_mii_read ( struct mii_interface *mdio,
252  unsigned int phy __unused, unsigned int reg ) {
253  struct realtek_nic *rtl =
254  container_of ( mdio, struct realtek_nic, mdio );
255  unsigned int i;
256  uint32_t value;
257 
258  /* Fail if PHYAR register is not present */
259  if ( ! rtl->have_phy_regs )
260  return -ENOTSUP;
261 
262  /* Initiate read */
263  writel ( RTL_PHYAR_VALUE ( 0, reg, 0 ), rtl->regs + RTL_PHYAR );
264 
265  /* Wait for read to complete */
266  for ( i = 0 ; i < RTL_MII_MAX_WAIT_US ; i++ ) {
267 
268  /* If read is not complete, delay 1us and retry */
269  value = readl ( rtl->regs + RTL_PHYAR );
270  if ( ! ( value & RTL_PHYAR_FLAG ) ) {
271  udelay ( 1 );
272  continue;
273  }
274 
275  /* Return register value */
276  return ( RTL_PHYAR_DATA ( value ) );
277  }
278 
279  DBGC ( rtl, "REALTEK %p timed out waiting for MII read\n", rtl );
280  return -ETIMEDOUT;
281 }
282 
283 /**
284  * Write to MII register
285  *
286  * @v mdio MII interface
287  * @v phy PHY address
288  * @v reg Register address
289  * @v data Data to write
290  * @ret rc Return status code
291  */
292 static int realtek_mii_write ( struct mii_interface *mdio,
293  unsigned int phy __unused, unsigned int reg,
294  unsigned int data ) {
295  struct realtek_nic *rtl =
296  container_of ( mdio, struct realtek_nic, mdio );
297  unsigned int i;
298 
299  /* Fail if PHYAR register is not present */
300  if ( ! rtl->have_phy_regs )
301  return -ENOTSUP;
302 
303  /* Initiate write */
305  rtl->regs + RTL_PHYAR );
306 
307  /* Wait for write to complete */
308  for ( i = 0 ; i < RTL_MII_MAX_WAIT_US ; i++ ) {
309 
310  /* If write is not complete, delay 1us and retry */
311  if ( readl ( rtl->regs + RTL_PHYAR ) & RTL_PHYAR_FLAG ) {
312  udelay ( 1 );
313  continue;
314  }
315 
316  return 0;
317  }
318 
319  DBGC ( rtl, "REALTEK %p timed out waiting for MII write\n", rtl );
320  return -ETIMEDOUT;
321 }
322 
323 /** Realtek MII operations */
326  .write = realtek_mii_write,
327 };
328 
329 /******************************************************************************
330  *
331  * Device reset
332  *
333  ******************************************************************************
334  */
335 
336 /**
337  * Reset hardware
338  *
339  * @v rtl Realtek device
340  * @ret rc Return status code
341  */
342 static int realtek_reset ( struct realtek_nic *rtl ) {
343  unsigned int i;
344 
345  /* Issue reset */
346  writeb ( RTL_CR_RST, rtl->regs + RTL_CR );
347 
348  /* Wait for reset to complete */
349  for ( i = 0 ; i < RTL_RESET_MAX_WAIT_MS ; i++ ) {
350 
351  /* If reset is not complete, delay 1ms and retry */
352  if ( readb ( rtl->regs + RTL_CR ) & RTL_CR_RST ) {
353  mdelay ( 1 );
354  continue;
355  }
356 
357  return 0;
358  }
359 
360  DBGC ( rtl, "REALTEK %p timed out waiting for reset\n", rtl );
361  return -ETIMEDOUT;
362 }
363 
364 /**
365  * Configure PHY for Gigabit operation
366  *
367  * @v rtl Realtek device
368  * @ret rc Return status code
369  */
370 static int realtek_phy_speed ( struct realtek_nic *rtl ) {
371  int ctrl1000;
372  int rc;
373 
374  /* Read CTRL1000 register */
375  ctrl1000 = mii_read ( &rtl->mii, MII_CTRL1000 );
376  if ( ctrl1000 < 0 ) {
377  rc = ctrl1000;
378  DBGC ( rtl, "REALTEK %p could not read CTRL1000: %s\n",
379  rtl, strerror ( rc ) );
380  return rc;
381  }
382 
383  /* Advertise 1000Mbps speeds */
384  ctrl1000 |= ( ADVERTISE_1000FULL | ADVERTISE_1000HALF );
385  if ( ( rc = mii_write ( &rtl->mii, MII_CTRL1000, ctrl1000 ) ) != 0 ) {
386  DBGC ( rtl, "REALTEK %p could not write CTRL1000: %s\n",
387  rtl, strerror ( rc ) );
388  return rc;
389  }
390 
391  return 0;
392 }
393 
394 /**
395  * Reset PHY
396  *
397  * @v rtl Realtek device
398  * @ret rc Return status code
399  */
400 static int realtek_phy_reset ( struct realtek_nic *rtl ) {
401  int rc;
402 
403  /* Do nothing if we have no separate PHY register access */
404  if ( ! rtl->have_phy_regs )
405  return 0;
406 
407  /* Perform MII reset */
408  if ( ( rc = mii_reset ( &rtl->mii ) ) != 0 ) {
409  DBGC ( rtl, "REALTEK %p could not reset MII: %s\n",
410  rtl, strerror ( rc ) );
411  return rc;
412  }
413 
414  /* Some cards (e.g. RTL8169SC) do not advertise Gigabit by
415  * default. Try to enable advertisement of Gigabit speeds.
416  */
417  if ( ( rc = realtek_phy_speed ( rtl ) ) != 0 ) {
418  /* Ignore failures, since the register may not be
419  * present on non-Gigabit PHYs (e.g. RTL8101).
420  */
421  }
422 
423  /* Some cards (e.g. RTL8211B) have a hardware errata that
424  * requires the MII_MMD_DATA register to be cleared before the
425  * link will come up.
426  */
427  if ( ( rc = mii_write ( &rtl->mii, MII_MMD_DATA, 0 ) ) != 0 ) {
428  /* Ignore failures, since the register may not be
429  * present on all PHYs.
430  */
431  }
432 
433  /* Restart autonegotiation */
434  if ( ( rc = mii_restart ( &rtl->mii ) ) != 0 ) {
435  DBGC ( rtl, "REALTEK %p could not restart MII: %s\n",
436  rtl, strerror ( rc ) );
437  return rc;
438  }
439 
440  return 0;
441 }
442 
443 /******************************************************************************
444  *
445  * Link state
446  *
447  ******************************************************************************
448  */
449 
450 /**
451  * Check link state
452  *
453  * @v netdev Network device
454  */
455 static void realtek_check_link ( struct net_device *netdev ) {
456  struct realtek_nic *rtl = netdev->priv;
457  uint8_t phystatus;
458  uint8_t msr;
459  int link_up;
460 
461  /* Determine link state */
462  if ( rtl->have_phy_regs ) {
463  mii_dump ( &rtl->mii );
464  phystatus = readb ( rtl->regs + RTL_PHYSTATUS );
465  link_up = ( phystatus & RTL_PHYSTATUS_LINKSTS );
466  DBGC ( rtl, "REALTEK %p PHY status is %02x (%s%s%s%s%s%s, "
467  "Link%s, %sDuplex)\n", rtl, phystatus,
468  ( ( phystatus & RTL_PHYSTATUS_ENTBI ) ? "TBI" : "GMII" ),
469  ( ( phystatus & RTL_PHYSTATUS_TXFLOW ) ?
470  ", TxFlow" : "" ),
471  ( ( phystatus & RTL_PHYSTATUS_RXFLOW ) ?
472  ", RxFlow" : "" ),
473  ( ( phystatus & RTL_PHYSTATUS_1000MF ) ?
474  ", 1000Mbps" : "" ),
475  ( ( phystatus & RTL_PHYSTATUS_100M ) ?
476  ", 100Mbps" : "" ),
477  ( ( phystatus & RTL_PHYSTATUS_10M ) ?
478  ", 10Mbps" : "" ),
479  ( ( phystatus & RTL_PHYSTATUS_LINKSTS ) ?
480  "Up" : "Down" ),
481  ( ( phystatus & RTL_PHYSTATUS_FULLDUP ) ?
482  "Full" : "Half" ) );
483  } else {
484  msr = readb ( rtl->regs + RTL_MSR );
485  link_up = ( ! ( msr & RTL_MSR_LINKB ) );
486  DBGC ( rtl, "REALTEK %p media status is %02x (Link%s, "
487  "%dMbps%s%s%s%s%s)\n", rtl, msr,
488  ( ( msr & RTL_MSR_LINKB ) ? "Down" : "Up" ),
489  ( ( msr & RTL_MSR_SPEED_10 ) ? 10 : 100 ),
490  ( ( msr & RTL_MSR_TXFCE ) ? ", TxFlow" : "" ),
491  ( ( msr & RTL_MSR_RXFCE ) ? ", RxFlow" : "" ),
492  ( ( msr & RTL_MSR_AUX_STATUS ) ? ", AuxPwr" : "" ),
493  ( ( msr & RTL_MSR_TXPF ) ? ", TxPause" : "" ),
494  ( ( msr & RTL_MSR_RXPF ) ? ", RxPause" : "" ) );
495  }
496 
497  /* Report link state */
498  if ( link_up ) {
500  } else {
502  }
503 }
504 
505 /******************************************************************************
506  *
507  * Network device interface
508  *
509  ******************************************************************************
510  */
511 
512 /**
513  * Create receive buffer (legacy mode)
514  *
515  * @v rtl Realtek device
516  * @ret rc Return status code
517  */
518 static int realtek_create_buffer ( struct realtek_nic *rtl ) {
519  struct realtek_rx_buffer *rxbuf = &rtl->rxbuf;
520  size_t len = ( RTL_RXBUF_LEN + RTL_RXBUF_PAD );
521 
522  /* Do nothing unless in legacy mode */
523  if ( ! rtl->legacy )
524  return 0;
525 
526  /* Allocate buffer */
527  rxbuf->data = dma_alloc ( rtl->dma, &rxbuf->map, len,
528  RTL_RXBUF_ALIGN );
529  if ( ! rxbuf->data )
530  return -ENOMEM;
531 
532  /* Program buffer address */
533  writel ( dma ( &rxbuf->map, rxbuf->data ), rtl->regs + RTL_RBSTART );
534  DBGC ( rtl, "REALTEK %p receive buffer is at [%08lx,%08lx,%08lx)\n",
535  rtl, virt_to_phys ( rxbuf->data ),
536  ( virt_to_phys ( rxbuf->data ) + RTL_RXBUF_LEN ),
537  ( virt_to_phys ( rxbuf->data ) + len ) );
538 
539  return 0;
540 }
541 
542 /**
543  * Destroy receive buffer (legacy mode)
544  *
545  * @v rtl Realtek device
546  */
547 static void realtek_destroy_buffer ( struct realtek_nic *rtl ) {
548  struct realtek_rx_buffer *rxbuf = &rtl->rxbuf;
549  size_t len = ( RTL_RXBUF_LEN + RTL_RXBUF_PAD );
550 
551  /* Do nothing unless in legacy mode */
552  if ( ! rtl->legacy )
553  return;
554 
555  /* Clear buffer address */
556  writel ( 0, rtl->regs + RTL_RBSTART );
557 
558  /* Free buffer */
559  dma_free ( &rxbuf->map, rxbuf->data, len );
560  rxbuf->data = NULL;
561  rxbuf->offset = 0;
562 }
563 
564 /**
565  * Create descriptor ring
566  *
567  * @v rtl Realtek device
568  * @v ring Descriptor ring
569  * @ret rc Return status code
570  */
571 static int realtek_create_ring ( struct realtek_nic *rtl,
572  struct realtek_ring *ring ) {
574 
575  /* Do nothing in legacy mode */
576  if ( rtl->legacy )
577  return 0;
578 
579  /* Allocate descriptor ring */
580  ring->desc = dma_alloc ( rtl->dma, &ring->map, ring->len,
581  RTL_RING_ALIGN );
582  if ( ! ring->desc )
583  return -ENOMEM;
584 
585  /* Initialise descriptor ring */
586  memset ( ring->desc, 0, ring->len );
587 
588  /* Program ring address */
589  address = dma ( &ring->map, ring->desc );
590  writel ( ( ( ( uint64_t ) address ) >> 32 ),
591  rtl->regs + ring->reg + 4 );
592  writel ( ( address & 0xffffffffUL ), rtl->regs + ring->reg );
593  DBGC ( rtl, "REALTEK %p ring %02x is at [%08lx,%08lx)\n",
594  rtl, ring->reg, virt_to_phys ( ring->desc ),
595  ( virt_to_phys ( ring->desc ) + ring->len ) );
596 
597  return 0;
598 }
599 
600 /**
601  * Destroy descriptor ring
602  *
603  * @v rtl Realtek device
604  * @v ring Descriptor ring
605  */
606 static void realtek_destroy_ring ( struct realtek_nic *rtl,
607  struct realtek_ring *ring ) {
608 
609  /* Reset producer and consumer counters */
610  ring->prod = 0;
611  ring->cons = 0;
612 
613  /* Do nothing more if in legacy mode */
614  if ( rtl->legacy )
615  return;
616 
617  /* Clear ring address */
618  writel ( 0, rtl->regs + ring->reg );
619  writel ( 0, rtl->regs + ring->reg + 4 );
620 
621  /* Free descriptor ring */
622  dma_free ( &ring->map, ring->desc, ring->len );
623  ring->desc = NULL;
624 }
625 
626 /**
627  * Refill receive descriptor ring
628  *
629  * @v rtl Realtek device
630  */
631 static void realtek_refill_rx ( struct realtek_nic *rtl ) {
632  struct realtek_descriptor *rx;
633  struct io_buffer *iobuf;
634  unsigned int rx_idx;
635  int is_last;
636 
637  /* Do nothing in legacy mode */
638  if ( rtl->legacy )
639  return;
640 
641  while ( ( rtl->rx.prod - rtl->rx.cons ) < RTL_NUM_RX_DESC ) {
642 
643  /* Allocate I/O buffer */
644  iobuf = alloc_rx_iob ( RTL_RX_MAX_LEN, rtl->dma );
645  if ( ! iobuf ) {
646  /* Wait for next refill */
647  return;
648  }
649 
650  /* Get next receive descriptor */
651  rx_idx = ( rtl->rx.prod++ % RTL_NUM_RX_DESC );
652  is_last = ( rx_idx == ( RTL_NUM_RX_DESC - 1 ) );
653  rx = &rtl->rx.desc[rx_idx];
654 
655  /* Populate receive descriptor */
656  rx->address = cpu_to_le64 ( iob_dma ( iobuf ) );
657  rx->length = cpu_to_le16 ( RTL_RX_MAX_LEN );
658  wmb();
659  rx->flags = ( cpu_to_le16 ( RTL_DESC_OWN ) |
660  ( is_last ? cpu_to_le16 ( RTL_DESC_EOR ) : 0 ) );
661  wmb();
662 
663  /* Record I/O buffer */
664  assert ( rtl->rx_iobuf[rx_idx] == NULL );
665  rtl->rx_iobuf[rx_idx] = iobuf;
666 
667  DBGC2 ( rtl, "REALTEK %p RX %d is [%lx,%lx)\n",
668  rtl, rx_idx, virt_to_phys ( iobuf->data ),
669  ( virt_to_phys ( iobuf->data ) + RTL_RX_MAX_LEN ) );
670  }
671 }
672 
673 /**
674  * Open network device
675  *
676  * @v netdev Network device
677  * @ret rc Return status code
678  */
679 static int realtek_open ( struct net_device *netdev ) {
680  struct realtek_nic *rtl = netdev->priv;
681  uint32_t tcr;
682  uint32_t rcr;
683  int rc;
684 
685  /* Create transmit descriptor ring */
686  if ( ( rc = realtek_create_ring ( rtl, &rtl->tx ) ) != 0 )
687  goto err_create_tx;
688 
689  /* Create receive descriptor ring */
690  if ( ( rc = realtek_create_ring ( rtl, &rtl->rx ) ) != 0 )
691  goto err_create_rx;
692 
693  /* Create receive buffer */
694  if ( ( rc = realtek_create_buffer ( rtl ) ) != 0 )
695  goto err_create_buffer;
696 
697  /* Accept all packets */
698  writel ( 0xffffffffUL, rtl->regs + RTL_MAR0 );
699  writel ( 0xffffffffUL, rtl->regs + RTL_MAR4 );
700 
701  /* Enable transmitter and receiver. RTL8139 requires that
702  * this happens before writing to RCR.
703  */
704  writeb ( ( RTL_CR_TE | RTL_CR_RE ), rtl->regs + RTL_CR );
705 
706  /* Configure transmitter */
707  tcr = readl ( rtl->regs + RTL_TCR );
708  tcr &= ~RTL_TCR_MXDMA_MASK;
709  tcr |= RTL_TCR_MXDMA_DEFAULT;
710  writel ( tcr, rtl->regs + RTL_TCR );
711 
712  /* Configure receiver */
713  rcr = readl ( rtl->regs + RTL_RCR );
719  writel ( rcr, rtl->regs + RTL_RCR );
720 
721  /* Fill receive ring */
722  realtek_refill_rx ( rtl );
723 
724  /* Update link state */
726 
727  return 0;
728 
729  realtek_destroy_buffer ( rtl );
730  err_create_buffer:
731  realtek_destroy_ring ( rtl, &rtl->rx );
732  err_create_rx:
733  realtek_destroy_ring ( rtl, &rtl->tx );
734  err_create_tx:
735  return rc;
736 }
737 
738 /**
739  * Close network device
740  *
741  * @v netdev Network device
742  */
743 static void realtek_close ( struct net_device *netdev ) {
744  struct realtek_nic *rtl = netdev->priv;
745  unsigned int i;
746 
747  /* Disable receiver and transmitter */
748  writeb ( 0, rtl->regs + RTL_CR );
749 
750  /* Destroy receive buffer */
751  realtek_destroy_buffer ( rtl );
752 
753  /* Destroy receive descriptor ring */
754  realtek_destroy_ring ( rtl, &rtl->rx );
755 
756  /* Discard any unused receive buffers */
757  for ( i = 0 ; i < RTL_NUM_RX_DESC ; i++ ) {
758  if ( rtl->rx_iobuf[i] )
759  free_rx_iob ( rtl->rx_iobuf[i] );
760  rtl->rx_iobuf[i] = NULL;
761  }
762 
763  /* Destroy transmit descriptor ring */
764  realtek_destroy_ring ( rtl, &rtl->tx );
765 
766  /* Reset legacy transmit descriptor index, if applicable */
767  if ( rtl->legacy )
768  realtek_reset ( rtl );
769 }
770 
771 /**
772  * Transmit packet
773  *
774  * @v netdev Network device
775  * @v iobuf I/O buffer
776  * @ret rc Return status code
777  */
778 static int realtek_transmit ( struct net_device *netdev,
779  struct io_buffer *iobuf ) {
780  struct realtek_nic *rtl = netdev->priv;
781  struct realtek_descriptor *tx;
782  unsigned int tx_idx;
783  int is_last;
784  int rc;
785 
786  /* Get next transmit descriptor */
787  if ( ( rtl->tx.prod - rtl->tx.cons ) >= RTL_NUM_TX_DESC ) {
788  netdev_tx_defer ( netdev, iobuf );
789  return 0;
790  }
791  tx_idx = ( rtl->tx.prod % RTL_NUM_TX_DESC );
792 
793  /* Pad and align packet, if needed */
794  if ( rtl->legacy )
795  iob_pad ( iobuf, ETH_ZLEN );
796 
797  /* Map I/O buffer */
798  if ( ( rc = iob_map_tx ( iobuf, rtl->dma ) ) != 0 )
799  return rc;
800 
801  /* Update producer index */
802  rtl->tx.prod++;
803 
804  /* Transmit packet */
805  if ( rtl->legacy ) {
806 
807  /* Add to transmit ring */
808  writel ( iob_dma ( iobuf ), rtl->regs + RTL_TSAD ( tx_idx ) );
809  writel ( ( RTL_TSD_ERTXTH_DEFAULT | iob_len ( iobuf ) ),
810  rtl->regs + RTL_TSD ( tx_idx ) );
811 
812  } else {
813 
814  /* Populate transmit descriptor */
815  is_last = ( tx_idx == ( RTL_NUM_TX_DESC - 1 ) );
816  tx = &rtl->tx.desc[tx_idx];
817  tx->address = cpu_to_le64 ( iob_dma ( iobuf ) );
818  tx->length = cpu_to_le16 ( iob_len ( iobuf ) );
819  wmb();
820  tx->flags = ( cpu_to_le16 ( RTL_DESC_OWN | RTL_DESC_FS |
821  RTL_DESC_LS ) |
822  ( is_last ? cpu_to_le16 ( RTL_DESC_EOR ) : 0 ) );
823  wmb();
824 
825  /* Notify card that there are packets ready to transmit */
826  writeb ( RTL_TPPOLL_NPQ, rtl->regs + rtl->tppoll );
827  }
828 
829  DBGC2 ( rtl, "REALTEK %p TX %d is [%lx,%lx)\n",
830  rtl, tx_idx, virt_to_phys ( iobuf->data ),
831  virt_to_phys ( iobuf->data ) + iob_len ( iobuf ) );
832 
833  return 0;
834 }
835 
836 /**
837  * Poll for completed packets
838  *
839  * @v netdev Network device
840  */
841 static void realtek_poll_tx ( struct net_device *netdev ) {
842  struct realtek_nic *rtl = netdev->priv;
843  struct realtek_descriptor *tx;
844  unsigned int tx_idx;
845 
846  /* Check for completed packets */
847  while ( rtl->tx.cons != rtl->tx.prod ) {
848 
849  /* Get next transmit descriptor */
850  tx_idx = ( rtl->tx.cons % RTL_NUM_TX_DESC );
851 
852  /* Stop if descriptor is still in use */
853  if ( rtl->legacy ) {
854 
855  /* Check ownership bit in transmit status register */
856  if ( ! ( readl ( rtl->regs + RTL_TSD ( tx_idx ) ) &
857  RTL_TSD_OWN ) )
858  return;
859 
860  } else {
861 
862  /* Check ownership bit in descriptor */
863  tx = &rtl->tx.desc[tx_idx];
864  if ( tx->flags & cpu_to_le16 ( RTL_DESC_OWN ) )
865  return;
866  }
867 
868  DBGC2 ( rtl, "REALTEK %p TX %d complete\n", rtl, tx_idx );
869 
870  /* Complete TX descriptor */
871  rtl->tx.cons++;
873  }
874 }
875 
876 /**
877  * Poll for received packets (legacy mode)
878  *
879  * @v netdev Network device
880  */
881 static void realtek_legacy_poll_rx ( struct net_device *netdev ) {
882  struct realtek_nic *rtl = netdev->priv;
883  struct realtek_legacy_header *rx;
884  struct io_buffer *iobuf;
885  size_t len;
886 
887  /* Check for received packets */
888  while ( ! ( readb ( rtl->regs + RTL_CR ) & RTL_CR_BUFE ) ) {
889 
890  /* Extract packet from receive buffer */
891  rx = ( rtl->rxbuf.data + rtl->rxbuf.offset );
892  len = le16_to_cpu ( rx->length );
893  if ( rx->status & cpu_to_le16 ( RTL_STAT_ROK ) ) {
894 
895  DBGC2 ( rtl, "REALTEK %p RX offset %x+%zx\n",
896  rtl, rtl->rxbuf.offset, len );
897 
898  /* Allocate I/O buffer */
899  iobuf = alloc_iob ( len );
900  if ( ! iobuf ) {
902  /* Leave packet for next poll */
903  break;
904  }
905 
906  /* Copy data to I/O buffer */
907  memcpy ( iob_put ( iobuf, len ), rx->data, len );
908  iob_unput ( iobuf, 4 /* strip CRC */ );
909 
910  /* Hand off to network stack */
911  netdev_rx ( netdev, iobuf );
912 
913  } else {
914 
915  DBGC ( rtl, "REALTEK %p RX offset %x+%zx error %04x\n",
916  rtl, rtl->rxbuf.offset, len,
917  le16_to_cpu ( rx->status ) );
918  netdev_rx_err ( netdev, NULL, -EIO );
919  }
920 
921  /* Update buffer offset */
922  rtl->rxbuf.offset += ( sizeof ( *rx ) + len );
923  rtl->rxbuf.offset = ( ( rtl->rxbuf.offset + 3 ) & ~3 );
924  rtl->rxbuf.offset = ( rtl->rxbuf.offset % RTL_RXBUF_LEN );
925  writew ( ( rtl->rxbuf.offset - 16 ), rtl->regs + RTL_CAPR );
926 
927  /* Give chip time to react before rechecking RTL_CR */
928  readw ( rtl->regs + RTL_CAPR );
929  }
930 }
931 
932 /**
933  * Poll for received packets
934  *
935  * @v netdev Network device
936  */
937 static void realtek_poll_rx ( struct net_device *netdev ) {
938  struct realtek_nic *rtl = netdev->priv;
939  struct realtek_descriptor *rx;
940  struct io_buffer *iobuf;
941  unsigned int rx_idx;
942  size_t len;
943 
944  /* Poll receive buffer if in legacy mode */
945  if ( rtl->legacy ) {
947  return;
948  }
949 
950  /* Check for received packets */
951  while ( rtl->rx.cons != rtl->rx.prod ) {
952 
953  /* Get next receive descriptor */
954  rx_idx = ( rtl->rx.cons % RTL_NUM_RX_DESC );
955  rx = &rtl->rx.desc[rx_idx];
956 
957  /* Stop if descriptor is still in use */
958  if ( rx->flags & cpu_to_le16 ( RTL_DESC_OWN ) )
959  return;
960 
961  /* Populate I/O buffer */
962  iobuf = rtl->rx_iobuf[rx_idx];
963  rtl->rx_iobuf[rx_idx] = NULL;
964  len = ( le16_to_cpu ( rx->length ) & RTL_DESC_SIZE_MASK );
965  iob_put ( iobuf, ( len - 4 /* strip CRC */ ) );
966 
967  /* Hand off to network stack */
968  if ( rx->flags & cpu_to_le16 ( RTL_DESC_RES ) ) {
969  DBGC ( rtl, "REALTEK %p RX %d error (length %zd, "
970  "flags %04x)\n", rtl, rx_idx, len,
971  le16_to_cpu ( rx->flags ) );
972  netdev_rx_err ( netdev, iobuf, -EIO );
973  } else {
974  DBGC2 ( rtl, "REALTEK %p RX %d complete (length "
975  "%zd)\n", rtl, rx_idx, len );
976  netdev_rx ( netdev, iobuf );
977  }
978  rtl->rx.cons++;
979  }
980 }
981 
982 /**
983  * Poll for completed and received packets
984  *
985  * @v netdev Network device
986  */
987 static void realtek_poll ( struct net_device *netdev ) {
988  struct realtek_nic *rtl = netdev->priv;
989  uint16_t isr;
990 
991  /* Check for and acknowledge interrupts */
992  isr = readw ( rtl->regs + RTL_ISR );
993  if ( ! isr )
994  return;
995  writew ( isr, rtl->regs + RTL_ISR );
996 
997  /* Poll for TX completions, if applicable */
998  if ( isr & ( RTL_IRQ_TER | RTL_IRQ_TOK ) )
1000 
1001  /* Poll for RX completionsm, if applicable */
1002  if ( isr & ( RTL_IRQ_RER | RTL_IRQ_ROK ) )
1003  realtek_poll_rx ( netdev );
1004 
1005  /* Check link state, if applicable */
1006  if ( isr & RTL_IRQ_PUN_LINKCHG )
1008 
1009  /* Refill RX ring */
1010  realtek_refill_rx ( rtl );
1011 }
1012 
1013 /**
1014  * Enable or disable interrupts
1015  *
1016  * @v netdev Network device
1017  * @v enable Interrupts should be enabled
1018  */
1019 static void realtek_irq ( struct net_device *netdev, int enable ) {
1020  struct realtek_nic *rtl = netdev->priv;
1021  uint16_t imr;
1022 
1023  /* Set interrupt mask */
1024  imr = ( enable ? ( RTL_IRQ_PUN_LINKCHG | RTL_IRQ_TER | RTL_IRQ_TOK |
1025  RTL_IRQ_RER | RTL_IRQ_ROK ) : 0 );
1026  writew ( imr, rtl->regs + RTL_IMR );
1027 }
1028 
1029 /** Realtek network device operations */
1031  .open = realtek_open,
1032  .close = realtek_close,
1033  .transmit = realtek_transmit,
1034  .poll = realtek_poll,
1035  .irq = realtek_irq,
1036 };
1037 
1038 /******************************************************************************
1039  *
1040  * PCI interface
1041  *
1042  ******************************************************************************
1043  */
1044 
1045 /**
1046  * Detect device type
1047  *
1048  * @v rtl Realtek device
1049  */
1050 static void realtek_detect ( struct realtek_nic *rtl ) {
1051  uint16_t rms;
1052  uint16_t check_rms;
1053  uint16_t cpcr;
1054  uint16_t check_cpcr;
1055 
1056  /* The RX Packet Maximum Size register is present only on
1057  * 8169. Try to set to our intended MTU.
1058  */
1059  rms = RTL_RX_MAX_LEN;
1060  writew ( rms, rtl->regs + RTL_RMS );
1061  check_rms = readw ( rtl->regs + RTL_RMS );
1062 
1063  /* The C+ Command register is present only on 8169 and 8139C+.
1064  * Try to enable C+ mode and PCI Dual Address Cycle (for
1065  * 64-bit systems), if supported.
1066  *
1067  * Note that enabling DAC seems to cause bizarre behaviour
1068  * (lockups, garbage data on the wire) on some systems, even
1069  * if only 32-bit addresses are used.
1070  *
1071  * Disable VLAN offload, since some cards seem to have it
1072  * enabled by default.
1073  */
1074  cpcr = readw ( rtl->regs + RTL_CPCR );
1075  cpcr |= ( RTL_CPCR_MULRW | RTL_CPCR_CPRX | RTL_CPCR_CPTX );
1076  if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) )
1077  cpcr |= RTL_CPCR_DAC;
1078  cpcr &= ~RTL_CPCR_VLAN;
1079  writew ( cpcr, rtl->regs + RTL_CPCR );
1080  check_cpcr = readw ( rtl->regs + RTL_CPCR );
1081 
1082  /* Detect device type */
1083  if ( check_rms == rms ) {
1084  DBGC ( rtl, "REALTEK %p appears to be an RTL8169\n", rtl );
1085  rtl->have_phy_regs = 1;
1086  rtl->tppoll = RTL_TPPOLL_8169;
1087  dma_set_mask_64bit ( rtl->dma );
1088  } else {
1089  if ( ( check_cpcr == cpcr ) && ( cpcr != 0xffff ) ) {
1090  DBGC ( rtl, "REALTEK %p appears to be an RTL8139C+\n",
1091  rtl );
1092  rtl->tppoll = RTL_TPPOLL_8139CP;
1093  dma_set_mask_64bit ( rtl->dma );
1094  } else {
1095  DBGC ( rtl, "REALTEK %p appears to be an RTL8139\n",
1096  rtl );
1097  rtl->legacy = 1;
1098  }
1099  rtl->eeprom.bus = &rtl->spibit.bus;
1100  }
1101 }
1102 
1103 /**
1104  * Probe PCI device
1105  *
1106  * @v pci PCI device
1107  * @ret rc Return status code
1108  */
1109 static int realtek_probe ( struct pci_device *pci ) {
1110  struct net_device *netdev;
1111  struct realtek_nic *rtl;
1112  unsigned int i;
1113  int rc;
1114 
1115  /* Allocate and initialise net device */
1116  netdev = alloc_etherdev ( sizeof ( *rtl ) );
1117  if ( ! netdev ) {
1118  rc = -ENOMEM;
1119  goto err_alloc;
1120  }
1122  rtl = netdev->priv;
1123  pci_set_drvdata ( pci, netdev );
1124  netdev->dev = &pci->dev;
1125  memset ( rtl, 0, sizeof ( *rtl ) );
1128 
1129  /* Fix up PCI device */
1130  adjust_pci_device ( pci );
1131 
1132  /* Map registers */
1133  rtl->regs = pci_ioremap ( pci, pci->membase, RTL_BAR_SIZE );
1134  if ( ! rtl->regs ) {
1135  rc = -ENODEV;
1136  goto err_ioremap;
1137  }
1138 
1139  /* Configure DMA */
1140  rtl->dma = &pci->dma;
1141 
1142  /* Reset the NIC */
1143  if ( ( rc = realtek_reset ( rtl ) ) != 0 )
1144  goto err_reset;
1145 
1146  /* Detect device type */
1147  realtek_detect ( rtl );
1148 
1149  /* Initialise EEPROM */
1150  if ( rtl->eeprom.bus &&
1151  ( ( rc = realtek_init_eeprom ( netdev ) ) == 0 ) ) {
1152 
1153  /* Read MAC address from EEPROM */
1154  if ( ( rc = nvs_read ( &rtl->eeprom.nvs, RTL_EEPROM_MAC,
1155  netdev->hw_addr, ETH_ALEN ) ) != 0 ) {
1156  DBGC ( rtl, "REALTEK %p could not read MAC address: "
1157  "%s\n", rtl, strerror ( rc ) );
1158  goto err_nvs_read;
1159  }
1160 
1161  } else {
1162 
1163  /* EEPROM not present. Fall back to reading the
1164  * current ID register value, which will hopefully
1165  * have been programmed by the platform firmware.
1166  */
1167  for ( i = 0 ; i < ETH_ALEN ; i++ )
1168  netdev->hw_addr[i] = readb ( rtl->regs + RTL_IDR0 + i );
1169  }
1170 
1171  /* Initialise and reset MII interface */
1173  mii_init ( &rtl->mii, &rtl->mdio, 0 );
1174  if ( ( rc = realtek_phy_reset ( rtl ) ) != 0 )
1175  goto err_phy_reset;
1176 
1177  /* Register network device */
1178  if ( ( rc = register_netdev ( netdev ) ) != 0 )
1179  goto err_register_netdev;
1180 
1181  /* Set initial link state */
1183 
1184  /* Register non-volatile options, if applicable */
1185  if ( rtl->nvo.nvs ) {
1186  if ( ( rc = register_nvo ( &rtl->nvo,
1187  netdev_settings ( netdev ) ) ) != 0)
1188  goto err_register_nvo;
1189  }
1190 
1191  return 0;
1192 
1193  err_register_nvo:
1195  err_register_netdev:
1196  err_phy_reset:
1197  err_nvs_read:
1198  realtek_reset ( rtl );
1199  err_reset:
1200  iounmap ( rtl->regs );
1201  err_ioremap:
1202  netdev_nullify ( netdev );
1203  netdev_put ( netdev );
1204  err_alloc:
1205  return rc;
1206 }
1207 
1208 /**
1209  * Remove PCI device
1210  *
1211  * @v pci PCI device
1212  */
1213 static void realtek_remove ( struct pci_device *pci ) {
1214  struct net_device *netdev = pci_get_drvdata ( pci );
1215  struct realtek_nic *rtl = netdev->priv;
1216 
1217  /* Unregister non-volatile options, if applicable */
1218  if ( rtl->nvo.nvs )
1219  unregister_nvo ( &rtl->nvo );
1220 
1221  /* Unregister network device */
1223 
1224  /* Reset card */
1225  realtek_reset ( rtl );
1226 
1227  /* Free network device */
1228  iounmap ( rtl->regs );
1229  netdev_nullify ( netdev );
1230  netdev_put ( netdev );
1231 }
1232 
1233 /** Realtek PCI device IDs */
1234 static struct pci_device_id realtek_nics[] = {
1235  PCI_ROM ( 0x0001, 0x8168, "clone8169", "Cloned 8169", 0 ),
1236  PCI_ROM ( 0x018a, 0x0106, "fpc0106tx", "LevelOne FPC-0106TX", 0 ),
1237  PCI_ROM ( 0x021b, 0x8139, "hne300", "Compaq HNE-300", 0 ),
1238  PCI_ROM ( 0x02ac, 0x1012, "s1012", "SpeedStream 1012", 0 ),
1239  PCI_ROM ( 0x0357, 0x000a, "ttpmon", "TTTech TTP-Monitoring", 0 ),
1240  PCI_ROM ( 0x10ec, 0x8129, "rtl8129", "RTL-8129", 0 ),
1241  PCI_ROM ( 0x10ec, 0x8136, "rtl8136", "RTL8101E/RTL8102E", 0 ),
1242  PCI_ROM ( 0x10ec, 0x8138, "rtl8138", "RT8139 (B/C)", 0 ),
1243  PCI_ROM ( 0x10ec, 0x8139, "rtl8139", "RTL-8139/8139C/8139C+", 0 ),
1244  PCI_ROM ( 0x10ec, 0x8167, "rtl8167", "RTL-8110SC/8169SC", 0 ),
1245  PCI_ROM ( 0x10ec, 0x8168, "rtl8168", "RTL8111/8168B", 0 ),
1246  PCI_ROM ( 0x10ec, 0x8169, "rtl8169", "RTL-8169", 0 ),
1247  PCI_ROM ( 0x1113, 0x1211, "smc1211", "SMC2-1211TX", 0 ),
1248  PCI_ROM ( 0x1186, 0x1300, "dfe538", "DFE530TX+/DFE538TX", 0 ),
1249  PCI_ROM ( 0x1186, 0x1340, "dfe690", "DFE-690TXD", 0 ),
1250  PCI_ROM ( 0x1186, 0x4300, "dge528t", "DGE-528T", 0 ),
1251  PCI_ROM ( 0x11db, 0x1234, "sega8139", "Sega Enterprises 8139", 0 ),
1252  PCI_ROM ( 0x1259, 0xa117, "allied8139", "Allied Telesyn 8139", 0 ),
1253  PCI_ROM ( 0x1259, 0xa11e, "allied81xx", "Allied Telesyn 81xx", 0 ),
1254  PCI_ROM ( 0x1259, 0xc107, "allied8169", "Allied Telesyn 8169", 0 ),
1255  PCI_ROM ( 0x126c, 0x1211, "northen8139","Northern Telecom 8139", 0 ),
1256  PCI_ROM ( 0x13d1, 0xab06, "fe2000vx", "Abocom FE2000VX", 0 ),
1257  PCI_ROM ( 0x1432, 0x9130, "edi8139", "Edimax 8139", 0 ),
1258  PCI_ROM ( 0x14ea, 0xab06, "fnw3603tx", "Planex FNW-3603-TX", 0 ),
1259  PCI_ROM ( 0x14ea, 0xab07, "fnw3800tx", "Planex FNW-3800-TX", 0 ),
1260  PCI_ROM ( 0x1500, 0x1360, "delta8139", "Delta Electronics 8139", 0 ),
1261  PCI_ROM ( 0x16ec, 0x0116, "usr997902", "USR997902", 0 ),
1262  PCI_ROM ( 0x1737, 0x1032, "linksys8169","Linksys 8169", 0 ),
1263  PCI_ROM ( 0x1743, 0x8139, "rolf100", "Peppercorn ROL/F-100", 0 ),
1264  PCI_ROM ( 0x4033, 0x1360, "addron8139", "Addtron 8139", 0 ),
1265  PCI_ROM ( 0xffff, 0x8139, "clonse8139", "Cloned 8139", 0 ),
1266 };
1267 
1268 /** Realtek PCI driver */
1269 struct pci_driver realtek_driver __pci_driver = {
1270  .ids = realtek_nics,
1271  .id_count = ( sizeof ( realtek_nics ) / sizeof ( realtek_nics[0] ) ),
1272  .probe = realtek_probe,
1274 };
#define RTL_MSR_RXPF
RX pause flag.
Definition: realtek.h:197
#define __attribute__(x)
Definition: compiler.h:10
#define RTL_TPPOLL_NPQ
Normal Priority Queue Polling.
Definition: realtek.h:122
struct realtek_descriptor * desc
Descriptors.
Definition: realtek.h:250
struct bit_basher basher
Bit-bashing interface.
Definition: spi_bit.h:20
#define RTL_RXBUF_ALIGN
Receive buffer alignment.
Definition: realtek.h:105
unsigned long membase
Memory base.
Definition: pci.h:215
#define RTL_RCR_AB
Accept broadcast packets.
Definition: realtek.h:155
static void realtek_spi_write_bit(struct bit_basher *basher, unsigned int bit_id, unsigned long data)
Set/clear output bit.
Definition: realtek.c:154
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
#define RTL_TCR_MXDMA_DEFAULT
Definition: realtek.h:139
unsigned short uint16_t
Definition: stdint.h:11
#define RTL_CR_RE
Receiver Enable.
Definition: realtek.h:110
wmb()
DMA mappings.
uint8_t readb(volatile uint8_t *io_addr)
Read byte from memory-mapped device.
static void realtek_destroy_ring(struct realtek_nic *rtl, struct realtek_ring *ring)
Destroy descriptor ring.
Definition: realtek.c:606
#define iob_put(iobuf, len)
Definition: iobuf.h:120
struct dma_device dma
DMA device.
Definition: pci.h:210
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:586
void netdev_tx_defer(struct net_device *netdev, struct io_buffer *iobuf)
Defer transmitted packet.
Definition: netdevice.c:412
#define RTL_EEPROM_MAC
Word offset of MAC address within EEPROM.
Definition: realtek.h:177
#define ADVERTISE_1000FULL
Definition: mii.h:133
#define RTL_RCR_WRAP
Overrun receive buffer.
Definition: realtek.h:153
A PCI driver.
Definition: pci.h:247
#define DBGLVL_IO
Definition: compiler.h:322
#define RTL_IRQ_RER
Receive error.
Definition: realtek.h:129
#define RTL_RCR_9356SEL
EEPROM is a 93C56.
Definition: realtek.h:154
static unsigned int unsigned int reg
Definition: myson.h:162
#define RTL_EEPROM_ID_MAGIC
EEPROM code word magic value.
Definition: realtek.h:174
static void realtek_spi_open_bit(struct bit_basher *basher)
Open bit-bashing interface.
Definition: realtek.c:103
struct dma_mapping map
Descriptor ring DMA mapping.
Definition: realtek.h:252
Definition: sis900.h:27
int(* open)(struct net_device *netdev)
Open network device.
Definition: netdevice.h:222
A packet descriptor.
Definition: realtek.h:21
#define RTL_CAPR
Current Address of Packet Read (word, 8139 only)
Definition: realtek.h:118
unsigned int prod
Producer index.
Definition: realtek.h:254
#define RTL_MII_MAX_WAIT_US
Maximum time to wait for PHY access, in microseconds.
Definition: realtek.h:210
Error codes.
Bit-bashing operations.
Definition: bitbash.h:15
static int realtek_create_buffer(struct realtek_nic *rtl)
Create receive buffer (legacy mode)
Definition: realtek.c:518
#define RTL_RCR_AM
Accept multicast packets.
Definition: realtek.h:156
#define RTL_MSR_SPEED_10
10Mbps
Definition: realtek.h:194
#define RTL_TCR
Transmit (Tx) Configuration Register (dword)
Definition: realtek.h:136
static void realtek_detect(struct realtek_nic *rtl)
Detect device type.
Definition: realtek.c:1050
uint16_t readw(volatile uint16_t *io_addr)
Read 16-bit word from memory-mapped device.
#define RTL_RX_MAX_LEN
Receive buffer length.
Definition: realtek.h:244
static void netdev_tx_complete_next(struct net_device *netdev)
Complete network transmission.
Definition: netdevice.h:764
I/O buffers.
#define RTL_MSR_LINKB
Inverse of link status.
Definition: realtek.h:195
#define DBG_ENABLE(level)
Definition: compiler.h:313
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:249
uint64_t address
Base address.
Definition: ena.h:24
#define RTL_MSR_TXPF
TX pause flag.
Definition: realtek.h:196
int register_nvo(struct nvo_block *nvo, struct settings *parent)
Register non-volatile stored options.
Definition: nvo.c:293
int(* read)(struct mii_interface *mdio, unsigned int phy, unsigned int reg)
Read from MII register.
Definition: mii.h:27
static struct bit_basher_operations realtek_basher_ops
SPI bit-bashing interface.
Definition: realtek.c:171
static struct pci_device_id realtek_nics[]
Realtek PCI device IDs.
Definition: realtek.c:1234
#define RTL_ISR
Interrupt Status Register (word)
Definition: realtek.h:133
#define RTL_PHYSTATUS_RXFLOW
RX flow control enabled.
Definition: realtek.h:216
struct nvo_block nvo
Non-volatile options.
Definition: realtek.h:299
int have_phy_regs
PHYAR and PHYSTATUS registers are present.
Definition: realtek.h:308
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
#define RTL_EEPROM_ID
Word offset of ID code word within EEPROM.
Definition: realtek.h:171
#define DBGC(...)
Definition: compiler.h:505
void * data
Buffer.
Definition: realtek.h:281
#define RTL_IDR0
ID Register 0 (6 bytes)
Definition: realtek.h:69
#define RTL_EEPROM_VPD
Word offset of VPD / non-volatile options within EEPROM.
Definition: realtek.h:180
#define RTL_PHYSTATUS_100M
100Mbps
Definition: realtek.h:218
static __always_inline void dma_set_mask_64bit(struct dma_device *dma)
Set 64-bit addressable space mask.
Definition: dma.h:474
#define RTL_MSR_AUX_STATUS
Aux power present.
Definition: realtek.h:193
unsigned long long uint64_t
Definition: stdint.h:13
#define DBG_DISABLE(level)
Definition: compiler.h:312
void * regs
Registers.
Definition: realtek.h:291
#define RTL_9346CR_EEDO
Data out.
Definition: realtek.h:168
Non-volatile storage.
Realtek 10/100/1000 network card driver.
#define cpu_to_le64(value)
Definition: byteswap.h:108
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:230
#define RTL_BAR_SIZE
PCI memory BAR size.
Definition: realtek.h:18
#define RTL_TSD_ERTXTH_DEFAULT
Definition: realtek.h:80
static void realtek_remove(struct pci_device *pci)
Remove PCI device.
Definition: realtek.c:1213
#define RTL_TSD_OWN
Ownership.
Definition: realtek.h:81
#define RTL_MSR
Media Status Register (byte, 8139 only)
Definition: realtek.h:190
static void realtek_poll_rx(struct net_device *netdev)
Poll for received packets.
Definition: realtek.c:937
static const uint8_t realtek_eeprom_bits[]
Pin mapping for SPI bit-bashing interface.
Definition: realtek.c:91
static int realtek_init_eeprom(struct net_device *netdev)
Initialise EEPROM.
Definition: realtek.c:184
A legacy mode receive packet header.
Definition: realtek.h:53
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:154
struct bit_basher_operations * op
Bit-bashing operations.
Definition: bitbash.h:57
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:129
static __always_inline unsigned long virt_to_phys(volatile const void *addr)
Convert virtual address to a physical address.
Definition: uaccess.h:287
struct device dev
Generic device.
Definition: pci.h:208
static struct settings * netdev_settings(struct net_device *netdev)
Get per-netdevice configuration settings block.
Definition: netdevice.h:583
unsigned int reg
Descriptor start address register.
Definition: realtek.h:259
unsigned int mode
SPI interface mode.
Definition: spi.h:136
void writeb(uint8_t data, volatile uint8_t *io_addr)
Write byte to memory-mapped device.
#define ENOTSUP
Operation not supported.
Definition: errno.h:589
static void mdio_init(struct mii_interface *mdio, struct mii_operations *op)
Initialise MII interface.
Definition: mii.h:63
#define RTL_RCR_STOP_WORKING
Here be dragons.
Definition: realtek.h:143
#define RTL_CR_RST
Reset.
Definition: realtek.h:109
#define RTL_NUM_TX_DESC
Number of transmit descriptors.
Definition: realtek.h:93
Dynamic memory allocation.
struct realtek_rx_buffer rxbuf
Receive buffer (legacy mode)
Definition: realtek.h:319
Master Out Slave In.
Definition: spi_bit.h:37
#define RTL_EEPROM_VPD_LEN
Length of VPD / non-volatile options within EEPROM.
Definition: realtek.h:183
#define RTL_9346CR_EEDI
Data in.
Definition: realtek.h:167
static __always_inline int iob_map_tx(struct io_buffer *iobuf, struct dma_device *dma)
Map I/O buffer for transmit DMA.
Definition: iobuf.h:240
int mii_restart(struct mii_device *mii)
Restart autonegotiation.
Definition: mii.c:43
#define RTL_RCR_MXDMA_DEFAULT
Definition: realtek.h:152
#define RTL_CONFIG1
Configuration Register 1 (byte)
Definition: realtek.h:186
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:515
#define RTL_MSR_TXFCE
TX flow control enabled.
Definition: realtek.h:191
struct mii_device mii
MII device.
Definition: realtek.h:303
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:359
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define RTL_RING_ALIGN
Descriptor ring alignment.
Definition: realtek.h:50
void * memcpy(void *dest, const void *src, size_t len) __nonnull
Three-wire serial interface.
#define RTL_IMR
Interrupt Mask Register (word)
Definition: realtek.h:125
struct dma_device * dma
DMA device.
Definition: realtek.h:293
#define RTL_CONFIG1_VPD
Vital Product Data enabled.
Definition: realtek.h:187
#define RTL_9346CR
93C46 (93C56) Command Register (byte)
Definition: realtek.h:161
void dma_free(struct dma_mapping *map, void *addr, size_t len)
Unmap and free DMA-coherent buffer.
#define RTL_PHYAR_VALUE(flag, reg, data)
Construct PHY Access Register value.
Definition: realtek.h:204
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:572
#define container_of(ptr, type, field)
Get containing structure.
Definition: stddef.h:35
static int realtek_reset(struct realtek_nic *rtl)
Reset hardware.
Definition: realtek.c:342
static void realtek_dump(struct realtek_nic *rtl)
Dump all registers (for debugging)
Definition: realtek.c:68
Ethernet protocol.
void * priv
Driver private data.
Definition: netdevice.h:431
#define DBGC_HDA(...)
Definition: compiler.h:506
#define RTL_PHYSTATUS_FULLDUP
Full duplex.
Definition: realtek.h:221
void init_spi_bit_basher(struct spi_bit_basher *spibit)
Initialise SPI bit-bashing interface.
Definition: spi_bit.c:235
#define RTL_CPCR_CPTX
C+ transmit enable.
Definition: realtek.h:235
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:774
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
struct realtek_ring rx
Receive descriptor ring.
Definition: realtek.h:315
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
Bit-bashing interfaces.
static int realtek_phy_reset(struct realtek_nic *rtl)
Reset PHY.
Definition: realtek.c:400
static struct net_device * netdev
Definition: gdbudp.c:52
unsigned int offset
Offset within buffer.
Definition: realtek.h:285
static void realtek_poll_tx(struct net_device *netdev)
Poll for completed packets.
Definition: realtek.c:841
static __always_inline physaddr_t iob_dma(struct io_buffer *iobuf)
Get I/O buffer DMA address.
Definition: iobuf.h:264
static void realtek_close(struct net_device *netdev)
Close network device.
Definition: realtek.c:743
Descriptor is owned by NIC.
Definition: realtek.h:38
A Realtek network card.
Definition: realtek.h:289
static void realtek_destroy_buffer(struct realtek_nic *rtl)
Destroy receive buffer (legacy mode)
Definition: realtek.c:547
#define RTL_CR_BUFE
Receive buffer empty.
Definition: realtek.h:112
Definition: sis900.h:26
struct dma_mapping map
Buffer DMA mapping.
Definition: realtek.h:283
#define MII_CTRL1000
Definition: mii.h:24
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:941
static void realtek_poll(struct net_device *netdev)
Poll for completed and received packets.
Definition: realtek.c:987
#define RTL_IRQ_PUN_LINKCHG
Packet underrun / link change.
Definition: realtek.h:126
void unregister_nvo(struct nvo_block *nvo)
Unregister non-volatile stored options.
Definition: nvo.c:324
#define RTL_TCR_MXDMA_MASK
Definition: realtek.h:138
size_t len
Length (in bytes)
Definition: realtek.h:261
static void realtek_init_ring(struct realtek_ring *ring, unsigned int count, unsigned int reg)
Initialise descriptor ring.
Definition: realtek.h:272
pseudo_bit_t value[0x00020]
Definition: arbel.h:13
static void realtek_irq(struct net_device *netdev, int enable)
Enable or disable interrupts.
Definition: realtek.c:1019
#define RTL_PHYSTATUS_ENTBI
TBI / GMII mode.
Definition: realtek.h:214
#define RTL_CR
Command Register (byte)
Definition: realtek.h:108
#define iob_unput(iobuf, len)
Definition: iobuf.h:135
A bit-bashing interface.
Definition: bitbash.h:55
struct nvs_device * nvs
Underlying non-volatile storage device.
Definition: nvo.h:26
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
uint8_t id
Request identifier.
Definition: ena.h:12
struct refcnt refcnt
Reference counter.
Definition: netdevice.h:354
#define RTL_CR_TE
Transmit Enable.
Definition: realtek.h:111
static void realtek_check_link(struct net_device *netdev)
Check link state.
Definition: realtek.c:455
struct io_buffer * alloc_rx_iob(size_t len, struct dma_device *dma)
Allocate and map I/O buffer for receive DMA.
Definition: iobuf.c:181
void nvo_init(struct nvo_block *nvo, struct nvs_device *nvs, size_t address, size_t len, int(*resize)(struct nvo_block *nvo, size_t len), struct refcnt *refcnt)
Initialise non-volatile stored options.
Definition: nvo.c:273
#define RTL_CPCR
C+ Command Register (word)
Definition: realtek.h:230
PCI bus.
#define RTL_RCR_RXFTH_DEFAULT
Definition: realtek.h:146
#define RTL_RCR_RBLEN_MASK
Definition: realtek.h:148
#define RTL_RCR_AAP
Accept all packets.
Definition: realtek.h:158
A PCI device.
Definition: pci.h:206
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:759
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:155
static int realtek_transmit(struct net_device *netdev, struct io_buffer *iobuf)
Transmit packet.
Definition: realtek.c:778
A network device.
Definition: netdevice.h:352
Receive buffer (legacy mode *)
Definition: realtek.h:279
Media Independent Interface.
#define RTL_PHYAR
PHY Access Register (dword, 8169 only)
Definition: realtek.h:200
static void realtek_refill_rx(struct realtek_nic *rtl)
Refill receive descriptor ring.
Definition: realtek.c:631
#define ENODEV
No such device.
Definition: errno.h:509
unsigned int cons
Consumer index.
Definition: realtek.h:256
#define SPI_BIT_SS(slave)
Determine bit index for a particular slave.
Definition: spi_bit.h:50
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:528
#define RTL_CPCR_CPRX
C+ receive enable.
Definition: realtek.h:234
#define RTL_RCR_RXFTH_MASK
Definition: realtek.h:145
#define RTL_PHYSTATUS_LINKSTS
Link ok.
Definition: realtek.h:220
unsigned char uint8_t
Definition: stdint.h:10
static void mii_dump(struct mii_device *mii)
Dump MII registers (for debugging)
Definition: mii.h:116
#define MII_MMD_DATA
Definition: mii.h:27
int mii_reset(struct mii_device *mii)
Reset MII device.
Definition: mii.c:74
#define ETH_ALEN
Definition: if_ether.h:8
Master In Slave Out.
Definition: spi_bit.h:39
static int realtek_mii_read(struct mii_interface *mdio, unsigned int phy __unused, unsigned int reg)
Read from MII register.
Definition: realtek.c:251
#define ETH_ZLEN
Definition: if_ether.h:10
A PCI device ID list entry.
Definition: pci.h:170
#define ADVERTISE_1000HALF
Definition: mii.h:134
#define le16_to_cpu(value)
Definition: byteswap.h:112
End of descriptor ring.
Definition: realtek.h:40
unsigned int uint32_t
Definition: stdint.h:12
#define RTL_9346CR_EEM_NORMAL
Normal mode.
Definition: realtek.h:164
struct i386_regs regs
Definition: registers.h:15
struct spi_bus bus
SPI bus.
Definition: spi_bit.h:18
static struct xen_remove_from_physmap * remove
Definition: xenmem.h:39
#define RTL_MSR_RXFCE
RX flow control enabled.
Definition: realtek.h:192
Network device operations.
Definition: netdevice.h:213
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:548
struct device * dev
Underlying hardware device.
Definition: netdevice.h:364
static void mii_init(struct mii_device *mii, struct mii_interface *mdio, unsigned int address)
Initialise MII device.
Definition: mii.h:75
static struct mii_operations realtek_mii_operations
Realtek MII operations.
Definition: realtek.c:324
void * dma_alloc(struct dma_device *dma, struct dma_mapping *map, size_t len, size_t align)
Allocate and map DMA-coherent buffer.
Network device management.
MII interface operations.
Definition: mii.h:18
unsigned long physaddr_t
Definition: stdint.h:20
static int realtek_probe(struct pci_device *pci)
Probe PCI device.
Definition: realtek.c:1109
#define RTL_TNPDS
Transmit Normal Priority Descriptors (qword)
Definition: realtek.h:87
#define __unused
Declare a variable or data structure as unused.
Definition: compiler.h:573
struct nvs_device nvs
NVS device.
Definition: spi.h:88
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:369
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition: timer.c:78
#define RTL_TSD(n)
Transmit Status of Descriptor N (dword, 8139 only)
Definition: realtek.h:78
static int realtek_mii_write(struct mii_interface *mdio, unsigned int phy __unused, unsigned int reg, unsigned int data)
Write to MII register.
Definition: realtek.c:292
struct pci_driver realtek_driver __pci_driver
Realtek PCI driver.
Definition: realtek.c:1269
int legacy
Legacy datapath mode.
Definition: realtek.h:306
#define RTL_RMS
RX Packet Maximum Size Register (word)
Definition: realtek.h:227
#define RTL_MAR4
Multicast Register 4 (dword)
Definition: realtek.h:75
#define RTL_IRQ_ROK
Receive OK.
Definition: realtek.h:130
struct mii_interface mdio
MII interface.
Definition: realtek.h:301
uint32_t len
Length.
Definition: ena.h:14
uint8_t unused[32]
Unused.
Definition: eltorito.h:15
void free_rx_iob(struct io_buffer *iobuf)
Unmap and free I/O buffer for receive DMA.
Definition: iobuf.c:208
#define DBGC2(...)
Definition: compiler.h:522
#define RTL_IRQ_TOK
Transmit OK.
Definition: realtek.h:128
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:260
#define RTL_RCR_RBLEN_DEFAULT
Definition: realtek.h:149
#define writew
Definition: w89c840.c:159
#define RTL_RXBUF_LEN
Receive buffer length.
Definition: realtek.h:99
#define RTL_PHYSTATUS_TXFLOW
TX flow control enabled.
Definition: realtek.h:215
void * data
Start of data.
Definition: iobuf.h:48
#define RTL_RESET_MAX_WAIT_MS
Maximum time to wait for a reset, in milliseconds.
Definition: realtek.h:115
#define EIO
Input/output error.
Definition: errno.h:433
#define RTL_9346CR_EESK
Clock.
Definition: realtek.h:166
struct spi_bus * bus
SPI bus to which device is attached.
Definition: spi.h:90
#define RTL_IRQ_TER
Transmit error.
Definition: realtek.h:127
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
u8 rx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets from the AP.
Definition: wpa.h:234
An MII interface.
Definition: mii.h:43
Serial clock.
Definition: spi_bit.h:35
#define RTL_TPPOLL_8169
Transmit Priority Polling Register (byte, 8169 only)
Definition: realtek.h:121
unsigned int tppoll
TPPoll register offset.
Definition: realtek.h:310
#define cpu_to_le16(value)
Definition: byteswap.h:106
void iounmap(volatile const void *io_addr)
Unmap I/O address.
uint8_t data[48]
Additional event data.
Definition: ena.h:22
#define RTL_DESC_SIZE_MASK
Descriptor buffer size mask.
Definition: realtek.h:33
static struct net_device_operations realtek_operations
Realtek network device operations.
Definition: realtek.c:1030
Receive error summary.
Definition: realtek.h:46
static int realtek_open(struct net_device *netdev)
Open network device.
Definition: realtek.c:679
int nvs_read(struct nvs_device *nvs, unsigned int address, void *data, size_t len)
Read from non-volatile storage device.
Definition: nvs.c:75
static int mii_read(int phy_id, int location)
Definition: epic100.c:499
#define RTL_RXBUF_PAD
Receive buffer padding.
Definition: realtek.h:102
#define RTL_CPCR_VLAN
VLAN tag stripping enable.
Definition: realtek.h:231
static int realtek_spi_read_bit(struct bit_basher *basher, unsigned int bit_id)
Read input bit.
Definition: realtek.c:134
void(* open)(struct bit_basher *basher)
Open bit-bashing interface (optional)
Definition: bitbash.h:21
#define SPI_MODE_THREEWIRE
Threewire-compatible mode.
Definition: spi.h:199
#define RTL_RDSAR
Receive Descriptor Start Address Register (qword)
Definition: realtek.h:238
static int realtek_create_ring(struct realtek_nic *rtl, struct realtek_ring *ring)
Create descriptor ring.
Definition: realtek.c:571
#define RTL_CPCR_DAC
PCI Dual Address Cycle enable.
Definition: realtek.h:232
#define RTL_9346CR_EEM_EEPROM
EEPROM mode.
Definition: realtek.h:163
#define RTL_RCR_MXDMA_MASK
Definition: realtek.h:151
#define RTL_TPPOLL_8139CP
Transmit Priority Polling Register (byte, 8139C+ only)
Definition: realtek.h:224
A Realtek descriptor ring.
Definition: realtek.h:248
static __always_inline physaddr_t dma(struct dma_mapping *map, void *addr)
Get DMA address from virtual address.
Definition: dma.h:436
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
Last segment descriptor.
Definition: realtek.h:44
#define RTL_CPCR_MULRW
PCI Multiple Read/Write enable.
Definition: realtek.h:233
#define RTL_MAR0
Multicast Register 0 (dword)
Definition: realtek.h:72
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
#define DBG_LOG
Definition: compiler.h:317
First segment descriptor.
Definition: realtek.h:42
#define RTL_PHYAR_DATA(value)
Extract PHY Access Register data.
Definition: realtek.h:207
static int mii_write(struct mii_device *mii, unsigned int reg, unsigned int data)
Write to MII register.
Definition: mii.h:104
#define RTL_RBSTART
Receive Buffer Start Address (dword, 8139 only)
Definition: realtek.h:96
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
Definition: netdevice.h:381
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321
#define RTL_PHYAR_FLAG
Read/write flag.
Definition: realtek.h:201
#define ETIMEDOUT
Connection timed out.
Definition: errno.h:669
struct realtek_ring tx
Transmit descriptor ring.
Definition: realtek.h:313
String functions.
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:303
void iob_pad(struct io_buffer *iobuf, size_t min_len)
Pad I/O buffer.
Definition: iobpad.c:49
struct io_buffer * rx_iobuf[RTL_NUM_RX_DESC]
Receive I/O buffers.
Definition: realtek.h:317
static void realtek_spi_close_bit(struct bit_basher *basher)
Close bit-bashing interface.
Definition: realtek.c:117
#define RTL_RCR_APM
Accept physical match.
Definition: realtek.h:157
Received OK.
Definition: realtek.h:65
#define RTL_PHYSTATUS
PHY (GMII, MII, or TBI) Status Register (byte, 8169 only)
Definition: realtek.h:213
#define RTL_NUM_RX_DESC
Number of receive descriptors.
Definition: realtek.h:241
#define RTL_PHYSTATUS_10M
10Mbps
Definition: realtek.h:219
#define RTL_RCR
Receive (Rx) Configuration Register (dword)
Definition: realtek.h:142
#define RTL_PHYSTATUS_1000MF
1000Mbps full-duplex
Definition: realtek.h:217
struct spi_bit_basher spibit
SPI bit-bashing interface.
Definition: realtek.h:295
u8 tx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets to the AP.
Definition: wpa.h:237
static int realtek_phy_speed(struct realtek_nic *rtl)
Configure PHY for Gigabit operation.
Definition: realtek.c:370
#define RTL_9346CR_EECS
Chip select.
Definition: realtek.h:165
void * memset(void *dest, int character, size_t len) __nonnull
static void realtek_legacy_poll_rx(struct net_device *netdev)
Poll for received packets (legacy mode)
Definition: realtek.c:881
struct spi_device eeprom
EEPROM.
Definition: realtek.h:297
A persistent I/O buffer.
Definition: iobuf.h:33
#define RTL_TSAD(n)
Transmit Start Address of Descriptor N (dword, 8139 only)
Definition: realtek.h:84