iPXE
realtek.c
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1 /*
2  * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
3  *
4  * (EEPROM code originally implemented for rtl8139.c)
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of the
9  * License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19  * 02110-1301, USA.
20  *
21  * You can also choose to distribute this program under the terms of
22  * the Unmodified Binary Distribution Licence (as given in the file
23  * COPYING.UBDL), provided that you have satisfied its requirements.
24  */
25 
26 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
27 
28 #include <stdint.h>
29 #include <string.h>
30 #include <unistd.h>
31 #include <errno.h>
32 #include <byteswap.h>
33 #include <ipxe/netdevice.h>
34 #include <ipxe/ethernet.h>
35 #include <ipxe/if_ether.h>
36 #include <ipxe/iobuf.h>
37 #include <ipxe/malloc.h>
38 #include <ipxe/pci.h>
39 #include <ipxe/nvs.h>
40 #include <ipxe/threewire.h>
41 #include <ipxe/bitbash.h>
42 #include <ipxe/mii.h>
43 #include "realtek.h"
44 
45 /** @file
46  *
47  * Realtek 10/100/1000 network card driver
48  *
49  * Based on the following datasheets:
50  *
51  * http://www.datasheetarchive.com/dl/Datasheets-8/DSA-153536.pdf
52  * http://www.datasheetarchive.com/indexdl/Datasheet-028/DSA00494723.pdf
53  */
54 
55 /******************************************************************************
56  *
57  * Debugging
58  *
59  ******************************************************************************
60  */
61 
62 /**
63  * Dump all registers (for debugging)
64  *
65  * @v rtl Realtek device
66  */
67 static __attribute__ (( unused )) void realtek_dump ( struct realtek_nic *rtl ){
68  uint8_t regs[256];
69  unsigned int i;
70 
71  /* Do nothing unless debug output is enabled */
72  if ( ! DBG_LOG )
73  return;
74 
75  /* Dump registers (via byte accesses; may not work for all registers) */
76  for ( i = 0 ; i < sizeof ( regs ) ; i++ )
77  regs[i] = readb ( rtl->regs + i );
78  DBGC ( rtl, "REALTEK %p register dump:\n", rtl );
79  DBGC_HDA ( rtl, 0, regs, sizeof ( regs ) );
80 }
81 
82 /******************************************************************************
83  *
84  * EEPROM interface
85  *
86  ******************************************************************************
87  */
88 
89 /** Pin mapping for SPI bit-bashing interface */
90 static const uint8_t realtek_eeprom_bits[] = {
95 };
96 
97 /**
98  * Open bit-bashing interface
99  *
100  * @v basher Bit-bashing interface
101  */
102 static void realtek_spi_open_bit ( struct bit_basher *basher ) {
103  struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
104  spibit.basher );
105 
106  /* Enable EEPROM access */
108  readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
109 }
110 
111 /**
112  * Close bit-bashing interface
113  *
114  * @v basher Bit-bashing interface
115  */
116 static void realtek_spi_close_bit ( struct bit_basher *basher ) {
117  struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
118  spibit.basher );
119 
120  /* Disable EEPROM access */
122  readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
123 }
124 
125 /**
126  * Read input bit
127  *
128  * @v basher Bit-bashing interface
129  * @v bit_id Bit number
130  * @ret zero Input is a logic 0
131  * @ret non-zero Input is a logic 1
132  */
133 static int realtek_spi_read_bit ( struct bit_basher *basher,
134  unsigned int bit_id ) {
135  struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
136  spibit.basher );
137  uint8_t mask = realtek_eeprom_bits[bit_id];
138  uint8_t reg;
139 
141  reg = readb ( rtl->regs + RTL_9346CR );
142  DBG_ENABLE ( DBGLVL_IO );
143  return ( reg & mask );
144 }
145 
146 /**
147  * Set/clear output bit
148  *
149  * @v basher Bit-bashing interface
150  * @v bit_id Bit number
151  * @v data Value to write
152  */
153 static void realtek_spi_write_bit ( struct bit_basher *basher,
154  unsigned int bit_id, unsigned long data ) {
155  struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
156  spibit.basher );
157  uint8_t mask = realtek_eeprom_bits[bit_id];
158  uint8_t reg;
159 
161  reg = readb ( rtl->regs + RTL_9346CR );
162  reg &= ~mask;
163  reg |= ( data & mask );
164  writeb ( reg, rtl->regs + RTL_9346CR );
165  readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
166  DBG_ENABLE ( DBGLVL_IO );
167 }
168 
169 /** SPI bit-bashing interface */
172  .close = realtek_spi_close_bit,
173  .read = realtek_spi_read_bit,
174  .write = realtek_spi_write_bit,
175 };
176 
177 /**
178  * Initialise EEPROM
179  *
180  * @v netdev Network device
181  * @ret rc Return status code
182  */
183 static int realtek_init_eeprom ( struct net_device *netdev ) {
184  struct realtek_nic *rtl = netdev->priv;
185  uint16_t id;
186  int rc;
187 
188  /* Initialise SPI bit-bashing interface */
191  init_spi_bit_basher ( &rtl->spibit );
192 
193  /* Detect EEPROM type and initialise three-wire device */
194  if ( readl ( rtl->regs + RTL_RCR ) & RTL_RCR_9356SEL ) {
195  DBGC ( rtl, "REALTEK %p EEPROM is a 93C56\n", rtl );
196  init_at93c56 ( &rtl->eeprom, 16 );
197  } else {
198  DBGC ( rtl, "REALTEK %p EEPROM is a 93C46\n", rtl );
199  init_at93c46 ( &rtl->eeprom, 16 );
200  }
201 
202  /* Check for EEPROM presence. Some onboard NICs will have no
203  * EEPROM connected, with the BIOS being responsible for
204  * programming the initial register values.
205  */
206  if ( ( rc = nvs_read ( &rtl->eeprom.nvs, RTL_EEPROM_ID,
207  &id, sizeof ( id ) ) ) != 0 ) {
208  DBGC ( rtl, "REALTEK %p could not read EEPROM ID: %s\n",
209  rtl, strerror ( rc ) );
210  return rc;
211  }
212  if ( id != cpu_to_le16 ( RTL_EEPROM_ID_MAGIC ) ) {
213  DBGC ( rtl, "REALTEK %p EEPROM ID incorrect (%#04x); assuming "
214  "no EEPROM\n", rtl, le16_to_cpu ( id ) );
215  return -ENODEV;
216  }
217 
218  /* Initialise space for non-volatile options, if available
219  *
220  * We use offset 0x40 (i.e. address 0x20), length 0x40. This
221  * block is marked as VPD in the Realtek datasheets, so we use
222  * it only if we detect that the card is not supporting VPD.
223  */
224  if ( readb ( rtl->regs + RTL_CONFIG1 ) & RTL_CONFIG1_VPD ) {
225  DBGC ( rtl, "REALTEK %p EEPROM in use for VPD; cannot use "
226  "for options\n", rtl );
227  } else {
228  nvo_init ( &rtl->nvo, &rtl->eeprom.nvs, RTL_EEPROM_VPD,
230  }
231 
232  return 0;
233 }
234 
235 /******************************************************************************
236  *
237  * MII interface
238  *
239  ******************************************************************************
240  */
241 
242 /**
243  * Read from MII register
244  *
245  * @v mdio MII interface
246  * @v phy PHY address
247  * @v reg Register address
248  * @ret value Data read, or negative error
249  */
250 static int realtek_mii_read ( struct mii_interface *mdio,
251  unsigned int phy __unused, unsigned int reg ) {
252  struct realtek_nic *rtl =
253  container_of ( mdio, struct realtek_nic, mdio );
254  unsigned int i;
255  uint32_t value;
256 
257  /* Fail if PHYAR register is not present */
258  if ( ! rtl->have_phy_regs )
259  return -ENOTSUP;
260 
261  /* Initiate read */
262  writel ( RTL_PHYAR_VALUE ( 0, reg, 0 ), rtl->regs + RTL_PHYAR );
263 
264  /* Wait for read to complete */
265  for ( i = 0 ; i < RTL_MII_MAX_WAIT_US ; i++ ) {
266 
267  /* If read is not complete, delay 1us and retry */
268  value = readl ( rtl->regs + RTL_PHYAR );
269  if ( ! ( value & RTL_PHYAR_FLAG ) ) {
270  udelay ( 1 );
271  continue;
272  }
273 
274  /* Return register value */
275  return ( RTL_PHYAR_DATA ( value ) );
276  }
277 
278  DBGC ( rtl, "REALTEK %p timed out waiting for MII read\n", rtl );
279  return -ETIMEDOUT;
280 }
281 
282 /**
283  * Write to MII register
284  *
285  * @v mdio MII interface
286  * @v phy PHY address
287  * @v reg Register address
288  * @v data Data to write
289  * @ret rc Return status code
290  */
291 static int realtek_mii_write ( struct mii_interface *mdio,
292  unsigned int phy __unused, unsigned int reg,
293  unsigned int data ) {
294  struct realtek_nic *rtl =
295  container_of ( mdio, struct realtek_nic, mdio );
296  unsigned int i;
297 
298  /* Fail if PHYAR register is not present */
299  if ( ! rtl->have_phy_regs )
300  return -ENOTSUP;
301 
302  /* Initiate write */
304  rtl->regs + RTL_PHYAR );
305 
306  /* Wait for write to complete */
307  for ( i = 0 ; i < RTL_MII_MAX_WAIT_US ; i++ ) {
308 
309  /* If write is not complete, delay 1us and retry */
310  if ( readl ( rtl->regs + RTL_PHYAR ) & RTL_PHYAR_FLAG ) {
311  udelay ( 1 );
312  continue;
313  }
314 
315  return 0;
316  }
317 
318  DBGC ( rtl, "REALTEK %p timed out waiting for MII write\n", rtl );
319  return -ETIMEDOUT;
320 }
321 
322 /** Realtek MII operations */
325  .write = realtek_mii_write,
326 };
327 
328 /******************************************************************************
329  *
330  * Device reset
331  *
332  ******************************************************************************
333  */
334 
335 /**
336  * Reset hardware
337  *
338  * @v rtl Realtek device
339  * @ret rc Return status code
340  */
341 static int realtek_reset ( struct realtek_nic *rtl ) {
342  unsigned int i;
343 
344  /* Issue reset */
345  writeb ( RTL_CR_RST, rtl->regs + RTL_CR );
346 
347  /* Wait for reset to complete */
348  for ( i = 0 ; i < RTL_RESET_MAX_WAIT_MS ; i++ ) {
349 
350  /* If reset is not complete, delay 1ms and retry */
351  if ( readb ( rtl->regs + RTL_CR ) & RTL_CR_RST ) {
352  mdelay ( 1 );
353  continue;
354  }
355 
356  return 0;
357  }
358 
359  DBGC ( rtl, "REALTEK %p timed out waiting for reset\n", rtl );
360  return -ETIMEDOUT;
361 }
362 
363 /**
364  * Configure PHY for Gigabit operation
365  *
366  * @v rtl Realtek device
367  * @ret rc Return status code
368  */
369 static int realtek_phy_speed ( struct realtek_nic *rtl ) {
370  int ctrl1000;
371  int rc;
372 
373  /* Read CTRL1000 register */
374  ctrl1000 = mii_read ( &rtl->mii, MII_CTRL1000 );
375  if ( ctrl1000 < 0 ) {
376  rc = ctrl1000;
377  DBGC ( rtl, "REALTEK %p could not read CTRL1000: %s\n",
378  rtl, strerror ( rc ) );
379  return rc;
380  }
381 
382  /* Advertise 1000Mbps speeds */
383  ctrl1000 |= ( ADVERTISE_1000FULL | ADVERTISE_1000HALF );
384  if ( ( rc = mii_write ( &rtl->mii, MII_CTRL1000, ctrl1000 ) ) != 0 ) {
385  DBGC ( rtl, "REALTEK %p could not write CTRL1000: %s\n",
386  rtl, strerror ( rc ) );
387  return rc;
388  }
389 
390  return 0;
391 }
392 
393 /**
394  * Reset PHY
395  *
396  * @v rtl Realtek device
397  * @ret rc Return status code
398  */
399 static int realtek_phy_reset ( struct realtek_nic *rtl ) {
400  int rc;
401 
402  /* Do nothing if we have no separate PHY register access */
403  if ( ! rtl->have_phy_regs )
404  return 0;
405 
406  /* Perform MII reset */
407  if ( ( rc = mii_reset ( &rtl->mii ) ) != 0 ) {
408  DBGC ( rtl, "REALTEK %p could not reset MII: %s\n",
409  rtl, strerror ( rc ) );
410  return rc;
411  }
412 
413  /* Some cards (e.g. RTL8169SC) do not advertise Gigabit by
414  * default. Try to enable advertisement of Gigabit speeds.
415  */
416  if ( ( rc = realtek_phy_speed ( rtl ) ) != 0 ) {
417  /* Ignore failures, since the register may not be
418  * present on non-Gigabit PHYs (e.g. RTL8101).
419  */
420  }
421 
422  /* Restart autonegotiation */
423  if ( ( rc = mii_restart ( &rtl->mii ) ) != 0 ) {
424  DBGC ( rtl, "REALTEK %p could not restart MII: %s\n",
425  rtl, strerror ( rc ) );
426  return rc;
427  }
428 
429  return 0;
430 }
431 
432 /******************************************************************************
433  *
434  * Link state
435  *
436  ******************************************************************************
437  */
438 
439 /**
440  * Check link state
441  *
442  * @v netdev Network device
443  */
444 static void realtek_check_link ( struct net_device *netdev ) {
445  struct realtek_nic *rtl = netdev->priv;
446  uint8_t phystatus;
447  uint8_t msr;
448  int link_up;
449 
450  /* Determine link state */
451  if ( rtl->have_phy_regs ) {
452  mii_dump ( &rtl->mii );
453  phystatus = readb ( rtl->regs + RTL_PHYSTATUS );
454  link_up = ( phystatus & RTL_PHYSTATUS_LINKSTS );
455  DBGC ( rtl, "REALTEK %p PHY status is %02x (%s%s%s%s%s%s, "
456  "Link%s, %sDuplex)\n", rtl, phystatus,
457  ( ( phystatus & RTL_PHYSTATUS_ENTBI ) ? "TBI" : "GMII" ),
458  ( ( phystatus & RTL_PHYSTATUS_TXFLOW ) ?
459  ", TxFlow" : "" ),
460  ( ( phystatus & RTL_PHYSTATUS_RXFLOW ) ?
461  ", RxFlow" : "" ),
462  ( ( phystatus & RTL_PHYSTATUS_1000MF ) ?
463  ", 1000Mbps" : "" ),
464  ( ( phystatus & RTL_PHYSTATUS_100M ) ?
465  ", 100Mbps" : "" ),
466  ( ( phystatus & RTL_PHYSTATUS_10M ) ?
467  ", 10Mbps" : "" ),
468  ( ( phystatus & RTL_PHYSTATUS_LINKSTS ) ?
469  "Up" : "Down" ),
470  ( ( phystatus & RTL_PHYSTATUS_FULLDUP ) ?
471  "Full" : "Half" ) );
472  } else {
473  msr = readb ( rtl->regs + RTL_MSR );
474  link_up = ( ! ( msr & RTL_MSR_LINKB ) );
475  DBGC ( rtl, "REALTEK %p media status is %02x (Link%s, "
476  "%dMbps%s%s%s%s%s)\n", rtl, msr,
477  ( ( msr & RTL_MSR_LINKB ) ? "Down" : "Up" ),
478  ( ( msr & RTL_MSR_SPEED_10 ) ? 10 : 100 ),
479  ( ( msr & RTL_MSR_TXFCE ) ? ", TxFlow" : "" ),
480  ( ( msr & RTL_MSR_RXFCE ) ? ", RxFlow" : "" ),
481  ( ( msr & RTL_MSR_AUX_STATUS ) ? ", AuxPwr" : "" ),
482  ( ( msr & RTL_MSR_TXPF ) ? ", TxPause" : "" ),
483  ( ( msr & RTL_MSR_RXPF ) ? ", RxPause" : "" ) );
484  }
485 
486  /* Report link state */
487  if ( link_up ) {
489  } else {
491  }
492 }
493 
494 /******************************************************************************
495  *
496  * Network device interface
497  *
498  ******************************************************************************
499  */
500 
501 /**
502  * Create receive buffer (legacy mode)
503  *
504  * @v rtl Realtek device
505  * @ret rc Return status code
506  */
507 static int realtek_create_buffer ( struct realtek_nic *rtl ) {
508  size_t len = ( RTL_RXBUF_LEN + RTL_RXBUF_PAD );
510  int rc;
511 
512  /* Do nothing unless in legacy mode */
513  if ( ! rtl->legacy )
514  return 0;
515 
516  /* Allocate buffer */
518  if ( ! rtl->rx_buffer ) {
519  rc = -ENOMEM;
520  goto err_alloc;
521  }
522  address = virt_to_bus ( rtl->rx_buffer );
523 
524  /* Check that card can support address */
525  if ( address & ~0xffffffffULL ) {
526  DBGC ( rtl, "REALTEK %p cannot support 64-bit RX buffer "
527  "address\n", rtl );
528  rc = -ENOTSUP;
529  goto err_64bit;
530  }
531 
532  /* Program buffer address */
533  writel ( address, rtl->regs + RTL_RBSTART );
534  DBGC ( rtl, "REALTEK %p receive buffer is at [%08llx,%08llx,%08llx)\n",
535  rtl, ( ( unsigned long long ) address ),
536  ( ( unsigned long long ) address + RTL_RXBUF_LEN ),
537  ( ( unsigned long long ) address + len ) );
538 
539  return 0;
540 
541  err_64bit:
542  free_dma ( rtl->rx_buffer, len );
543  rtl->rx_buffer = NULL;
544  err_alloc:
545  return rc;
546 }
547 
548 /**
549  * Destroy receive buffer (legacy mode)
550  *
551  * @v rtl Realtek device
552  */
553 static void realtek_destroy_buffer ( struct realtek_nic *rtl ) {
554  size_t len = ( RTL_RXBUF_LEN + RTL_RXBUF_PAD );
555 
556  /* Do nothing unless in legacy mode */
557  if ( ! rtl->legacy )
558  return;
559 
560  /* Clear buffer address */
561  writel ( 0, rtl->regs + RTL_RBSTART );
562 
563  /* Free buffer */
564  free_dma ( rtl->rx_buffer, len );
565  rtl->rx_buffer = NULL;
566  rtl->rx_offset = 0;
567 }
568 
569 /**
570  * Create descriptor ring
571  *
572  * @v rtl Realtek device
573  * @v ring Descriptor ring
574  * @ret rc Return status code
575  */
576 static int realtek_create_ring ( struct realtek_nic *rtl,
577  struct realtek_ring *ring ) {
579 
580  /* Do nothing in legacy mode */
581  if ( rtl->legacy )
582  return 0;
583 
584  /* Allocate descriptor ring */
585  ring->desc = malloc_dma ( ring->len, RTL_RING_ALIGN );
586  if ( ! ring->desc )
587  return -ENOMEM;
588 
589  /* Initialise descriptor ring */
590  memset ( ring->desc, 0, ring->len );
591 
592  /* Program ring address */
593  address = virt_to_bus ( ring->desc );
594  writel ( ( ( ( uint64_t ) address ) >> 32 ),
595  rtl->regs + ring->reg + 4 );
596  writel ( ( address & 0xffffffffUL ), rtl->regs + ring->reg );
597  DBGC ( rtl, "REALTEK %p ring %02x is at [%08llx,%08llx)\n",
598  rtl, ring->reg, ( ( unsigned long long ) address ),
599  ( ( unsigned long long ) address + ring->len ) );
600 
601  return 0;
602 }
603 
604 /**
605  * Destroy descriptor ring
606  *
607  * @v rtl Realtek device
608  * @v ring Descriptor ring
609  */
610 static void realtek_destroy_ring ( struct realtek_nic *rtl,
611  struct realtek_ring *ring ) {
612 
613  /* Reset producer and consumer counters */
614  ring->prod = 0;
615  ring->cons = 0;
616 
617  /* Do nothing more if in legacy mode */
618  if ( rtl->legacy )
619  return;
620 
621  /* Clear ring address */
622  writel ( 0, rtl->regs + ring->reg );
623  writel ( 0, rtl->regs + ring->reg + 4 );
624 
625  /* Free descriptor ring */
626  free_dma ( ring->desc, ring->len );
627  ring->desc = NULL;
628 }
629 
630 /**
631  * Refill receive descriptor ring
632  *
633  * @v rtl Realtek device
634  */
635 static void realtek_refill_rx ( struct realtek_nic *rtl ) {
636  struct realtek_descriptor *rx;
637  struct io_buffer *iobuf;
638  unsigned int rx_idx;
640  int is_last;
641 
642  /* Do nothing in legacy mode */
643  if ( rtl->legacy )
644  return;
645 
646  while ( ( rtl->rx.prod - rtl->rx.cons ) < RTL_NUM_RX_DESC ) {
647 
648  /* Allocate I/O buffer */
649  iobuf = alloc_iob ( RTL_RX_MAX_LEN );
650  if ( ! iobuf ) {
651  /* Wait for next refill */
652  return;
653  }
654 
655  /* Get next receive descriptor */
656  rx_idx = ( rtl->rx.prod++ % RTL_NUM_RX_DESC );
657  is_last = ( rx_idx == ( RTL_NUM_RX_DESC - 1 ) );
658  rx = &rtl->rx.desc[rx_idx];
659 
660  /* Populate receive descriptor */
661  address = virt_to_bus ( iobuf->data );
662  rx->address = cpu_to_le64 ( address );
663  rx->length = cpu_to_le16 ( RTL_RX_MAX_LEN );
664  wmb();
665  rx->flags = ( cpu_to_le16 ( RTL_DESC_OWN ) |
666  ( is_last ? cpu_to_le16 ( RTL_DESC_EOR ) : 0 ) );
667  wmb();
668 
669  /* Record I/O buffer */
670  assert ( rtl->rx_iobuf[rx_idx] == NULL );
671  rtl->rx_iobuf[rx_idx] = iobuf;
672 
673  DBGC2 ( rtl, "REALTEK %p RX %d is [%llx,%llx)\n", rtl, rx_idx,
674  ( ( unsigned long long ) address ),
675  ( ( unsigned long long ) address + RTL_RX_MAX_LEN ) );
676  }
677 }
678 
679 /**
680  * Open network device
681  *
682  * @v netdev Network device
683  * @ret rc Return status code
684  */
685 static int realtek_open ( struct net_device *netdev ) {
686  struct realtek_nic *rtl = netdev->priv;
687  uint32_t tcr;
688  uint32_t rcr;
689  int rc;
690 
691  /* Create transmit descriptor ring */
692  if ( ( rc = realtek_create_ring ( rtl, &rtl->tx ) ) != 0 )
693  goto err_create_tx;
694 
695  /* Create receive descriptor ring */
696  if ( ( rc = realtek_create_ring ( rtl, &rtl->rx ) ) != 0 )
697  goto err_create_rx;
698 
699  /* Create receive buffer */
700  if ( ( rc = realtek_create_buffer ( rtl ) ) != 0 )
701  goto err_create_buffer;
702 
703  /* Accept all packets */
704  writel ( 0xffffffffUL, rtl->regs + RTL_MAR0 );
705  writel ( 0xffffffffUL, rtl->regs + RTL_MAR4 );
706 
707  /* Enable transmitter and receiver. RTL8139 requires that
708  * this happens before writing to RCR.
709  */
710  writeb ( ( RTL_CR_TE | RTL_CR_RE ), rtl->regs + RTL_CR );
711 
712  /* Configure transmitter */
713  tcr = readl ( rtl->regs + RTL_TCR );
714  tcr &= ~RTL_TCR_MXDMA_MASK;
715  tcr |= RTL_TCR_MXDMA_DEFAULT;
716  writel ( tcr, rtl->regs + RTL_TCR );
717 
718  /* Configure receiver */
719  rcr = readl ( rtl->regs + RTL_RCR );
725  writel ( rcr, rtl->regs + RTL_RCR );
726 
727  /* Fill receive ring */
728  realtek_refill_rx ( rtl );
729 
730  /* Update link state */
732 
733  return 0;
734 
735  realtek_destroy_buffer ( rtl );
736  err_create_buffer:
737  realtek_destroy_ring ( rtl, &rtl->rx );
738  err_create_rx:
739  realtek_destroy_ring ( rtl, &rtl->tx );
740  err_create_tx:
741  return rc;
742 }
743 
744 /**
745  * Close network device
746  *
747  * @v netdev Network device
748  */
749 static void realtek_close ( struct net_device *netdev ) {
750  struct realtek_nic *rtl = netdev->priv;
751  unsigned int i;
752 
753  /* Disable receiver and transmitter */
754  writeb ( 0, rtl->regs + RTL_CR );
755 
756  /* Destroy receive buffer */
757  realtek_destroy_buffer ( rtl );
758 
759  /* Destroy receive descriptor ring */
760  realtek_destroy_ring ( rtl, &rtl->rx );
761 
762  /* Discard any unused receive buffers */
763  for ( i = 0 ; i < RTL_NUM_RX_DESC ; i++ ) {
764  if ( rtl->rx_iobuf[i] )
765  free_iob ( rtl->rx_iobuf[i] );
766  rtl->rx_iobuf[i] = NULL;
767  }
768 
769  /* Destroy transmit descriptor ring */
770  realtek_destroy_ring ( rtl, &rtl->tx );
771 }
772 
773 /**
774  * Transmit packet
775  *
776  * @v netdev Network device
777  * @v iobuf I/O buffer
778  * @ret rc Return status code
779  */
780 static int realtek_transmit ( struct net_device *netdev,
781  struct io_buffer *iobuf ) {
782  struct realtek_nic *rtl = netdev->priv;
783  struct realtek_descriptor *tx;
784  unsigned int tx_idx;
786  int is_last;
787 
788  /* Get next transmit descriptor */
789  if ( ( rtl->tx.prod - rtl->tx.cons ) >= RTL_NUM_TX_DESC ) {
790  netdev_tx_defer ( netdev, iobuf );
791  return 0;
792  }
793  tx_idx = ( rtl->tx.prod++ % RTL_NUM_TX_DESC );
794 
795  /* Transmit packet */
796  if ( rtl->legacy ) {
797 
798  /* Pad and align packet */
799  iob_pad ( iobuf, ETH_ZLEN );
800  address = virt_to_bus ( iobuf->data );
801 
802  /* Check that card can support address */
803  if ( address & ~0xffffffffULL ) {
804  DBGC ( rtl, "REALTEK %p cannot support 64-bit TX "
805  "buffer address\n", rtl );
806  return -ENOTSUP;
807  }
808 
809  /* Add to transmit ring */
810  writel ( address, rtl->regs + RTL_TSAD ( tx_idx ) );
811  writel ( ( RTL_TSD_ERTXTH_DEFAULT | iob_len ( iobuf ) ),
812  rtl->regs + RTL_TSD ( tx_idx ) );
813 
814  } else {
815 
816  /* Populate transmit descriptor */
817  address = virt_to_bus ( iobuf->data );
818  is_last = ( tx_idx == ( RTL_NUM_TX_DESC - 1 ) );
819  tx = &rtl->tx.desc[tx_idx];
820  tx->address = cpu_to_le64 ( address );
821  tx->length = cpu_to_le16 ( iob_len ( iobuf ) );
822  wmb();
823  tx->flags = ( cpu_to_le16 ( RTL_DESC_OWN | RTL_DESC_FS |
824  RTL_DESC_LS ) |
825  ( is_last ? cpu_to_le16 ( RTL_DESC_EOR ) : 0 ) );
826  wmb();
827 
828  /* Notify card that there are packets ready to transmit */
829  writeb ( RTL_TPPOLL_NPQ, rtl->regs + rtl->tppoll );
830  }
831 
832  DBGC2 ( rtl, "REALTEK %p TX %d is [%llx,%llx)\n", rtl, tx_idx,
833  ( ( unsigned long long ) virt_to_bus ( iobuf->data ) ),
834  ( ( ( unsigned long long ) virt_to_bus ( iobuf->data ) ) +
835  iob_len ( iobuf ) ) );
836 
837  return 0;
838 }
839 
840 /**
841  * Poll for completed packets
842  *
843  * @v netdev Network device
844  */
845 static void realtek_poll_tx ( struct net_device *netdev ) {
846  struct realtek_nic *rtl = netdev->priv;
847  struct realtek_descriptor *tx;
848  unsigned int tx_idx;
849 
850  /* Check for completed packets */
851  while ( rtl->tx.cons != rtl->tx.prod ) {
852 
853  /* Get next transmit descriptor */
854  tx_idx = ( rtl->tx.cons % RTL_NUM_TX_DESC );
855 
856  /* Stop if descriptor is still in use */
857  if ( rtl->legacy ) {
858 
859  /* Check ownership bit in transmit status register */
860  if ( ! ( readl ( rtl->regs + RTL_TSD ( tx_idx ) ) &
861  RTL_TSD_OWN ) )
862  return;
863 
864  } else {
865 
866  /* Check ownership bit in descriptor */
867  tx = &rtl->tx.desc[tx_idx];
868  if ( tx->flags & cpu_to_le16 ( RTL_DESC_OWN ) )
869  return;
870  }
871 
872  DBGC2 ( rtl, "REALTEK %p TX %d complete\n", rtl, tx_idx );
873 
874  /* Complete TX descriptor */
875  rtl->tx.cons++;
877  }
878 }
879 
880 /**
881  * Poll for received packets (legacy mode)
882  *
883  * @v netdev Network device
884  */
885 static void realtek_legacy_poll_rx ( struct net_device *netdev ) {
886  struct realtek_nic *rtl = netdev->priv;
887  struct realtek_legacy_header *rx;
888  struct io_buffer *iobuf;
889  size_t len;
890 
891  /* Check for received packets */
892  while ( ! ( readb ( rtl->regs + RTL_CR ) & RTL_CR_BUFE ) ) {
893 
894  /* Extract packet from receive buffer */
895  rx = ( rtl->rx_buffer + rtl->rx_offset );
896  len = le16_to_cpu ( rx->length );
897  if ( rx->status & cpu_to_le16 ( RTL_STAT_ROK ) ) {
898 
899  DBGC2 ( rtl, "REALTEK %p RX offset %x+%zx\n",
900  rtl, rtl->rx_offset, len );
901 
902  /* Allocate I/O buffer */
903  iobuf = alloc_iob ( len );
904  if ( ! iobuf ) {
906  /* Leave packet for next poll */
907  break;
908  }
909 
910  /* Copy data to I/O buffer */
911  memcpy ( iob_put ( iobuf, len ), rx->data, len );
912  iob_unput ( iobuf, 4 /* strip CRC */ );
913 
914  /* Hand off to network stack */
915  netdev_rx ( netdev, iobuf );
916 
917  } else {
918 
919  DBGC ( rtl, "REALTEK %p RX offset %x+%zx error %04x\n",
920  rtl, rtl->rx_offset, len,
921  le16_to_cpu ( rx->status ) );
922  netdev_rx_err ( netdev, NULL, -EIO );
923  }
924 
925  /* Update buffer offset */
926  rtl->rx_offset = ( rtl->rx_offset + sizeof ( *rx ) + len );
927  rtl->rx_offset = ( ( rtl->rx_offset + 3 ) & ~3 );
928  rtl->rx_offset = ( rtl->rx_offset % RTL_RXBUF_LEN );
929  writew ( ( rtl->rx_offset - 16 ), rtl->regs + RTL_CAPR );
930 
931  /* Give chip time to react before rechecking RTL_CR */
932  readw ( rtl->regs + RTL_CAPR );
933  }
934 }
935 
936 /**
937  * Poll for received packets
938  *
939  * @v netdev Network device
940  */
941 static void realtek_poll_rx ( struct net_device *netdev ) {
942  struct realtek_nic *rtl = netdev->priv;
943  struct realtek_descriptor *rx;
944  struct io_buffer *iobuf;
945  unsigned int rx_idx;
946  size_t len;
947 
948  /* Poll receive buffer if in legacy mode */
949  if ( rtl->legacy ) {
951  return;
952  }
953 
954  /* Check for received packets */
955  while ( rtl->rx.cons != rtl->rx.prod ) {
956 
957  /* Get next receive descriptor */
958  rx_idx = ( rtl->rx.cons % RTL_NUM_RX_DESC );
959  rx = &rtl->rx.desc[rx_idx];
960 
961  /* Stop if descriptor is still in use */
962  if ( rx->flags & cpu_to_le16 ( RTL_DESC_OWN ) )
963  return;
964 
965  /* Populate I/O buffer */
966  iobuf = rtl->rx_iobuf[rx_idx];
967  rtl->rx_iobuf[rx_idx] = NULL;
968  len = ( le16_to_cpu ( rx->length ) & RTL_DESC_SIZE_MASK );
969  iob_put ( iobuf, ( len - 4 /* strip CRC */ ) );
970 
971  /* Hand off to network stack */
972  if ( rx->flags & cpu_to_le16 ( RTL_DESC_RES ) ) {
973  DBGC ( rtl, "REALTEK %p RX %d error (length %zd, "
974  "flags %04x)\n", rtl, rx_idx, len,
975  le16_to_cpu ( rx->flags ) );
976  netdev_rx_err ( netdev, iobuf, -EIO );
977  } else {
978  DBGC2 ( rtl, "REALTEK %p RX %d complete (length "
979  "%zd)\n", rtl, rx_idx, len );
980  netdev_rx ( netdev, iobuf );
981  }
982  rtl->rx.cons++;
983  }
984 }
985 
986 /**
987  * Poll for completed and received packets
988  *
989  * @v netdev Network device
990  */
991 static void realtek_poll ( struct net_device *netdev ) {
992  struct realtek_nic *rtl = netdev->priv;
993  uint16_t isr;
994 
995  /* Check for and acknowledge interrupts */
996  isr = readw ( rtl->regs + RTL_ISR );
997  if ( ! isr )
998  return;
999  writew ( isr, rtl->regs + RTL_ISR );
1000 
1001  /* Poll for TX completions, if applicable */
1002  if ( isr & ( RTL_IRQ_TER | RTL_IRQ_TOK ) )
1003  realtek_poll_tx ( netdev );
1004 
1005  /* Poll for RX completionsm, if applicable */
1006  if ( isr & ( RTL_IRQ_RER | RTL_IRQ_ROK ) )
1007  realtek_poll_rx ( netdev );
1008 
1009  /* Check link state, if applicable */
1010  if ( isr & RTL_IRQ_PUN_LINKCHG )
1012 
1013  /* Refill RX ring */
1014  realtek_refill_rx ( rtl );
1015 }
1016 
1017 /**
1018  * Enable or disable interrupts
1019  *
1020  * @v netdev Network device
1021  * @v enable Interrupts should be enabled
1022  */
1023 static void realtek_irq ( struct net_device *netdev, int enable ) {
1024  struct realtek_nic *rtl = netdev->priv;
1025  uint16_t imr;
1026 
1027  /* Set interrupt mask */
1028  imr = ( enable ? ( RTL_IRQ_PUN_LINKCHG | RTL_IRQ_TER | RTL_IRQ_TOK |
1029  RTL_IRQ_RER | RTL_IRQ_ROK ) : 0 );
1030  writew ( imr, rtl->regs + RTL_IMR );
1031 }
1032 
1033 /** Realtek network device operations */
1035  .open = realtek_open,
1036  .close = realtek_close,
1037  .transmit = realtek_transmit,
1038  .poll = realtek_poll,
1039  .irq = realtek_irq,
1040 };
1041 
1042 /******************************************************************************
1043  *
1044  * PCI interface
1045  *
1046  ******************************************************************************
1047  */
1048 
1049 /**
1050  * Detect device type
1051  *
1052  * @v rtl Realtek device
1053  */
1054 static void realtek_detect ( struct realtek_nic *rtl ) {
1055  uint16_t rms;
1056  uint16_t check_rms;
1057  uint16_t cpcr;
1058  uint16_t check_cpcr;
1059 
1060  /* The RX Packet Maximum Size register is present only on
1061  * 8169. Try to set to our intended MTU.
1062  */
1063  rms = RTL_RX_MAX_LEN;
1064  writew ( rms, rtl->regs + RTL_RMS );
1065  check_rms = readw ( rtl->regs + RTL_RMS );
1066 
1067  /* The C+ Command register is present only on 8169 and 8139C+.
1068  * Try to enable C+ mode and PCI Dual Address Cycle (for
1069  * 64-bit systems), if supported.
1070  *
1071  * Note that enabling DAC seems to cause bizarre behaviour
1072  * (lockups, garbage data on the wire) on some systems, even
1073  * if only 32-bit addresses are used.
1074  */
1075  cpcr = readw ( rtl->regs + RTL_CPCR );
1076  cpcr |= ( RTL_CPCR_MULRW | RTL_CPCR_CPRX | RTL_CPCR_CPTX );
1077  if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) )
1078  cpcr |= RTL_CPCR_DAC;
1079  writew ( cpcr, rtl->regs + RTL_CPCR );
1080  check_cpcr = readw ( rtl->regs + RTL_CPCR );
1081 
1082  /* Detect device type */
1083  if ( check_rms == rms ) {
1084  DBGC ( rtl, "REALTEK %p appears to be an RTL8169\n", rtl );
1085  rtl->have_phy_regs = 1;
1086  rtl->tppoll = RTL_TPPOLL_8169;
1087  } else {
1088  if ( ( check_cpcr == cpcr ) && ( cpcr != 0xffff ) ) {
1089  DBGC ( rtl, "REALTEK %p appears to be an RTL8139C+\n",
1090  rtl );
1091  rtl->tppoll = RTL_TPPOLL_8139CP;
1092  } else {
1093  DBGC ( rtl, "REALTEK %p appears to be an RTL8139\n",
1094  rtl );
1095  rtl->legacy = 1;
1096  }
1097  rtl->eeprom.bus = &rtl->spibit.bus;
1098  }
1099 }
1100 
1101 /**
1102  * Probe PCI device
1103  *
1104  * @v pci PCI device
1105  * @ret rc Return status code
1106  */
1107 static int realtek_probe ( struct pci_device *pci ) {
1108  struct net_device *netdev;
1109  struct realtek_nic *rtl;
1110  unsigned int i;
1111  int rc;
1112 
1113  /* Allocate and initialise net device */
1114  netdev = alloc_etherdev ( sizeof ( *rtl ) );
1115  if ( ! netdev ) {
1116  rc = -ENOMEM;
1117  goto err_alloc;
1118  }
1120  rtl = netdev->priv;
1121  pci_set_drvdata ( pci, netdev );
1122  netdev->dev = &pci->dev;
1123  memset ( rtl, 0, sizeof ( *rtl ) );
1126 
1127  /* Fix up PCI device */
1128  adjust_pci_device ( pci );
1129 
1130  /* Map registers */
1131  rtl->regs = ioremap ( pci->membase, RTL_BAR_SIZE );
1132  if ( ! rtl->regs ) {
1133  rc = -ENODEV;
1134  goto err_ioremap;
1135  }
1136 
1137  /* Reset the NIC */
1138  if ( ( rc = realtek_reset ( rtl ) ) != 0 )
1139  goto err_reset;
1140 
1141  /* Detect device type */
1142  realtek_detect ( rtl );
1143 
1144  /* Initialise EEPROM */
1145  if ( rtl->eeprom.bus &&
1146  ( ( rc = realtek_init_eeprom ( netdev ) ) == 0 ) ) {
1147 
1148  /* Read MAC address from EEPROM */
1149  if ( ( rc = nvs_read ( &rtl->eeprom.nvs, RTL_EEPROM_MAC,
1150  netdev->hw_addr, ETH_ALEN ) ) != 0 ) {
1151  DBGC ( rtl, "REALTEK %p could not read MAC address: "
1152  "%s\n", rtl, strerror ( rc ) );
1153  goto err_nvs_read;
1154  }
1155 
1156  } else {
1157 
1158  /* EEPROM not present. Fall back to reading the
1159  * current ID register value, which will hopefully
1160  * have been programmed by the platform firmware.
1161  */
1162  for ( i = 0 ; i < ETH_ALEN ; i++ )
1163  netdev->hw_addr[i] = readb ( rtl->regs + RTL_IDR0 + i );
1164  }
1165 
1166  /* Initialise and reset MII interface */
1168  mii_init ( &rtl->mii, &rtl->mdio, 0 );
1169  if ( ( rc = realtek_phy_reset ( rtl ) ) != 0 )
1170  goto err_phy_reset;
1171 
1172  /* Register network device */
1173  if ( ( rc = register_netdev ( netdev ) ) != 0 )
1174  goto err_register_netdev;
1175 
1176  /* Set initial link state */
1178 
1179  /* Register non-volatile options, if applicable */
1180  if ( rtl->nvo.nvs ) {
1181  if ( ( rc = register_nvo ( &rtl->nvo,
1182  netdev_settings ( netdev ) ) ) != 0)
1183  goto err_register_nvo;
1184  }
1185 
1186  return 0;
1187 
1188  err_register_nvo:
1190  err_register_netdev:
1191  err_phy_reset:
1192  err_nvs_read:
1193  realtek_reset ( rtl );
1194  err_reset:
1195  iounmap ( rtl->regs );
1196  err_ioremap:
1197  netdev_nullify ( netdev );
1198  netdev_put ( netdev );
1199  err_alloc:
1200  return rc;
1201 }
1202 
1203 /**
1204  * Remove PCI device
1205  *
1206  * @v pci PCI device
1207  */
1208 static void realtek_remove ( struct pci_device *pci ) {
1209  struct net_device *netdev = pci_get_drvdata ( pci );
1210  struct realtek_nic *rtl = netdev->priv;
1211 
1212  /* Unregister non-volatile options, if applicable */
1213  if ( rtl->nvo.nvs )
1214  unregister_nvo ( &rtl->nvo );
1215 
1216  /* Unregister network device */
1218 
1219  /* Reset card */
1220  realtek_reset ( rtl );
1221 
1222  /* Free network device */
1223  iounmap ( rtl->regs );
1224  netdev_nullify ( netdev );
1225  netdev_put ( netdev );
1226 }
1227 
1228 /** Realtek PCI device IDs */
1229 static struct pci_device_id realtek_nics[] = {
1230  PCI_ROM ( 0x0001, 0x8168, "clone8169", "Cloned 8169", 0 ),
1231  PCI_ROM ( 0x018a, 0x0106, "fpc0106tx", "LevelOne FPC-0106TX", 0 ),
1232  PCI_ROM ( 0x021b, 0x8139, "hne300", "Compaq HNE-300", 0 ),
1233  PCI_ROM ( 0x02ac, 0x1012, "s1012", "SpeedStream 1012", 0 ),
1234  PCI_ROM ( 0x0357, 0x000a, "ttpmon", "TTTech TTP-Monitoring", 0 ),
1235  PCI_ROM ( 0x10ec, 0x8129, "rtl8129", "RTL-8129", 0 ),
1236  PCI_ROM ( 0x10ec, 0x8136, "rtl8136", "RTL8101E/RTL8102E", 0 ),
1237  PCI_ROM ( 0x10ec, 0x8138, "rtl8138", "RT8139 (B/C)", 0 ),
1238  PCI_ROM ( 0x10ec, 0x8139, "rtl8139", "RTL-8139/8139C/8139C+", 0 ),
1239  PCI_ROM ( 0x10ec, 0x8167, "rtl8167", "RTL-8110SC/8169SC", 0 ),
1240  PCI_ROM ( 0x10ec, 0x8168, "rtl8168", "RTL8111/8168B", 0 ),
1241  PCI_ROM ( 0x10ec, 0x8169, "rtl8169", "RTL-8169", 0 ),
1242  PCI_ROM ( 0x1113, 0x1211, "smc1211", "SMC2-1211TX", 0 ),
1243  PCI_ROM ( 0x1186, 0x1300, "dfe538", "DFE530TX+/DFE538TX", 0 ),
1244  PCI_ROM ( 0x1186, 0x1340, "dfe690", "DFE-690TXD", 0 ),
1245  PCI_ROM ( 0x1186, 0x4300, "dge528t", "DGE-528T", 0 ),
1246  PCI_ROM ( 0x11db, 0x1234, "sega8139", "Sega Enterprises 8139", 0 ),
1247  PCI_ROM ( 0x1259, 0xa117, "allied8139", "Allied Telesyn 8139", 0 ),
1248  PCI_ROM ( 0x1259, 0xa11e, "allied81xx", "Allied Telesyn 81xx", 0 ),
1249  PCI_ROM ( 0x1259, 0xc107, "allied8169", "Allied Telesyn 8169", 0 ),
1250  PCI_ROM ( 0x126c, 0x1211, "northen8139","Northern Telecom 8139", 0 ),
1251  PCI_ROM ( 0x13d1, 0xab06, "fe2000vx", "Abocom FE2000VX", 0 ),
1252  PCI_ROM ( 0x1432, 0x9130, "edi8139", "Edimax 8139", 0 ),
1253  PCI_ROM ( 0x14ea, 0xab06, "fnw3603tx", "Planex FNW-3603-TX", 0 ),
1254  PCI_ROM ( 0x14ea, 0xab07, "fnw3800tx", "Planex FNW-3800-TX", 0 ),
1255  PCI_ROM ( 0x1500, 0x1360, "delta8139", "Delta Electronics 8139", 0 ),
1256  PCI_ROM ( 0x16ec, 0x0116, "usr997902", "USR997902", 0 ),
1257  PCI_ROM ( 0x1737, 0x1032, "linksys8169","Linksys 8169", 0 ),
1258  PCI_ROM ( 0x1743, 0x8139, "rolf100", "Peppercorn ROL/F-100", 0 ),
1259  PCI_ROM ( 0x4033, 0x1360, "addron8139", "Addtron 8139", 0 ),
1260  PCI_ROM ( 0xffff, 0x8139, "clonse8139", "Cloned 8139", 0 ),
1261 };
1262 
1263 /** Realtek PCI driver */
1264 struct pci_driver realtek_driver __pci_driver = {
1265  .ids = realtek_nics,
1266  .id_count = ( sizeof ( realtek_nics ) / sizeof ( realtek_nics[0] ) ),
1267  .probe = realtek_probe,
1269 };
#define RTL_MSR_RXPF
RX pause flag.
Definition: realtek.h:197
#define __attribute__(x)
Definition: compiler.h:10
#define RTL_TPPOLL_NPQ
Normal Priority Queue Polling.
Definition: realtek.h:122
struct realtek_descriptor * desc
Descriptors.
Definition: realtek.h:249
struct bit_basher basher
Bit-bashing interface.
Definition: spi_bit.h:20
#define RTL_RXBUF_ALIGN
Receive buffer alignment.
Definition: realtek.h:105
unsigned long membase
Memory base.
Definition: pci.h:194
#define RTL_RCR_AB
Accept broadcast packets.
Definition: realtek.h:155
static void realtek_spi_write_bit(struct bit_basher *basher, unsigned int bit_id, unsigned long data)
Set/clear output bit.
Definition: realtek.c:153
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
#define RTL_TCR_MXDMA_DEFAULT
Definition: realtek.h:139
unsigned short uint16_t
Definition: stdint.h:11
#define RTL_CR_RE
Receiver Enable.
Definition: realtek.h:110
wmb()
uint8_t readb(volatile uint8_t *io_addr)
Read byte from memory-mapped device.
static void realtek_destroy_ring(struct realtek_nic *rtl, struct realtek_ring *ring)
Destroy descriptor ring.
Definition: realtek.c:610
#define iob_put(iobuf, len)
Definition: iobuf.h:116
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:501
void netdev_tx_defer(struct net_device *netdev, struct io_buffer *iobuf)
Defer transmitted packet.
Definition: netdevice.c:344
#define RTL_EEPROM_MAC
Word offset of MAC address within EEPROM.
Definition: realtek.h:177
#define ADVERTISE_1000FULL
Definition: mii.h:131
#define RTL_RCR_WRAP
Overrun receive buffer.
Definition: realtek.h:153
A PCI driver.
Definition: pci.h:224
#define DBGLVL_IO
Definition: compiler.h:322
#define RTL_IRQ_RER
Receive error.
Definition: realtek.h:129
#define RTL_RCR_9356SEL
EEPROM is a 93C56.
Definition: realtek.h:154
#define RTL_EEPROM_ID_MAGIC
EEPROM code word magic value.
Definition: realtek.h:174
static void realtek_spi_open_bit(struct bit_basher *basher)
Open bit-bashing interface.
Definition: realtek.c:102
Definition: sis900.h:27
int(* open)(struct net_device *netdev)
Open network device.
Definition: netdevice.h:222
A packet descriptor.
Definition: realtek.h:21
#define RTL_CAPR
Current Address of Packet Read (word, 8139 only)
Definition: realtek.h:118
unsigned int prod
Producer index.
Definition: realtek.h:251
#define RTL_MII_MAX_WAIT_US
Maximum time to wait for PHY access, in microseconds.
Definition: realtek.h:210
Error codes.
Bit-bashing operations.
Definition: bitbash.h:15
static int realtek_create_buffer(struct realtek_nic *rtl)
Create receive buffer (legacy mode)
Definition: realtek.c:507
#define RTL_RCR_AM
Accept multicast packets.
Definition: realtek.h:156
#define RTL_MSR_SPEED_10
10Mbps
Definition: realtek.h:194
#define RTL_TCR
Transmit (Tx) Configuration Register (dword)
Definition: realtek.h:136
static void realtek_detect(struct realtek_nic *rtl)
Detect device type.
Definition: realtek.c:1054
uint16_t readw(volatile uint16_t *io_addr)
Read 16-bit word from memory-mapped device.
#define RTL_RX_MAX_LEN
Receive buffer length.
Definition: realtek.h:243
static void netdev_tx_complete_next(struct net_device *netdev)
Complete network transmission.
Definition: netdevice.h:758
I/O buffers.
void free_iob(struct io_buffer *iobuf)
Free I/O buffer.
Definition: iobuf.c:145
#define RTL_MSR_LINKB
Inverse of link status.
Definition: realtek.h:195
#define DBG_ENABLE(level)
Definition: compiler.h:313
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:226
uint64_t address
Base address.
Definition: ena.h:24
#define RTL_MSR_TXPF
TX pause flag.
Definition: realtek.h:196
int register_nvo(struct nvo_block *nvo, struct settings *parent)
Register non-volatile stored options.
Definition: nvo.c:293
int(* read)(struct mii_interface *mdio, unsigned int phy, unsigned int reg)
Read from MII register.
Definition: mii.h:27
static struct bit_basher_operations realtek_basher_ops
SPI bit-bashing interface.
Definition: realtek.c:170
static struct pci_device_id realtek_nics[]
Realtek PCI device IDs.
Definition: realtek.c:1229
#define RTL_ISR
Interrupt Status Register (word)
Definition: realtek.h:133
#define RTL_PHYSTATUS_RXFLOW
RX flow control enabled.
Definition: realtek.h:216
struct nvo_block nvo
Non-volatile options.
Definition: realtek.h:284
int have_phy_regs
PHYAR and PHYSTATUS registers are present.
Definition: realtek.h:293
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
#define RTL_EEPROM_ID
Word offset of ID code word within EEPROM.
Definition: realtek.h:171
#define DBGC(...)
Definition: compiler.h:505
#define RTL_IDR0
ID Register 0 (6 bytes)
Definition: realtek.h:69
#define RTL_EEPROM_VPD
Word offset of VPD / non-volatile options within EEPROM.
Definition: realtek.h:180
#define RTL_PHYSTATUS_100M
100Mbps
Definition: realtek.h:218
#define RTL_MSR_AUX_STATUS
Aux power present.
Definition: realtek.h:193
unsigned int rx_offset
Offset within receive buffer (legacy mode)
Definition: realtek.h:306
unsigned long long uint64_t
Definition: stdint.h:13
#define DBG_DISABLE(level)
Definition: compiler.h:312
void * regs
Registers.
Definition: realtek.h:278
#define RTL_9346CR_EEDO
Data out.
Definition: realtek.h:168
Non-volatile storage.
Realtek 10/100/1000 network card driver.
#define cpu_to_le64(value)
Definition: byteswap.h:108
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:186
#define RTL_BAR_SIZE
PCI memory BAR size.
Definition: realtek.h:18
#define RTL_TSD_ERTXTH_DEFAULT
Definition: realtek.h:80
static void realtek_remove(struct pci_device *pci)
Remove PCI device.
Definition: realtek.c:1208
#define RTL_TSD_OWN
Ownership.
Definition: realtek.h:81
#define RTL_MSR
Media Status Register (byte, 8139 only)
Definition: realtek.h:190
static void realtek_poll_rx(struct net_device *netdev)
Poll for received packets.
Definition: realtek.c:941
static const uint8_t realtek_eeprom_bits[]
Pin mapping for SPI bit-bashing interface.
Definition: realtek.c:90
static int realtek_init_eeprom(struct net_device *netdev)
Initialise EEPROM.
Definition: realtek.c:183
Master In Slave Out.
Definition: spi_bit.h:39
A legacy mode receive packet header.
Definition: realtek.h:53
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
struct bit_basher_operations * op
Bit-bashing operations.
Definition: bitbash.h:57
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:128
struct device dev
Generic device.
Definition: pci.h:189
static struct settings * netdev_settings(struct net_device *netdev)
Get per-netdevice configuration settings block.
Definition: netdevice.h:577
unsigned int reg
Descriptor start address register.
Definition: realtek.h:256
unsigned int mode
SPI interface mode.
Definition: spi.h:136
void writeb(uint8_t data, volatile uint8_t *io_addr)
Write byte to memory-mapped device.
#define ENOTSUP
Operation not supported.
Definition: errno.h:589
static void mdio_init(struct mii_interface *mdio, struct mii_operations *op)
Initialise MII interface.
Definition: mii.h:63
#define RTL_RCR_STOP_WORKING
Here be dragons.
Definition: realtek.h:143
#define RTL_CR_RST
Reset.
Definition: realtek.h:109
#define RTL_NUM_TX_DESC
Number of transmit descriptors.
Definition: realtek.h:93
Dynamic memory allocation.
#define RTL_EEPROM_VPD_LEN
Length of VPD / non-volatile options within EEPROM.
Definition: realtek.h:183
#define RTL_9346CR_EEDI
Data in.
Definition: realtek.h:167
int mii_restart(struct mii_device *mii)
Restart autonegotiation.
Definition: mii.c:43
#define RTL_RCR_MXDMA_DEFAULT
Definition: realtek.h:152
#define RTL_CONFIG1
Configuration Register 1 (byte)
Definition: realtek.h:186
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:498
#define RTL_MSR_TXFCE
TX flow control enabled.
Definition: realtek.h:191
struct mii_device mii
MII device.
Definition: realtek.h:288
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:338
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define RTL_RING_ALIGN
Descriptor ring alignment.
Definition: realtek.h:50
void * memcpy(void *dest, const void *src, size_t len) __nonnull
Three-wire serial interface.
#define RTL_IMR
Interrupt Mask Register (word)
Definition: realtek.h:125
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define RTL_CONFIG1_VPD
Vital Product Data enabled.
Definition: realtek.h:187
#define RTL_9346CR
93C46 (93C56) Command Register (byte)
Definition: realtek.h:161
#define RTL_PHYAR_VALUE(flag, reg, data)
Construct PHY Access Register value.
Definition: realtek.h:204
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:555
#define container_of(ptr, type, field)
Get containing structure.
Definition: stddef.h:35
static int realtek_reset(struct realtek_nic *rtl)
Reset hardware.
Definition: realtek.c:341
static void realtek_dump(struct realtek_nic *rtl)
Dump all registers (for debugging)
Definition: realtek.c:67
Ethernet protocol.
void * priv
Driver private data.
Definition: netdevice.h:425
#define DBGC_HDA(...)
Definition: compiler.h:506
#define RTL_PHYSTATUS_FULLDUP
Full duplex.
Definition: realtek.h:221
void init_spi_bit_basher(struct spi_bit_basher *spibit)
Initialise SPI bit-bashing interface.
Definition: spi_bit.c:235
#define RTL_CPCR_CPTX
C+ transmit enable.
Definition: realtek.h:234
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:768
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
struct realtek_ring rx
Receive descriptor ring.
Definition: realtek.h:300
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
Bit-bashing interfaces.
static int realtek_phy_reset(struct realtek_nic *rtl)
Reset PHY.
Definition: realtek.c:399
Master Out Slave In.
Definition: spi_bit.h:37
static struct net_device * netdev
Definition: gdbudp.c:52
static void realtek_poll_tx(struct net_device *netdev)
Poll for completed packets.
Definition: realtek.c:845
static void realtek_close(struct net_device *netdev)
Close network device.
Definition: realtek.c:749
Descriptor is owned by NIC.
Definition: realtek.h:38
A Realtek network card.
Definition: realtek.h:276
static void realtek_destroy_buffer(struct realtek_nic *rtl)
Destroy receive buffer (legacy mode)
Definition: realtek.c:553
#define RTL_CR_BUFE
Receive buffer empty.
Definition: realtek.h:112
Definition: sis900.h:26
#define MII_CTRL1000
Definition: mii.h:24
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:844
static void realtek_poll(struct net_device *netdev)
Poll for completed and received packets.
Definition: realtek.c:991
#define RTL_IRQ_PUN_LINKCHG
Packet underrun / link change.
Definition: realtek.h:126
uint32_t rx
Maximum number of receive queues.
Definition: intelvf.h:16
void unregister_nvo(struct nvo_block *nvo)
Unregister non-volatile stored options.
Definition: nvo.c:324
#define RTL_TCR_MXDMA_MASK
Definition: realtek.h:138
uint8_t id
Request identifier.
Definition: ena.h:12
size_t len
Length (in bytes)
Definition: realtek.h:258
static void realtek_init_ring(struct realtek_ring *ring, unsigned int count, unsigned int reg)
Initialise descriptor ring.
Definition: realtek.h:269
pseudo_bit_t value[0x00020]
Definition: arbel.h:13
static void realtek_irq(struct net_device *netdev, int enable)
Enable or disable interrupts.
Definition: realtek.c:1023
#define RTL_PHYSTATUS_ENTBI
TBI / GMII mode.
Definition: realtek.h:214
#define RTL_CR
Command Register (byte)
Definition: realtek.h:108
#define iob_unput(iobuf, len)
Definition: iobuf.h:131
A bit-bashing interface.
Definition: bitbash.h:55
struct nvs_device * nvs
Underlying non-volatile storage device.
Definition: nvo.h:26
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
struct refcnt refcnt
Reference counter.
Definition: netdevice.h:350
#define RTL_CR_TE
Transmit Enable.
Definition: realtek.h:111
static void realtek_check_link(struct net_device *netdev)
Check link state.
Definition: realtek.c:444
void nvo_init(struct nvo_block *nvo, struct nvs_device *nvs, size_t address, size_t len, int(*resize)(struct nvo_block *nvo, size_t len), struct refcnt *refcnt)
Initialise non-volatile stored options.
Definition: nvo.c:273
uint32_t tx
Maximum number of transmit queues.
Definition: intelvf.h:14
#define RTL_CPCR
C+ Command Register (word)
Definition: realtek.h:230
static unsigned int unsigned int reg
Definition: intel.h:245
PCI bus.
#define RTL_RCR_RXFTH_DEFAULT
Definition: realtek.h:146
#define RTL_RCR_RBLEN_MASK
Definition: realtek.h:148
#define RTL_RCR_AAP
Accept all packets.
Definition: realtek.h:158
A PCI device.
Definition: pci.h:187
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:667
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:151
Serial clock.
Definition: spi_bit.h:35
static int realtek_transmit(struct net_device *netdev, struct io_buffer *iobuf)
Transmit packet.
Definition: realtek.c:780
A network device.
Definition: netdevice.h:348
Media Independent Interface.
#define RTL_PHYAR
PHY Access Register (dword, 8169 only)
Definition: realtek.h:200
static void realtek_refill_rx(struct realtek_nic *rtl)
Refill receive descriptor ring.
Definition: realtek.c:635
#define ENODEV
No such device.
Definition: errno.h:509
unsigned int cons
Consumer index.
Definition: realtek.h:253
#define SPI_BIT_SS(slave)
Determine bit index for a particular slave.
Definition: spi_bit.h:50
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:511
#define RTL_CPCR_CPRX
C+ receive enable.
Definition: realtek.h:233
#define RTL_RCR_RXFTH_MASK
Definition: realtek.h:145
#define RTL_PHYSTATUS_LINKSTS
Link ok.
Definition: realtek.h:220
unsigned char uint8_t
Definition: stdint.h:10
static void mii_dump(struct mii_device *mii)
Dump MII registers (for debugging)
Definition: mii.h:116
int mii_reset(struct mii_device *mii)
Reset MII device.
Definition: mii.c:74
#define ETH_ALEN
Definition: if_ether.h:8
static int realtek_mii_read(struct mii_interface *mdio, unsigned int phy __unused, unsigned int reg)
Read from MII register.
Definition: realtek.c:250
#define ETH_ZLEN
Definition: if_ether.h:10
A PCI device ID list entry.
Definition: pci.h:151
#define ADVERTISE_1000HALF
Definition: mii.h:132
#define le16_to_cpu(value)
Definition: byteswap.h:112
End of descriptor ring.
Definition: realtek.h:40
unsigned int uint32_t
Definition: stdint.h:12
#define RTL_9346CR_EEM_NORMAL
Normal mode.
Definition: realtek.h:164
struct i386_regs regs
Definition: registers.h:15
struct spi_bus bus
SPI bus.
Definition: spi_bit.h:18
static struct xen_remove_from_physmap * remove
Definition: xenmem.h:39
#define RTL_MSR_RXFCE
RX flow control enabled.
Definition: realtek.h:192
Network device operations.
Definition: netdevice.h:213
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:470
struct device * dev
Underlying hardware device.
Definition: netdevice.h:360
static void mii_init(struct mii_device *mii, struct mii_interface *mdio, unsigned int address)
Initialise MII device.
Definition: mii.h:75
void * rx_buffer
Receive buffer (legacy mode)
Definition: realtek.h:304
static struct mii_operations realtek_mii_operations
Realtek MII operations.
Definition: realtek.c:323
Network device management.
MII interface operations.
Definition: mii.h:18
unsigned long physaddr_t
Definition: stdint.h:20
static int realtek_probe(struct pci_device *pci)
Probe PCI device.
Definition: realtek.c:1107
#define RTL_TNPDS
Transmit Normal Priority Descriptors (qword)
Definition: realtek.h:87
#define __unused
Declare a variable or data structure as unused.
Definition: compiler.h:573
struct nvs_device nvs
NVS device.
Definition: spi.h:88
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:348
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition: timer.c:78
#define RTL_TSD(n)
Transmit Status of Descriptor N (dword, 8139 only)
Definition: realtek.h:78
static int realtek_mii_write(struct mii_interface *mdio, unsigned int phy __unused, unsigned int reg, unsigned int data)
Write to MII register.
Definition: realtek.c:291
struct pci_driver realtek_driver __pci_driver
Realtek PCI driver.
Definition: realtek.c:1264
int legacy
Legacy datapath mode.
Definition: realtek.h:291
#define RTL_RMS
RX Packet Maximum Size Register (word)
Definition: realtek.h:227
#define RTL_MAR4
Multicast Register 4 (dword)
Definition: realtek.h:75
#define RTL_IRQ_ROK
Receive OK.
Definition: realtek.h:130
struct mii_interface mdio
MII interface.
Definition: realtek.h:286
uint32_t len
Length.
Definition: ena.h:14
uint8_t unused[32]
Unused.
Definition: eltorito.h:15
#define DBGC2(...)
Definition: compiler.h:522
#define RTL_IRQ_TOK
Transmit OK.
Definition: realtek.h:128
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:237
#define RTL_RCR_RBLEN_DEFAULT
Definition: realtek.h:149
#define writew
Definition: w89c840.c:159
#define RTL_RXBUF_LEN
Receive buffer length.
Definition: realtek.h:99
#define RTL_PHYSTATUS_TXFLOW
TX flow control enabled.
Definition: realtek.h:215
void * data
Start of data.
Definition: iobuf.h:44
#define RTL_RESET_MAX_WAIT_MS
Maximum time to wait for a reset, in milliseconds.
Definition: realtek.h:115
#define EIO
Input/output error.
Definition: errno.h:433
#define RTL_9346CR_EESK
Clock.
Definition: realtek.h:166
struct spi_bus * bus
SPI bus to which device is attached.
Definition: spi.h:90
#define RTL_IRQ_TER
Transmit error.
Definition: realtek.h:127
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
An MII interface.
Definition: mii.h:43
static void *__malloc malloc_dma(size_t size, size_t phys_align)
Allocate memory for DMA.
Definition: malloc.h:66
#define RTL_TPPOLL_8169
Transmit Priority Polling Register (byte, 8169 only)
Definition: realtek.h:121
unsigned int tppoll
TPPoll register offset.
Definition: realtek.h:295
#define cpu_to_le16(value)
Definition: byteswap.h:106
void iounmap(volatile const void *io_addr)
Unmap I/O address.
#define RTL_DESC_SIZE_MASK
Descriptor buffer size mask.
Definition: realtek.h:33
static struct net_device_operations realtek_operations
Realtek network device operations.
Definition: realtek.c:1034
Receive error summary.
Definition: realtek.h:46
static int realtek_open(struct net_device *netdev)
Open network device.
Definition: realtek.c:685
int nvs_read(struct nvs_device *nvs, unsigned int address, void *data, size_t len)
Read from non-volatile storage device.
Definition: nvs.c:75
static int mii_read(int phy_id, int location)
Definition: epic100.c:499
#define RTL_RXBUF_PAD
Receive buffer padding.
Definition: realtek.h:102
static int realtek_spi_read_bit(struct bit_basher *basher, unsigned int bit_id)
Read input bit.
Definition: realtek.c:133
void(* open)(struct bit_basher *basher)
Open bit-bashing interface (optional)
Definition: bitbash.h:21
#define SPI_MODE_THREEWIRE
Threewire-compatible mode.
Definition: spi.h:199
#define RTL_RDSAR
Receive Descriptor Start Address Register (qword)
Definition: realtek.h:237
struct arbelprm_port_state_change_st data
Message.
Definition: arbel.h:12
static int realtek_create_ring(struct realtek_nic *rtl, struct realtek_ring *ring)
Create descriptor ring.
Definition: realtek.c:576
#define RTL_CPCR_DAC
PCI Dual Address Cycle Enable.
Definition: realtek.h:231
#define RTL_9346CR_EEM_EEPROM
EEPROM mode.
Definition: realtek.h:163
#define RTL_RCR_MXDMA_MASK
Definition: realtek.h:151
#define RTL_TPPOLL_8139CP
Transmit Priority Polling Register (byte, 8139C+ only)
Definition: realtek.h:224
void * ioremap(unsigned long bus_addr, size_t len)
Map bus address as an I/O address.
A Realtek descriptor ring.
Definition: realtek.h:247
Last segment descriptor.
Definition: realtek.h:44
#define RTL_CPCR_MULRW
PCI Multiple Read/Write Enable.
Definition: realtek.h:232
static void free_dma(void *ptr, size_t size)
Free memory allocated with malloc_dma()
Definition: malloc.h:81
#define RTL_MAR0
Multicast Register 0 (dword)
Definition: realtek.h:72
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
#define DBG_LOG
Definition: compiler.h:317
First segment descriptor.
Definition: realtek.h:42
#define RTL_PHYAR_DATA(value)
Extract PHY Access Register data.
Definition: realtek.h:207
static int mii_write(struct mii_device *mii, unsigned int reg, unsigned int data)
Write to MII register.
Definition: mii.h:104
#define RTL_RBSTART
Receive Buffer Start Address (dword, 8139 only)
Definition: realtek.h:96
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
Definition: netdevice.h:375
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
#define RTL_PHYAR_FLAG
Read/write flag.
Definition: realtek.h:201
#define ETIMEDOUT
Connection timed out.
Definition: errno.h:669
struct realtek_ring tx
Transmit descriptor ring.
Definition: realtek.h:298
String functions.
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:283
void iob_pad(struct io_buffer *iobuf, size_t min_len)
Pad I/O buffer.
Definition: iobpad.c:49
struct io_buffer * rx_iobuf[RTL_NUM_RX_DESC]
Receive I/O buffers.
Definition: realtek.h:302
static void realtek_spi_close_bit(struct bit_basher *basher)
Close bit-bashing interface.
Definition: realtek.c:116
#define RTL_RCR_APM
Accept physical match.
Definition: realtek.h:157
Received OK.
Definition: realtek.h:65
#define RTL_PHYSTATUS
PHY (GMII, MII, or TBI) Status Register (byte, 8169 only)
Definition: realtek.h:213
#define RTL_NUM_RX_DESC
Number of receive descriptors.
Definition: realtek.h:240
#define RTL_PHYSTATUS_10M
10Mbps
Definition: realtek.h:219
#define RTL_RCR
Receive (Rx) Configuration Register (dword)
Definition: realtek.h:142
#define RTL_PHYSTATUS_1000MF
1000Mbps full-duplex
Definition: realtek.h:217
struct spi_bit_basher spibit
SPI bit-bashing interface.
Definition: realtek.h:280
static int realtek_phy_speed(struct realtek_nic *rtl)
Configure PHY for Gigabit operation.
Definition: realtek.c:369
#define RTL_9346CR_EECS
Chip select.
Definition: realtek.h:165
void * memset(void *dest, int character, size_t len) __nonnull
static void realtek_legacy_poll_rx(struct net_device *netdev)
Poll for received packets (legacy mode)
Definition: realtek.c:885
struct spi_device eeprom
EEPROM.
Definition: realtek.h:282
A persistent I/O buffer.
Definition: iobuf.h:32
#define RTL_TSAD(n)
Transmit Start Address of Descriptor N (dword, 8139 only)
Definition: realtek.h:84