53 #define ATH9K_ANI_OFDM_NUM_LEVEL \ 54 ARRAY_SIZE(ofdm_level_table) 55 #define ATH9K_ANI_OFDM_MAX_LEVEL \ 56 (ATH9K_ANI_OFDM_NUM_LEVEL-1) 57 #define ATH9K_ANI_OFDM_DEF_LEVEL \ 99 #define ATH9K_ANI_CCK_NUM_LEVEL \ 100 ARRAY_SIZE(cck_level_table) 101 #define ATH9K_ANI_CCK_MAX_LEVEL \ 102 (ATH9K_ANI_CCK_NUM_LEVEL-1) 103 #define ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI \ 104 (ATH9K_ANI_CCK_NUM_LEVEL-3) 105 #define ATH9K_ANI_CCK_DEF_LEVEL \ 126 u32 ofdm_base = 0, cck_base = 0;
131 aniState = &
ah->curchan->ani;
140 "Writing ofdmbase=%d cckbase=%d\n", ofdm_base, cck_base);
162 aniState = &
ah->curchan->ani;
222 aniState = &
ah->curchan->ani;
253 "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
287 aniState = &
ah->curchan->ani;
304 "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
346 aniState = &
ah->curchan->ani;
357 aniState = &
ah->curchan->ani;
405 aniState = &
ah->curchan->ani;
431 aniState = &
ah->curchan->ani;
477 ah->stats.ast_ani_reset++;
494 "Restore defaults: chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
509 "Restore history: chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
542 u32 ofdmPhyErrCnt, cckPhyErrCnt;
543 u32 phyCnt1, phyCnt2;
550 ah->stats.ast_ani_lneg++;
565 if (!
use_new_ani(
ah) && (phyCnt1 < ofdm_base || phyCnt2 < cck_base)) {
566 if (phyCnt1 < ofdm_base) {
568 "phyCnt1 0x%x, resetting counter value to 0x%x\n",
574 if (phyCnt2 < cck_base) {
576 "phyCnt2 0x%x, resetting counter value to 0x%x\n",
585 ofdmPhyErrCnt = phyCnt1 - ofdm_base;
586 ah->stats.ast_ani_ofdmerrs +=
590 cckPhyErrCnt = phyCnt2 - cck_base;
591 ah->stats.ast_ani_cckerrs +=
600 u32 ofdmPhyErrRate, cckPhyErrRate;
605 aniState = &
ah->curchan->ani;
618 "listenTime=%d OFDM:%d errs=%d/s CCK:%d errs=%d/s ofdm_turn=%d\n",
625 if (ofdmPhyErrRate <= ah->config.ofdm_trig_low &&
626 cckPhyErrRate <= ah->config.cck_trig_low) {
633 if (ofdmPhyErrRate >
ah->config.ofdm_trig_high &&
634 (cckPhyErrRate <= ah->config.cck_trig_high ||
639 }
else if (cckPhyErrRate >
ah->config.cck_trig_high) {
651 static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
652 static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
653 static const int coarseLow[] = { -64, -64, -64, -64, -70 };
654 static const int firpwr[] = { -78, -78, -78, -78, -80 };
656 for (i = 0; i < 5; i++) {
657 ah->totalSizeDesired[i] = totalSizeDesired[i];
658 ah->coarse_high[i] = coarseHigh[i];
659 ah->coarse_low[i] = coarseLow[i];
660 ah->firpwr[i] = firpwr[i];
668 DBG2(
"ath9k: Initialize ANI\n");
729 if (
ah->config.enable_ani)
static void ath9k_hw_set_cck_nil(struct ath_hw *ah, uint8_t immunityLevel)
static void ath9k_hw_update_mibstats(struct ath_hw *ah, struct ath9k_mib_stats *stats)
static void ath9k_hw_ani_lower_immunity_old(struct ath_hw *ah)
#define AR_PHY_ERR_MASK_2
#define ATH9K_ANI_CCK_TRIG_HIGH_NEW
void ath9k_hw_ani_init(struct ath_hw *ah)
#define HAL_FIRST_STEP_MAX
#define ATH9K_ANI_CCK_TRIG_HIGH_OLD
void ath9k_ani_reset(struct ath_hw *ah, int is_scanning)
#define REGWRITE_BUFFER_FLUSH(_ah)
#define ATH9K_ANI_OFDM_TRIG_LOW_OLD
static void ath9k_hw_ani_cck_err_trigger_old(struct ath_hw *ah)
static int ath9k_hw_ani_read_counters(struct ath_hw *ah)
#define AR_SREV_9485(_ah)
#define ATH9K_ANI_OFDM_DEF_LEVEL
static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah)
#define AR_PHY_ERR_CCK_TIMING
#define ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI
static const struct ani_cck_level_entry cck_level_table[]
#define ATH9K_ANI_CCK_DEF_LEVEL
struct net80211_channel * chan
void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan __unused)
#define NET80211_BAND_2GHZ
The 2.4 GHz ISM band, unlicensed in most countries.
#define AR_SREV_9300_20_OR_LATER(_ah)
void ath_hw_cycle_counters_update(struct ath_common *common)
ath_hw_cycle_counters_update - common function to update cycle counters
#define ATH9K_ANI_RSSI_THR_HIGH
#define ATH9K_ANI_CCK_TRIG_LOW_NEW
#define __unused
Declare a variable or data structure as unused.
#define ATH9K_ANI_POLLINTERVAL_NEW
static void ath9k_hw_ani_lower_immunity(struct ath_hw *ah)
#define ATH9K_ANI_OFDM_TRIG_LOW_NEW
#define ATH9K_ANI_FIRSTEP_LVL_NEW
#define ATH9K_ANI_FIRSTEP_LVL_OLD
static void ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah)
static struct ath_common * ath9k_hw_common(struct ath_hw *ah)
#define ATH9K_ANI_CCK_TRIG_LOW_OLD
#define ATH9K_ANI_SPUR_IMMUNE_LVL_NEW
struct ib_cm_common common
#define ATH9K_ANI_OFDM_TRIG_HIGH_NEW
#define REG_READ(_ah, _reg)
void ath9k_hw_ani_setup(struct ath_hw *ah)
static void ath9k_ani_restart(struct ath_hw *ah)
int32_t ath_hw_get_listen_time(struct ath_common *common)
int modparam_force_new_ani
void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits)
static int use_new_ani(struct ath_hw *ah)
static int ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param)
#define ATH9K_ANI_OFDM_TRIG_HIGH_OLD
struct ar5416AniState ani
#define REG_WRITE(_ah, _reg, _val)
#define ATH9K_ANI_PERIOD_OLD
#define AR_PHY_ERR_MASK_1
#define ATH9K_ANI_USE_OFDM_WEAK_SIG
#define ATH9K_ANI_CCK_MAX_LEVEL
static void ath9k_ani_reset_old(struct ath_hw *ah)
#define AR_PHY_ERR_OFDM_TIMING
static void ath9k_hw_ani_ofdm_err_trigger_old(struct ath_hw *ah)
#define ATH9K_ANI_ENABLE_MRC_CCK
#define HAL_SPUR_IMMUNE_MAX
#define DBG(...)
Print a debugging message.
#define ATH9K_ANI_PERIOD_NEW
#define ATH9K_ANI_POLLINTERVAL_OLD
static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)
#define ATH9K_ANI_CCK_WEAK_SIG_THR
#define ATH9K_ANI_SPUR_IMMUNE_LVL_OLD
u32 ath9k_hw_getrxfilter(struct ath_hw *ah)
u8 ofdmNoiseImmunityLevel
#define ATH9K_ANI_RSSI_THR_LOW
#define ENABLE_REGWRITE_BUFFER(_ah)
static const struct ani_ofdm_level_entry ofdm_level_table[]
#define ATH9K_ANI_OFDM_MAX_LEVEL
#define HAL_NOISE_IMMUNE_MAX