iPXE
Data Structures | Macros | Functions | Variables
ath9k_ani.c File Reference
#include "hw.h"
#include "hw-ops.h"

Go to the source code of this file.

Data Structures

struct  ani_ofdm_level_entry
 
struct  ani_cck_level_entry
 

Macros

#define ATH9K_ANI_OFDM_NUM_LEVEL   ARRAY_SIZE(ofdm_level_table)
 
#define ATH9K_ANI_OFDM_MAX_LEVEL   (ATH9K_ANI_OFDM_NUM_LEVEL-1)
 
#define ATH9K_ANI_OFDM_DEF_LEVEL   3 /* default level - matches the INI settings */
 
#define ATH9K_ANI_CCK_NUM_LEVEL   ARRAY_SIZE(cck_level_table)
 
#define ATH9K_ANI_CCK_MAX_LEVEL   (ATH9K_ANI_CCK_NUM_LEVEL-1)
 
#define ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI   (ATH9K_ANI_CCK_NUM_LEVEL-3)
 
#define ATH9K_ANI_CCK_DEF_LEVEL   2 /* default level - matches the INI settings */
 

Functions

 FILE_SECBOOT (FORBIDDEN)
 
static int use_new_ani (struct ath_hw *ah)
 
static void ath9k_hw_update_mibstats (struct ath_hw *ah, struct ath9k_mib_stats *stats)
 
static void ath9k_ani_restart (struct ath_hw *ah)
 
static void ath9k_hw_ani_ofdm_err_trigger_old (struct ath_hw *ah)
 
static void ath9k_hw_ani_cck_err_trigger_old (struct ath_hw *ah)
 
static void ath9k_hw_set_ofdm_nil (struct ath_hw *ah, u8 immunityLevel)
 
static void ath9k_hw_ani_ofdm_err_trigger (struct ath_hw *ah)
 
static void ath9k_hw_set_cck_nil (struct ath_hw *ah, uint8_t immunityLevel)
 
static void ath9k_hw_ani_cck_err_trigger (struct ath_hw *ah)
 
static void ath9k_hw_ani_lower_immunity_old (struct ath_hw *ah)
 
static void ath9k_hw_ani_lower_immunity (struct ath_hw *ah)
 
static void ath9k_ani_reset_old (struct ath_hw *ah)
 
void ath9k_ani_reset (struct ath_hw *ah, int is_scanning)
 
static int ath9k_hw_ani_read_counters (struct ath_hw *ah)
 
void ath9k_hw_ani_monitor (struct ath_hw *ah, struct ath9k_channel *chan __unused)
 
void ath9k_hw_ani_setup (struct ath_hw *ah)
 
void ath9k_hw_ani_init (struct ath_hw *ah)
 

Variables

static const struct ani_ofdm_level_entry ofdm_level_table []
 
static const struct ani_cck_level_entry cck_level_table []
 

Macro Definition Documentation

◆ ATH9K_ANI_OFDM_NUM_LEVEL

#define ATH9K_ANI_OFDM_NUM_LEVEL   ARRAY_SIZE(ofdm_level_table)

Definition at line 55 of file ath9k_ani.c.

◆ ATH9K_ANI_OFDM_MAX_LEVEL

#define ATH9K_ANI_OFDM_MAX_LEVEL   (ATH9K_ANI_OFDM_NUM_LEVEL-1)

Definition at line 57 of file ath9k_ani.c.

◆ ATH9K_ANI_OFDM_DEF_LEVEL

#define ATH9K_ANI_OFDM_DEF_LEVEL   3 /* default level - matches the INI settings */

Definition at line 59 of file ath9k_ani.c.

◆ ATH9K_ANI_CCK_NUM_LEVEL

#define ATH9K_ANI_CCK_NUM_LEVEL   ARRAY_SIZE(cck_level_table)

Definition at line 101 of file ath9k_ani.c.

◆ ATH9K_ANI_CCK_MAX_LEVEL

#define ATH9K_ANI_CCK_MAX_LEVEL   (ATH9K_ANI_CCK_NUM_LEVEL-1)

Definition at line 103 of file ath9k_ani.c.

◆ ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI

#define ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI   (ATH9K_ANI_CCK_NUM_LEVEL-3)

Definition at line 105 of file ath9k_ani.c.

◆ ATH9K_ANI_CCK_DEF_LEVEL

#define ATH9K_ANI_CCK_DEF_LEVEL   2 /* default level - matches the INI settings */

Definition at line 107 of file ath9k_ani.c.

Function Documentation

◆ FILE_SECBOOT()

FILE_SECBOOT ( FORBIDDEN  )

◆ use_new_ani()

static int use_new_ani ( struct ath_hw ah)
static

◆ ath9k_hw_update_mibstats()

static void ath9k_hw_update_mibstats ( struct ath_hw ah,
struct ath9k_mib_stats stats 
)
static

Definition at line 115 of file ath9k_ani.c.

117 {
118  stats->ackrcv_bad += REG_READ(ah, AR_ACK_FAIL);
119  stats->rts_bad += REG_READ(ah, AR_RTS_FAIL);
120  stats->fcs_bad += REG_READ(ah, AR_FCS_FAIL);
121  stats->rts_good += REG_READ(ah, AR_RTS_OK);
122  stats->beacons += REG_READ(ah, AR_BEACON_CNT);
123 }
#define AR_BEACON_CNT
Definition: reg.h:1585
#define AR_RTS_OK
Definition: reg.h:1581
u32 beacons
Definition: ani.h:99
u32 rts_good
Definition: ani.h:97
#define AR_ACK_FAIL
Definition: reg.h:1583
#define AR_FCS_FAIL
Definition: reg.h:1584
u32 rts_bad
Definition: ani.h:96
#define REG_READ(_ah, _reg)
Definition: hw.h:81
u32 ackrcv_bad
Definition: ani.h:95
#define AR_RTS_FAIL
Definition: reg.h:1582
u32 fcs_bad
Definition: ani.h:98
uint8_t ah
Definition: registers.h:85

References ath9k_mib_stats::ackrcv_bad, ah, AR_ACK_FAIL, AR_BEACON_CNT, AR_FCS_FAIL, AR_RTS_FAIL, AR_RTS_OK, ath9k_mib_stats::beacons, ath9k_mib_stats::fcs_bad, REG_READ, ath9k_mib_stats::rts_bad, and ath9k_mib_stats::rts_good.

Referenced by ath9k_ani_restart().

◆ ath9k_ani_restart()

static void ath9k_ani_restart ( struct ath_hw ah)
static

Definition at line 125 of file ath9k_ani.c.

126 {
127  struct ar5416AniState *aniState;
128  u32 ofdm_base = 0, cck_base = 0;
129 
130  if (!DO_ANI(ah))
131  return;
132 
133  aniState = &ah->curchan->ani;
134  aniState->listenTime = 0;
135 
136  if (!use_new_ani(ah)) {
137  ofdm_base = AR_PHY_COUNTMAX - ah->config.ofdm_trig_high;
138  cck_base = AR_PHY_COUNTMAX - ah->config.cck_trig_high;
139  }
140 
141  DBG2("ath9k: "
142  "Writing ofdmbase=%d cckbase=%d\n", ofdm_base, cck_base);
143 
145 
146  REG_WRITE(ah, AR_PHY_ERR_1, ofdm_base);
147  REG_WRITE(ah, AR_PHY_ERR_2, cck_base);
150 
152 
153  ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
154 
155  aniState->ofdmPhyErrCount = 0;
156  aniState->cckPhyErrCount = 0;
157 }
u32 listenTime
Definition: ani.h:131
static void ath9k_hw_update_mibstats(struct ath_hw *ah, struct ath9k_mib_stats *stats)
Definition: ath9k_ani.c:115
#define AR_PHY_ERR_MASK_2
Definition: reg.h:1671
#define REGWRITE_BUFFER_FLUSH(_ah)
Definition: hw.h:96
#define AR_PHY_ERR_CCK_TIMING
Definition: reg.h:1633
#define AR_PHY_ERR_2
Definition: reg.h:1669
#define DO_ANI(ah)
Definition: ani.h:28
#define AR_PHY_ERR_1
Definition: reg.h:1665
#define AR_PHY_COUNTMAX
Definition: reg.h:1673
static int use_new_ani(struct ath_hw *ah)
Definition: ath9k_ani.c:110
#define REG_WRITE(_ah, _reg, _val)
Definition: hw.h:78
#define AR_PHY_ERR_MASK_1
Definition: reg.h:1667
u32 ofdmPhyErrCount
Definition: ani.h:135
uint8_t ah
Definition: registers.h:85
#define AR_PHY_ERR_OFDM_TIMING
Definition: reg.h:1632
u32 cckPhyErrCount
Definition: ani.h:136
uint32_t u32
Definition: stdint.h:24
#define ENABLE_REGWRITE_BUFFER(_ah)
Definition: hw.h:90
#define DBG2(...)
Definition: compiler.h:515

References ah, AR_PHY_COUNTMAX, AR_PHY_ERR_1, AR_PHY_ERR_2, AR_PHY_ERR_CCK_TIMING, AR_PHY_ERR_MASK_1, AR_PHY_ERR_MASK_2, AR_PHY_ERR_OFDM_TIMING, ath9k_hw_update_mibstats(), ar5416AniState::cckPhyErrCount, DBG2, DO_ANI, ENABLE_REGWRITE_BUFFER, ar5416AniState::listenTime, ar5416AniState::ofdmPhyErrCount, REG_WRITE, REGWRITE_BUFFER_FLUSH, and use_new_ani().

Referenced by ath9k_ani_reset(), ath9k_ani_reset_old(), ath9k_hw_ani_init(), ath9k_hw_ani_monitor(), and ath9k_hw_ani_read_counters().

◆ ath9k_hw_ani_ofdm_err_trigger_old()

static void ath9k_hw_ani_ofdm_err_trigger_old ( struct ath_hw ah)
static

Definition at line 159 of file ath9k_ani.c.

160 {
161  struct ar5416AniState *aniState;
162  int32_t rssi;
163 
164  aniState = &ah->curchan->ani;
165 
166  if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) {
168  aniState->noiseImmunityLevel + 1)) {
169  return;
170  }
171  }
172 
173  if (aniState->spurImmunityLevel < HAL_SPUR_IMMUNE_MAX) {
175  aniState->spurImmunityLevel + 1)) {
176  return;
177  }
178  }
179 
180  rssi = BEACON_RSSI(ah);
181  if (rssi > aniState->rssiThrHigh) {
182  if (aniState->ofdmWeakSigDetect) {
185  0)) {
188  return;
189  }
190  }
191  if (aniState->firstepLevel < HAL_FIRST_STEP_MAX) {
193  aniState->firstepLevel + 1);
194  return;
195  }
196  } else if (rssi > aniState->rssiThrLow) {
197  if (!aniState->ofdmWeakSigDetect)
200  1);
201  if (aniState->firstepLevel < HAL_FIRST_STEP_MAX)
203  aniState->firstepLevel + 1);
204  return;
205  } else {
206  if ((ah->dev->channels + ah->dev->channel)->band == NET80211_BAND_2GHZ) {
207  if (aniState->ofdmWeakSigDetect)
210  0);
211  if (aniState->firstepLevel > 0)
214  return;
215  }
216  }
217 }
u8 spurImmunityLevel
Definition: ani.h:127
int32_t rssiThrHigh
Definition: ani.h:133
#define BEACON_RSSI(ahp)
Definition: ani.h:30
#define HAL_FIRST_STEP_MAX
Definition: ani.h:70
int32_t rssiThrLow
Definition: ani.h:132
#define NET80211_BAND_2GHZ
The 2.4 GHz ISM band, unlicensed in most countries.
Definition: net80211.h:45
u8 ofdmWeakSigDetect
Definition: ani.h:129
u8 firstepLevel
Definition: ani.h:128
signed int int32_t
Definition: stdint.h:17
static int ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param)
Definition: hw-ops.h:247
uint8_t ah
Definition: registers.h:85
#define HAL_SPUR_IMMUNE_MAX
Definition: ani.h:69
u8 noiseImmunityLevel
Definition: ani.h:122
#define HAL_NOISE_IMMUNE_MAX
Definition: ani.h:68

References ah, ATH9K_ANI_FIRSTEP_LEVEL, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION, ATH9K_ANI_SPUR_IMMUNITY_LEVEL, ath9k_hw_ani_control(), BEACON_RSSI, ar5416AniState::firstepLevel, HAL_FIRST_STEP_MAX, HAL_NOISE_IMMUNE_MAX, HAL_SPUR_IMMUNE_MAX, NET80211_BAND_2GHZ, ar5416AniState::noiseImmunityLevel, ar5416AniState::ofdmWeakSigDetect, ar5416AniState::rssiThrHigh, ar5416AniState::rssiThrLow, and ar5416AniState::spurImmunityLevel.

Referenced by ath9k_hw_ani_ofdm_err_trigger().

◆ ath9k_hw_ani_cck_err_trigger_old()

static void ath9k_hw_ani_cck_err_trigger_old ( struct ath_hw ah)
static

Definition at line 219 of file ath9k_ani.c.

220 {
221  struct ar5416AniState *aniState;
222  int32_t rssi;
223 
224  aniState = &ah->curchan->ani;
225  if (aniState->noiseImmunityLevel < HAL_NOISE_IMMUNE_MAX) {
227  aniState->noiseImmunityLevel + 1)) {
228  return;
229  }
230  }
231  rssi = BEACON_RSSI(ah);
232  if (rssi > aniState->rssiThrLow) {
233  if (aniState->firstepLevel < HAL_FIRST_STEP_MAX)
235  aniState->firstepLevel + 1);
236  } else {
237  if ((ah->dev->channels + ah->dev->channel)->band == NET80211_BAND_2GHZ) {
238  if (aniState->firstepLevel > 0)
241  }
242  }
243 }
#define BEACON_RSSI(ahp)
Definition: ani.h:30
#define HAL_FIRST_STEP_MAX
Definition: ani.h:70
int32_t rssiThrLow
Definition: ani.h:132
#define NET80211_BAND_2GHZ
The 2.4 GHz ISM band, unlicensed in most countries.
Definition: net80211.h:45
u8 firstepLevel
Definition: ani.h:128
signed int int32_t
Definition: stdint.h:17
static int ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param)
Definition: hw-ops.h:247
uint8_t ah
Definition: registers.h:85
u8 noiseImmunityLevel
Definition: ani.h:122
#define HAL_NOISE_IMMUNE_MAX
Definition: ani.h:68

References ah, ATH9K_ANI_FIRSTEP_LEVEL, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, ath9k_hw_ani_control(), BEACON_RSSI, ar5416AniState::firstepLevel, HAL_FIRST_STEP_MAX, HAL_NOISE_IMMUNE_MAX, NET80211_BAND_2GHZ, ar5416AniState::noiseImmunityLevel, and ar5416AniState::rssiThrLow.

Referenced by ath9k_hw_ani_cck_err_trigger().

◆ ath9k_hw_set_ofdm_nil()

static void ath9k_hw_set_ofdm_nil ( struct ath_hw ah,
u8  immunityLevel 
)
static

Definition at line 246 of file ath9k_ani.c.

247 {
248  struct ar5416AniState *aniState = &ah->curchan->ani;
249  const struct ani_ofdm_level_entry *entry_ofdm;
250  const struct ani_cck_level_entry *entry_cck;
251 
252  aniState->noiseFloor = BEACON_RSSI(ah);
253 
254  DBG2("ath9k: "
255  "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
256  aniState->ofdmNoiseImmunityLevel,
257  immunityLevel, aniState->noiseFloor,
258  aniState->rssiThrLow, aniState->rssiThrHigh);
259 
260  aniState->ofdmNoiseImmunityLevel = immunityLevel;
261 
262  entry_ofdm = &ofdm_level_table[aniState->ofdmNoiseImmunityLevel];
263  entry_cck = &cck_level_table[aniState->cckNoiseImmunityLevel];
264 
265  if (aniState->spurImmunityLevel != entry_ofdm->spur_immunity_level)
268  entry_ofdm->spur_immunity_level);
269 
270  if (aniState->firstepLevel != entry_ofdm->fir_step_level &&
271  entry_ofdm->fir_step_level >= entry_cck->fir_step_level)
274  entry_ofdm->fir_step_level);
275 }
int fir_step_level
Definition: ath9k_ani.c:27
int spur_immunity_level
Definition: ath9k_ani.c:26
u8 spurImmunityLevel
Definition: ani.h:127
u32 noiseFloor
Definition: ani.h:134
int32_t rssiThrHigh
Definition: ani.h:133
#define BEACON_RSSI(ahp)
Definition: ani.h:30
int32_t rssiThrLow
Definition: ani.h:132
static const struct ani_cck_level_entry cck_level_table[]
Definition: ath9k_ani.c:88
u8 cckNoiseImmunityLevel
Definition: ani.h:124
u8 firstepLevel
Definition: ani.h:128
int fir_step_level
Definition: ath9k_ani.c:84
static int ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param)
Definition: hw-ops.h:247
Definition: ath9k_ani.c:83
uint8_t ah
Definition: registers.h:85
Definition: ath9k_ani.c:25
u8 ofdmNoiseImmunityLevel
Definition: ani.h:123
static const struct ani_ofdm_level_entry ofdm_level_table[]
Definition: ath9k_ani.c:42
#define DBG2(...)
Definition: compiler.h:515

References ah, ATH9K_ANI_FIRSTEP_LEVEL, ATH9K_ANI_SPUR_IMMUNITY_LEVEL, ath9k_hw_ani_control(), BEACON_RSSI, cck_level_table, ar5416AniState::cckNoiseImmunityLevel, DBG2, ani_ofdm_level_entry::fir_step_level, ani_cck_level_entry::fir_step_level, ar5416AniState::firstepLevel, ar5416AniState::noiseFloor, ofdm_level_table, ar5416AniState::ofdmNoiseImmunityLevel, ar5416AniState::rssiThrHigh, ar5416AniState::rssiThrLow, ani_ofdm_level_entry::spur_immunity_level, and ar5416AniState::spurImmunityLevel.

Referenced by ath9k_ani_reset(), ath9k_hw_ani_lower_immunity(), and ath9k_hw_ani_ofdm_err_trigger().

◆ ath9k_hw_ani_ofdm_err_trigger()

static void ath9k_hw_ani_ofdm_err_trigger ( struct ath_hw ah)
static

Definition at line 277 of file ath9k_ani.c.

278 {
279  struct ar5416AniState *aniState;
280 
281  if (!DO_ANI(ah))
282  return;
283 
284  if (!use_new_ani(ah)) {
286  return;
287  }
288 
289  aniState = &ah->curchan->ani;
290 
293 }
#define DO_ANI(ah)
Definition: ani.h:28
static int use_new_ani(struct ath_hw *ah)
Definition: ath9k_ani.c:110
uint8_t ah
Definition: registers.h:85
static void ath9k_hw_ani_ofdm_err_trigger_old(struct ath_hw *ah)
Definition: ath9k_ani.c:159
static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)
Definition: ath9k_ani.c:246
u8 ofdmNoiseImmunityLevel
Definition: ani.h:123
#define ATH9K_ANI_OFDM_MAX_LEVEL
Definition: ath9k_ani.c:57

References ah, ATH9K_ANI_OFDM_MAX_LEVEL, ath9k_hw_ani_ofdm_err_trigger_old(), ath9k_hw_set_ofdm_nil(), DO_ANI, ar5416AniState::ofdmNoiseImmunityLevel, and use_new_ani().

Referenced by ath9k_hw_ani_monitor().

◆ ath9k_hw_set_cck_nil()

static void ath9k_hw_set_cck_nil ( struct ath_hw ah,
uint8_t  immunityLevel 
)
static

Definition at line 298 of file ath9k_ani.c.

299 {
300  struct ar5416AniState *aniState = &ah->curchan->ani;
301  const struct ani_ofdm_level_entry *entry_ofdm;
302  const struct ani_cck_level_entry *entry_cck;
303 
304  aniState->noiseFloor = BEACON_RSSI(ah);
305  DBG2("ath9k: "
306  "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
307  aniState->cckNoiseImmunityLevel, immunityLevel,
308  aniState->noiseFloor, aniState->rssiThrLow,
309  aniState->rssiThrHigh);
310 
311  if (aniState->noiseFloor <= (unsigned int)aniState->rssiThrLow &&
312  immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI)
313  immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI;
314 
315  aniState->cckNoiseImmunityLevel = immunityLevel;
316 
317  entry_ofdm = &ofdm_level_table[aniState->ofdmNoiseImmunityLevel];
318  entry_cck = &cck_level_table[aniState->cckNoiseImmunityLevel];
319 
320  if (aniState->firstepLevel != entry_cck->fir_step_level &&
321  entry_cck->fir_step_level >= entry_ofdm->fir_step_level)
324  entry_cck->fir_step_level);
325 
326  /* Skip MRC CCK for pre AR9003 families */
328  return;
329 
330  if (aniState->mrcCCKOff == entry_cck->mrc_cck_on)
333  entry_cck->mrc_cck_on);
334 }
int fir_step_level
Definition: ath9k_ani.c:27
u32 noiseFloor
Definition: ani.h:134
u8 mrcCCKOff
Definition: ani.h:126
int32_t rssiThrHigh
Definition: ani.h:133
#define BEACON_RSSI(ahp)
Definition: ani.h:30
int32_t rssiThrLow
Definition: ani.h:132
#define AR_SREV_9485(_ah)
Definition: reg.h:868
#define ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI
Definition: ath9k_ani.c:105
static const struct ani_cck_level_entry cck_level_table[]
Definition: ath9k_ani.c:88
u8 cckNoiseImmunityLevel
Definition: ani.h:124
#define AR_SREV_9300_20_OR_LATER(_ah)
Definition: reg.h:865
u8 firstepLevel
Definition: ani.h:128
int mrc_cck_on
Definition: ath9k_ani.c:85
int fir_step_level
Definition: ath9k_ani.c:84
static int ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param)
Definition: hw-ops.h:247
Definition: ath9k_ani.c:83
uint8_t ah
Definition: registers.h:85
Definition: ath9k_ani.c:25
u8 ofdmNoiseImmunityLevel
Definition: ani.h:123
static const struct ani_ofdm_level_entry ofdm_level_table[]
Definition: ath9k_ani.c:42
#define DBG2(...)
Definition: compiler.h:515

References ah, AR_SREV_9300_20_OR_LATER, AR_SREV_9485, ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI, ATH9K_ANI_FIRSTEP_LEVEL, ATH9K_ANI_MRC_CCK, ath9k_hw_ani_control(), BEACON_RSSI, cck_level_table, ar5416AniState::cckNoiseImmunityLevel, DBG2, ani_ofdm_level_entry::fir_step_level, ani_cck_level_entry::fir_step_level, ar5416AniState::firstepLevel, ani_cck_level_entry::mrc_cck_on, ar5416AniState::mrcCCKOff, ar5416AniState::noiseFloor, ofdm_level_table, ar5416AniState::ofdmNoiseImmunityLevel, ar5416AniState::rssiThrHigh, and ar5416AniState::rssiThrLow.

Referenced by ath9k_ani_reset(), ath9k_hw_ani_cck_err_trigger(), and ath9k_hw_ani_lower_immunity().

◆ ath9k_hw_ani_cck_err_trigger()

static void ath9k_hw_ani_cck_err_trigger ( struct ath_hw ah)
static

Definition at line 336 of file ath9k_ani.c.

337 {
338  struct ar5416AniState *aniState;
339 
340  if (!DO_ANI(ah))
341  return;
342 
343  if (!use_new_ani(ah)) {
345  return;
346  }
347 
348  aniState = &ah->curchan->ani;
349 
352 }
static void ath9k_hw_set_cck_nil(struct ath_hw *ah, uint8_t immunityLevel)
Definition: ath9k_ani.c:298
static void ath9k_hw_ani_cck_err_trigger_old(struct ath_hw *ah)
Definition: ath9k_ani.c:219
u8 cckNoiseImmunityLevel
Definition: ani.h:124
#define DO_ANI(ah)
Definition: ani.h:28
static int use_new_ani(struct ath_hw *ah)
Definition: ath9k_ani.c:110
#define ATH9K_ANI_CCK_MAX_LEVEL
Definition: ath9k_ani.c:103
uint8_t ah
Definition: registers.h:85

References ah, ATH9K_ANI_CCK_MAX_LEVEL, ath9k_hw_ani_cck_err_trigger_old(), ath9k_hw_set_cck_nil(), ar5416AniState::cckNoiseImmunityLevel, DO_ANI, and use_new_ani().

Referenced by ath9k_hw_ani_monitor().

◆ ath9k_hw_ani_lower_immunity_old()

static void ath9k_hw_ani_lower_immunity_old ( struct ath_hw ah)
static

Definition at line 354 of file ath9k_ani.c.

355 {
356  struct ar5416AniState *aniState;
357  int32_t rssi;
358 
359  aniState = &ah->curchan->ani;
360 
361  rssi = BEACON_RSSI(ah);
362  if (rssi > aniState->rssiThrHigh) {
363  /* XXX: Handle me */
364  } else if (rssi > aniState->rssiThrLow) {
365  if (!aniState->ofdmWeakSigDetect) {
368  1) == 1)
369  return;
370  }
371  if (aniState->firstepLevel > 0) {
374  aniState->firstepLevel - 1) == 1)
375  return;
376  }
377  } else {
378  if (aniState->firstepLevel > 0) {
381  aniState->firstepLevel - 1) == 1)
382  return;
383  }
384  }
385 
386  if (aniState->spurImmunityLevel > 0) {
388  aniState->spurImmunityLevel - 1))
389  return;
390  }
391 
392  if (aniState->noiseImmunityLevel > 0) {
394  aniState->noiseImmunityLevel - 1);
395  return;
396  }
397 }
u8 spurImmunityLevel
Definition: ani.h:127
int32_t rssiThrHigh
Definition: ani.h:133
#define BEACON_RSSI(ahp)
Definition: ani.h:30
int32_t rssiThrLow
Definition: ani.h:132
u8 ofdmWeakSigDetect
Definition: ani.h:129
u8 firstepLevel
Definition: ani.h:128
signed int int32_t
Definition: stdint.h:17
static int ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param)
Definition: hw-ops.h:247
uint8_t ah
Definition: registers.h:85
u8 noiseImmunityLevel
Definition: ani.h:122

References ah, ATH9K_ANI_FIRSTEP_LEVEL, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION, ATH9K_ANI_SPUR_IMMUNITY_LEVEL, ath9k_hw_ani_control(), BEACON_RSSI, ar5416AniState::firstepLevel, ar5416AniState::noiseImmunityLevel, ar5416AniState::ofdmWeakSigDetect, ar5416AniState::rssiThrHigh, ar5416AniState::rssiThrLow, and ar5416AniState::spurImmunityLevel.

Referenced by ath9k_hw_ani_lower_immunity().

◆ ath9k_hw_ani_lower_immunity()

static void ath9k_hw_ani_lower_immunity ( struct ath_hw ah)
static

Definition at line 403 of file ath9k_ani.c.

404 {
405  struct ar5416AniState *aniState;
406 
407  aniState = &ah->curchan->ani;
408 
409  if (!use_new_ani(ah)) {
411  return;
412  }
413 
414  /* lower OFDM noise immunity */
415  if (aniState->ofdmNoiseImmunityLevel > 0 &&
416  (aniState->ofdmsTurn || aniState->cckNoiseImmunityLevel == 0)) {
418  return;
419  }
420 
421  /* lower CCK noise immunity */
422  if (aniState->cckNoiseImmunityLevel > 0)
424 }
static void ath9k_hw_set_cck_nil(struct ath_hw *ah, uint8_t immunityLevel)
Definition: ath9k_ani.c:298
static void ath9k_hw_ani_lower_immunity_old(struct ath_hw *ah)
Definition: ath9k_ani.c:354
u8 cckNoiseImmunityLevel
Definition: ani.h:124
static int use_new_ani(struct ath_hw *ah)
Definition: ath9k_ani.c:110
int ofdmsTurn
Definition: ani.h:125
uint8_t ah
Definition: registers.h:85
static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)
Definition: ath9k_ani.c:246
u8 ofdmNoiseImmunityLevel
Definition: ani.h:123

References ah, ath9k_hw_ani_lower_immunity_old(), ath9k_hw_set_cck_nil(), ath9k_hw_set_ofdm_nil(), ar5416AniState::cckNoiseImmunityLevel, ar5416AniState::ofdmNoiseImmunityLevel, ar5416AniState::ofdmsTurn, and use_new_ani().

Referenced by ath9k_hw_ani_monitor().

◆ ath9k_ani_reset_old()

static void ath9k_ani_reset_old ( struct ath_hw ah)
static

Definition at line 426 of file ath9k_ani.c.

427 {
428  struct ar5416AniState *aniState;
429 
430  if (!DO_ANI(ah))
431  return;
432 
433  aniState = &ah->curchan->ani;
434 
435  if (aniState->noiseImmunityLevel != 0)
437  aniState->noiseImmunityLevel);
438  if (aniState->spurImmunityLevel != 0)
440  aniState->spurImmunityLevel);
441  if (!aniState->ofdmWeakSigDetect)
443  aniState->ofdmWeakSigDetect);
444  if (aniState->cckWeakSigThreshold)
446  aniState->cckWeakSigThreshold);
447  if (aniState->firstepLevel != 0)
449  aniState->firstepLevel);
450 
454 
456 
459 
461 }
u8 spurImmunityLevel
Definition: ani.h:127
#define AR_PHY_ERR_MASK_2
Definition: reg.h:1671
#define REGWRITE_BUFFER_FLUSH(_ah)
Definition: hw.h:96
#define AR_PHY_ERR_CCK_TIMING
Definition: reg.h:1633
u8 ofdmWeakSigDetect
Definition: ani.h:129
u8 firstepLevel
Definition: ani.h:128
#define DO_ANI(ah)
Definition: ani.h:28
u8 cckWeakSigThreshold
Definition: ani.h:130
static void ath9k_ani_restart(struct ath_hw *ah)
Definition: ath9k_ani.c:125
void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits)
Definition: ath9k_hw.c:1895
static int ath9k_hw_ani_control(struct ath_hw *ah, enum ath9k_ani_cmd cmd, int param)
Definition: hw-ops.h:247
#define REG_WRITE(_ah, _reg, _val)
Definition: hw.h:78
#define AR_PHY_ERR_MASK_1
Definition: reg.h:1667
uint8_t ah
Definition: registers.h:85
#define AR_PHY_ERR_OFDM_TIMING
Definition: reg.h:1632
u32 ath9k_hw_getrxfilter(struct ath_hw *ah)
Definition: ath9k_hw.c:1882
u8 noiseImmunityLevel
Definition: ani.h:122
#define ENABLE_REGWRITE_BUFFER(_ah)
Definition: hw.h:90

References ah, AR_PHY_ERR_CCK_TIMING, AR_PHY_ERR_MASK_1, AR_PHY_ERR_MASK_2, AR_PHY_ERR_OFDM_TIMING, ATH9K_ANI_CCK_WEAK_SIGNAL_THR, ATH9K_ANI_FIRSTEP_LEVEL, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION, ath9k_ani_restart(), ATH9K_ANI_SPUR_IMMUNITY_LEVEL, ath9k_hw_ani_control(), ath9k_hw_getrxfilter(), ath9k_hw_setrxfilter(), ATH9K_RX_FILTER_PHYERR, ar5416AniState::cckWeakSigThreshold, DO_ANI, ENABLE_REGWRITE_BUFFER, ar5416AniState::firstepLevel, ar5416AniState::noiseImmunityLevel, ar5416AniState::ofdmWeakSigDetect, REG_WRITE, REGWRITE_BUFFER_FLUSH, and ar5416AniState::spurImmunityLevel.

Referenced by ath9k_ani_reset().

◆ ath9k_ani_reset()

void ath9k_ani_reset ( struct ath_hw ah,
int  is_scanning 
)

Definition at line 468 of file ath9k_ani.c.

469 {
470  struct ar5416AniState *aniState = &ah->curchan->ani;
471  struct ath9k_channel *chan = ah->curchan;
472 
473  if (!DO_ANI(ah))
474  return;
475 
476  if (!use_new_ani(ah))
477  return ath9k_ani_reset_old(ah);
478 
479  ah->stats.ast_ani_reset++;
480 
481  /* always allow mode (on/off) to be controlled */
482  ah->ani_function |= ATH9K_ANI_MODE;
483 
484  if (is_scanning) {
485  /*
486  * If we're scanning or in AP mode, the defaults (ini)
487  * should be in place. For an AP we assume the historical
488  * levels for this channel are probably outdated so start
489  * from defaults instead.
490  */
491  if (aniState->ofdmNoiseImmunityLevel !=
493  aniState->cckNoiseImmunityLevel !=
495  DBG("ath9k: "
496  "Restore defaults: chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
497  chan->channel,
498  chan->channelFlags,
499  is_scanning,
500  aniState->ofdmNoiseImmunityLevel,
501  aniState->cckNoiseImmunityLevel);
502 
505  }
506  } else {
507  /*
508  * restore historical levels for this channel
509  */
510  DBG2("ath9k: "
511  "Restore history: chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
512  chan->channel,
513  chan->channelFlags,
514  is_scanning,
515  aniState->ofdmNoiseImmunityLevel,
516  aniState->cckNoiseImmunityLevel);
517 
519  aniState->ofdmNoiseImmunityLevel);
521  aniState->cckNoiseImmunityLevel);
522  }
523 
524  /*
525  * enable phy counters if hw supports or if not, enable phy
526  * interrupts (so we can count each one)
527  */
529 
531 
534 
536 }
static void ath9k_hw_set_cck_nil(struct ath_hw *ah, uint8_t immunityLevel)
Definition: ath9k_ani.c:298
#define AR_PHY_ERR_MASK_2
Definition: reg.h:1671
#define REGWRITE_BUFFER_FLUSH(_ah)
Definition: hw.h:96
#define ATH9K_ANI_OFDM_DEF_LEVEL
Definition: ath9k_ani.c:59
#define AR_PHY_ERR_CCK_TIMING
Definition: reg.h:1633
u8 cckNoiseImmunityLevel
Definition: ani.h:124
#define ATH9K_ANI_CCK_DEF_LEVEL
Definition: ath9k_ani.c:107
struct net80211_channel * chan
Definition: hw.h:348
#define DO_ANI(ah)
Definition: ani.h:28
static void ath9k_ani_restart(struct ath_hw *ah)
Definition: ath9k_ani.c:125
static int use_new_ani(struct ath_hw *ah)
Definition: ath9k_ani.c:110
#define REG_WRITE(_ah, _reg, _val)
Definition: hw.h:78
#define AR_PHY_ERR_MASK_1
Definition: reg.h:1667
uint8_t ah
Definition: registers.h:85
static void ath9k_ani_reset_old(struct ath_hw *ah)
Definition: ath9k_ani.c:426
#define AR_PHY_ERR_OFDM_TIMING
Definition: reg.h:1632
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)
Definition: ath9k_ani.c:246
u8 ofdmNoiseImmunityLevel
Definition: ani.h:123
#define ENABLE_REGWRITE_BUFFER(_ah)
Definition: hw.h:90
#define DBG2(...)
Definition: compiler.h:515

References ah, AR_PHY_ERR_CCK_TIMING, AR_PHY_ERR_MASK_1, AR_PHY_ERR_MASK_2, AR_PHY_ERR_OFDM_TIMING, ATH9K_ANI_CCK_DEF_LEVEL, ATH9K_ANI_MODE, ATH9K_ANI_OFDM_DEF_LEVEL, ath9k_ani_reset_old(), ath9k_ani_restart(), ath9k_hw_set_cck_nil(), ath9k_hw_set_ofdm_nil(), ar5416AniState::cckNoiseImmunityLevel, ath9k_channel::chan, DBG, DBG2, DO_ANI, ENABLE_REGWRITE_BUFFER, ar5416AniState::ofdmNoiseImmunityLevel, REG_WRITE, REGWRITE_BUFFER_FLUSH, and use_new_ani().

Referenced by ath9k_hw_startpcureceive().

◆ ath9k_hw_ani_read_counters()

static int ath9k_hw_ani_read_counters ( struct ath_hw ah)
static

Definition at line 538 of file ath9k_ani.c.

539 {
540  struct ath_common *common = ath9k_hw_common(ah);
541  struct ar5416AniState *aniState = &ah->curchan->ani;
542  u32 ofdm_base = 0;
543  u32 cck_base = 0;
544  u32 ofdmPhyErrCnt, cckPhyErrCnt;
545  u32 phyCnt1, phyCnt2;
547 
550 
551  if (listenTime <= 0) {
552  ah->stats.ast_ani_lneg++;
554  return 0;
555  }
556 
557  if (!use_new_ani(ah)) {
558  ofdm_base = AR_PHY_COUNTMAX - ah->config.ofdm_trig_high;
559  cck_base = AR_PHY_COUNTMAX - ah->config.cck_trig_high;
560  }
561 
562  aniState->listenTime += listenTime;
563 
564  phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);
565  phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);
566 
567  if (!use_new_ani(ah) && (phyCnt1 < ofdm_base || phyCnt2 < cck_base)) {
568  if (phyCnt1 < ofdm_base) {
569  DBG2("ath9k: "
570  "phyCnt1 0x%x, resetting counter value to 0x%x\n",
571  phyCnt1, ofdm_base);
572  REG_WRITE(ah, AR_PHY_ERR_1, ofdm_base);
575  }
576  if (phyCnt2 < cck_base) {
577  DBG2("ath9k: "
578  "phyCnt2 0x%x, resetting counter value to 0x%x\n",
579  phyCnt2, cck_base);
580  REG_WRITE(ah, AR_PHY_ERR_2, cck_base);
583  }
584  return 0;
585  }
586 
587  ofdmPhyErrCnt = phyCnt1 - ofdm_base;
588  ah->stats.ast_ani_ofdmerrs +=
589  ofdmPhyErrCnt - aniState->ofdmPhyErrCount;
590  aniState->ofdmPhyErrCount = ofdmPhyErrCnt;
591 
592  cckPhyErrCnt = phyCnt2 - cck_base;
593  ah->stats.ast_ani_cckerrs +=
594  cckPhyErrCnt - aniState->cckPhyErrCount;
595  aniState->cckPhyErrCount = cckPhyErrCnt;
596  return 1;
597 }
u32 listenTime
Definition: ani.h:131
#define AR_PHY_ERR_MASK_2
Definition: reg.h:1671
#define AR_PHY_ERR_CCK_TIMING
Definition: reg.h:1633
void ath_hw_cycle_counters_update(struct ath_common *common)
ath_hw_cycle_counters_update - common function to update cycle counters
Definition: ath_hw.c:139
#define AR_PHY_ERR_2
Definition: reg.h:1669
static struct ath_common * ath9k_hw_common(struct ath_hw *ah)
Definition: hw.h:870
#define AR_PHY_ERR_1
Definition: reg.h:1665
struct ib_cm_common common
Definition: ib_mad.h:12
#define REG_READ(_ah, _reg)
Definition: hw.h:81
static void ath9k_ani_restart(struct ath_hw *ah)
Definition: ath9k_ani.c:125
#define AR_PHY_COUNTMAX
Definition: reg.h:1673
int32_t ath_hw_get_listen_time(struct ath_common *common)
Definition: ath_hw.c:174
signed int int32_t
Definition: stdint.h:17
static int use_new_ani(struct ath_hw *ah)
Definition: ath9k_ani.c:110
#define REG_WRITE(_ah, _reg, _val)
Definition: hw.h:78
#define AR_PHY_ERR_MASK_1
Definition: reg.h:1667
u32 ofdmPhyErrCount
Definition: ani.h:135
uint8_t ah
Definition: registers.h:85
#define AR_PHY_ERR_OFDM_TIMING
Definition: reg.h:1632
u32 cckPhyErrCount
Definition: ani.h:136
uint32_t u32
Definition: stdint.h:24
#define DBG2(...)
Definition: compiler.h:515

References ah, AR_PHY_COUNTMAX, AR_PHY_ERR_1, AR_PHY_ERR_2, AR_PHY_ERR_CCK_TIMING, AR_PHY_ERR_MASK_1, AR_PHY_ERR_MASK_2, AR_PHY_ERR_OFDM_TIMING, ath9k_ani_restart(), ath9k_hw_common(), ath_hw_cycle_counters_update(), ath_hw_get_listen_time(), ar5416AniState::cckPhyErrCount, common, DBG2, ar5416AniState::listenTime, ar5416AniState::ofdmPhyErrCount, REG_READ, REG_WRITE, and use_new_ani().

Referenced by ath9k_hw_ani_monitor().

◆ ath9k_hw_ani_monitor()

void ath9k_hw_ani_monitor ( struct ath_hw ah,
struct ath9k_channel *chan  __unused 
)

Definition at line 599 of file ath9k_ani.c.

600 {
601  struct ar5416AniState *aniState;
602  u32 ofdmPhyErrRate, cckPhyErrRate;
603 
604  if (!DO_ANI(ah))
605  return;
606 
607  aniState = &ah->curchan->ani;
608  if (!aniState)
609  return;
610 
612  return;
613 
614  ofdmPhyErrRate = aniState->ofdmPhyErrCount * 1000 /
615  aniState->listenTime;
616  cckPhyErrRate = aniState->cckPhyErrCount * 1000 /
617  aniState->listenTime;
618 
619  DBG2("ath9k: "
620  "listenTime=%d OFDM:%d errs=%d/s CCK:%d errs=%d/s ofdm_turn=%d\n",
621  aniState->listenTime,
622  aniState->ofdmNoiseImmunityLevel,
623  ofdmPhyErrRate, aniState->cckNoiseImmunityLevel,
624  cckPhyErrRate, aniState->ofdmsTurn);
625 
626  if (aniState->listenTime > 5 * ah->aniperiod) {
627  if (ofdmPhyErrRate <= ah->config.ofdm_trig_low &&
628  cckPhyErrRate <= ah->config.cck_trig_low) {
630  aniState->ofdmsTurn = !aniState->ofdmsTurn;
631  }
633  } else if (aniState->listenTime > ah->aniperiod) {
634  /* check to see if need to raise immunity */
635  if (ofdmPhyErrRate > ah->config.ofdm_trig_high &&
636  (cckPhyErrRate <= ah->config.cck_trig_high ||
637  aniState->ofdmsTurn)) {
640  aniState->ofdmsTurn = 0;
641  } else if (cckPhyErrRate > ah->config.cck_trig_high) {
644  aniState->ofdmsTurn = 1;
645  }
646  }
647 }
u32 listenTime
Definition: ani.h:131
static int ath9k_hw_ani_read_counters(struct ath_hw *ah)
Definition: ath9k_ani.c:538
static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah)
Definition: ath9k_ani.c:277
u8 cckNoiseImmunityLevel
Definition: ani.h:124
static void ath9k_hw_ani_lower_immunity(struct ath_hw *ah)
Definition: ath9k_ani.c:403
static void ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah)
Definition: ath9k_ani.c:336
#define DO_ANI(ah)
Definition: ani.h:28
static void ath9k_ani_restart(struct ath_hw *ah)
Definition: ath9k_ani.c:125
int ofdmsTurn
Definition: ani.h:125
u32 ofdmPhyErrCount
Definition: ani.h:135
uint8_t ah
Definition: registers.h:85
u32 cckPhyErrCount
Definition: ani.h:136
u8 ofdmNoiseImmunityLevel
Definition: ani.h:123
uint32_t u32
Definition: stdint.h:24
#define DBG2(...)
Definition: compiler.h:515

References ah, ath9k_ani_restart(), ath9k_hw_ani_cck_err_trigger(), ath9k_hw_ani_lower_immunity(), ath9k_hw_ani_ofdm_err_trigger(), ath9k_hw_ani_read_counters(), ar5416AniState::cckNoiseImmunityLevel, ar5416AniState::cckPhyErrCount, DBG2, DO_ANI, ar5416AniState::listenTime, ar5416AniState::ofdmNoiseImmunityLevel, ar5416AniState::ofdmPhyErrCount, and ar5416AniState::ofdmsTurn.

Referenced by ath_ani_calibrate().

◆ ath9k_hw_ani_setup()

void ath9k_hw_ani_setup ( struct ath_hw ah)

Definition at line 649 of file ath9k_ani.c.

650 {
651  int i;
652 
653  static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
654  static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
655  static const int coarseLow[] = { -64, -64, -64, -64, -70 };
656  static const int firpwr[] = { -78, -78, -78, -78, -80 };
657 
658  for (i = 0; i < 5; i++) {
659  ah->totalSizeDesired[i] = totalSizeDesired[i];
660  ah->coarse_high[i] = coarseHigh[i];
661  ah->coarse_low[i] = coarseLow[i];
662  ah->firpwr[i] = firpwr[i];
663  }
664 }
uint8_t ah
Definition: registers.h:85

References ah.

Referenced by ath9k_hw_post_init().

◆ ath9k_hw_ani_init()

void ath9k_hw_ani_init ( struct ath_hw ah)

Definition at line 666 of file ath9k_ani.c.

667 {
668  unsigned int i;
669 
670  DBG2("ath9k: Initialize ANI\n");
671 
672  if (use_new_ani(ah)) {
673  ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH_NEW;
674  ah->config.ofdm_trig_low = ATH9K_ANI_OFDM_TRIG_LOW_NEW;
675 
676  ah->config.cck_trig_high = ATH9K_ANI_CCK_TRIG_HIGH_NEW;
677  ah->config.cck_trig_low = ATH9K_ANI_CCK_TRIG_LOW_NEW;
678  } else {
679  ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH_OLD;
680  ah->config.ofdm_trig_low = ATH9K_ANI_OFDM_TRIG_LOW_OLD;
681 
682  ah->config.cck_trig_high = ATH9K_ANI_CCK_TRIG_HIGH_OLD;
683  ah->config.cck_trig_low = ATH9K_ANI_CCK_TRIG_LOW_OLD;
684  }
685 
686  for (i = 0; i < ARRAY_SIZE(ah->channels); i++) {
687  struct ath9k_channel *chan = &ah->channels[i];
688  struct ar5416AniState *ani = &chan->ani;
689 
690  if (use_new_ani(ah)) {
691  ani->spurImmunityLevel =
693 
695 
697  ani->mrcCCKOff =
699  else
700  ani->mrcCCKOff = 1;
701 
702  ani->ofdmsTurn = 1;
703  } else {
704  ani->spurImmunityLevel =
707 
708  ani->cckWeakSigThreshold =
710  }
711 
714  ani->ofdmWeakSigDetect =
717  }
718 
719  /*
720  * since we expect some ongoing maintenance on the tables, let's sanity
721  * check here default level should not modify INI setting.
722  */
723  if (use_new_ani(ah)) {
724  ah->aniperiod = ATH9K_ANI_PERIOD_NEW;
725  ah->config.ani_poll_interval = ATH9K_ANI_POLLINTERVAL_NEW;
726  } else {
727  ah->aniperiod = ATH9K_ANI_PERIOD_OLD;
728  ah->config.ani_poll_interval = ATH9K_ANI_POLLINTERVAL_OLD;
729  }
730 
731  if (ah->config.enable_ani)
732  ah->proc_phyerr |= HAL_PROCESS_ANI;
733 
735 }
u8 spurImmunityLevel
Definition: ani.h:127
u8 mrcCCKOff
Definition: ani.h:126
int32_t rssiThrHigh
Definition: ani.h:133
#define ATH9K_ANI_CCK_TRIG_HIGH_NEW
Definition: ani.h:42
#define ATH9K_ANI_CCK_TRIG_HIGH_OLD
Definition: ani.h:41
int32_t rssiThrLow
Definition: ani.h:132
#define ATH9K_ANI_OFDM_TRIG_LOW_OLD
Definition: ani.h:37
u8 cckNoiseImmunityLevel
Definition: ani.h:124
#define ATH9K_ANI_CCK_DEF_LEVEL
Definition: ath9k_ani.c:107
struct net80211_channel * chan
Definition: hw.h:348
#define AR_SREV_9300_20_OR_LATER(_ah)
Definition: reg.h:865
#define ATH9K_ANI_RSSI_THR_HIGH
Definition: ani.h:58
#define ATH9K_ANI_CCK_TRIG_LOW_NEW
Definition: ani.h:46
#define ATH9K_ANI_POLLINTERVAL_NEW
Definition: ani.h:66
#define ATH9K_ANI_OFDM_TRIG_LOW_NEW
Definition: ani.h:38
u8 ofdmWeakSigDetect
Definition: ani.h:129
#define HAL_PROCESS_ANI
Definition: ani.h:26
u8 firstepLevel
Definition: ani.h:128
#define ATH9K_ANI_FIRSTEP_LVL_NEW
Definition: ani.h:56
#define ATH9K_ANI_FIRSTEP_LVL_OLD
Definition: ani.h:55
#define ARRAY_SIZE(x)
Definition: efx_common.h:43
#define ATH9K_ANI_CCK_TRIG_LOW_OLD
Definition: ani.h:45
#define ATH9K_ANI_SPUR_IMMUNE_LVL_NEW
Definition: ani.h:53
#define ATH9K_ANI_OFDM_TRIG_HIGH_NEW
Definition: ani.h:34
u8 cckWeakSigThreshold
Definition: ani.h:130
static void ath9k_ani_restart(struct ath_hw *ah)
Definition: ath9k_ani.c:125
static int use_new_ani(struct ath_hw *ah)
Definition: ath9k_ani.c:110
#define ATH9K_ANI_OFDM_TRIG_HIGH_OLD
Definition: ani.h:33
struct ar5416AniState ani
Definition: hw.h:349
int ofdmsTurn
Definition: ani.h:125
#define ATH9K_ANI_PERIOD_OLD
Definition: ani.h:61
#define ATH9K_ANI_USE_OFDM_WEAK_SIG
Definition: ani.h:49
uint8_t ah
Definition: registers.h:85
#define ATH9K_ANI_ENABLE_MRC_CCK
Definition: ani.h:77
#define ATH9K_ANI_PERIOD_NEW
Definition: ani.h:62
#define ATH9K_ANI_POLLINTERVAL_OLD
Definition: ani.h:65
#define ATH9K_ANI_CCK_WEAK_SIG_THR
Definition: ani.h:50
#define ATH9K_ANI_SPUR_IMMUNE_LVL_OLD
Definition: ani.h:52
#define ATH9K_ANI_RSSI_THR_LOW
Definition: ani.h:59
#define DBG2(...)
Definition: compiler.h:515

References ah, ath9k_channel::ani, AR_SREV_9300_20_OR_LATER, ARRAY_SIZE, ATH9K_ANI_CCK_DEF_LEVEL, ATH9K_ANI_CCK_TRIG_HIGH_NEW, ATH9K_ANI_CCK_TRIG_HIGH_OLD, ATH9K_ANI_CCK_TRIG_LOW_NEW, ATH9K_ANI_CCK_TRIG_LOW_OLD, ATH9K_ANI_CCK_WEAK_SIG_THR, ATH9K_ANI_ENABLE_MRC_CCK, ATH9K_ANI_FIRSTEP_LVL_NEW, ATH9K_ANI_FIRSTEP_LVL_OLD, ATH9K_ANI_OFDM_TRIG_HIGH_NEW, ATH9K_ANI_OFDM_TRIG_HIGH_OLD, ATH9K_ANI_OFDM_TRIG_LOW_NEW, ATH9K_ANI_OFDM_TRIG_LOW_OLD, ATH9K_ANI_PERIOD_NEW, ATH9K_ANI_PERIOD_OLD, ATH9K_ANI_POLLINTERVAL_NEW, ATH9K_ANI_POLLINTERVAL_OLD, ath9k_ani_restart(), ATH9K_ANI_RSSI_THR_HIGH, ATH9K_ANI_RSSI_THR_LOW, ATH9K_ANI_SPUR_IMMUNE_LVL_NEW, ATH9K_ANI_SPUR_IMMUNE_LVL_OLD, ATH9K_ANI_USE_OFDM_WEAK_SIG, ar5416AniState::cckNoiseImmunityLevel, ar5416AniState::cckWeakSigThreshold, ath9k_channel::chan, DBG2, ar5416AniState::firstepLevel, HAL_PROCESS_ANI, ar5416AniState::mrcCCKOff, ar5416AniState::ofdmsTurn, ar5416AniState::ofdmWeakSigDetect, ar5416AniState::rssiThrHigh, ar5416AniState::rssiThrLow, ar5416AniState::spurImmunityLevel, and use_new_ani().

Referenced by ath9k_hw_post_init().

Variable Documentation

◆ ofdm_level_table

const struct ani_ofdm_level_entry ofdm_level_table[]
static
Initial value:
= {
{ 0, 0, 1 },
{ 1, 1, 1 },
{ 2, 2, 1 },
{ 3, 2, 1 },
{ 4, 3, 1 },
{ 5, 4, 1 },
{ 6, 5, 1 },
{ 7, 6, 1 },
{ 7, 7, 1 },
{ 7, 8, 0 }
}

Definition at line 42 of file ath9k_ani.c.

Referenced by ath9k_hw_set_cck_nil(), and ath9k_hw_set_ofdm_nil().

◆ cck_level_table

const struct ani_cck_level_entry cck_level_table[]
static
Initial value:
= {
{ 0, 1 },
{ 1, 1 },
{ 2, 1 },
{ 3, 1 },
{ 4, 0 },
{ 5, 0 },
{ 6, 0 },
{ 7, 0 },
{ 8, 0 }
}

Definition at line 88 of file ath9k_ani.c.

Referenced by ath9k_hw_set_cck_nil(), and ath9k_hw_set_ofdm_nil().