iPXE
myri10ge.c
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1 /************************************************* -*- linux-c -*-
2  * Myricom 10Gb Network Interface Card Software
3  * Copyright 2009, Myricom, Inc.
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17  * 02110-1301, USA.
18  ****************************************************************/
19 
20 FILE_LICENCE ( GPL2_ONLY );
21 
22 /*
23  * Author: Glenn Brown <glenn@myri.com>
24  */
25 
26 /*
27  * General Theory of Operation
28  *
29  * This is a minimal Myricom 10 gigabit Ethernet driver for network
30  * boot.
31  *
32  * Initialization
33  *
34  * myri10ge_pci_probe() is called by iPXE during initialization.
35  * Minimal NIC initialization is performed to minimize resources
36  * consumed when the driver is resident but unused.
37  *
38  * Network Boot
39  *
40  * myri10ge_net_open() is called by iPXE before attempting to network
41  * boot from the card. Packet buffers are allocated and the NIC
42  * interface is initialized.
43  *
44  * Transmit
45  *
46  * myri10ge_net_transmit() enqueues frames for transmission by writing
47  * discriptors to the NIC's tx ring. For simplicity and to avoid
48  * copies, we always have the NIC DMA up the packet. The sent I/O
49  * buffer is released once the NIC signals myri10ge_interrupt_handler()
50  * that the send has completed.
51  *
52  * Receive
53  *
54  * Receives are posted to the NIC's receive ring. The NIC fills a
55  * DMAable receive_completion ring with completion notifications.
56  * myri10ge_net_poll() polls for these receive notifications, posts
57  * replacement receive buffers to the NIC, and passes received frames
58  * to netdev_rx().
59  *
60  * NonVolatile Storage
61  *
62  * This driver supports NonVolatile Storage (nvs) in the NIC EEPROM.
63  * If the last EEPROM block is not otherwise filled, we tell
64  * iPXE it may store NonVolatile Options (nvo) there.
65  */
66 
67 /*
68  * Debugging levels:
69  * - DBG() is for any errors, i.e. failed alloc_iob(), malloc_phys(),
70  * TX overflow, corrupted packets, ...
71  * - DBG2() is for successful events, like packet received,
72  * packet transmitted, and other general notifications.
73  * - DBGP() prints the name of each called function on entry
74  */
75 
76 #include <stdint.h>
77 
78 #include <byteswap.h>
79 #include <errno.h>
80 #include <ipxe/ethernet.h>
81 #include <ipxe/if_ether.h>
82 #include <ipxe/iobuf.h>
83 #include <ipxe/malloc.h>
84 #include <ipxe/netdevice.h>
85 #include <ipxe/nvo.h>
86 #include <ipxe/nvs.h>
87 #include <ipxe/pci.h>
88 #include <ipxe/timer.h>
89 
90 #include "myri10ge_mcp.h"
91 
92 /****************************************************************
93  * Forward declarations
94  ****************************************************************/
95 
96 /* PCI driver entry points */
97 
98 static int myri10ge_pci_probe ( struct pci_device* );
99 static void myri10ge_pci_remove ( struct pci_device* );
100 
101 /* Network device operations */
102 
103 static void myri10ge_net_close ( struct net_device* );
104 static void myri10ge_net_irq ( struct net_device*, int enable );
105 static int myri10ge_net_open ( struct net_device* );
106 static void myri10ge_net_poll ( struct net_device* );
107 static int myri10ge_net_transmit ( struct net_device*, struct io_buffer* );
108 
109 /****************************************************************
110  * Constants
111  ****************************************************************/
112 
113 /* Maximum ring indices, used to wrap ring indices. These must be 2**N-1. */
114 
115 #define MYRI10GE_TRANSMIT_WRAP 1U
116 #define MYRI10GE_RECEIVE_WRAP 7U
117 #define MYRI10GE_RECEIVE_COMPLETION_WRAP 31U
118 
119 /****************************************************************
120  * Driver internal data types.
121  ****************************************************************/
122 
123 /* Structure holding all DMA buffers for a NIC, which we will
124  allocated as contiguous read/write DMAable memory when the NIC is
125  initialized. */
126 
128 {
129  /* The NIC DMAs receive completion notifications into this ring */
130 
132 
133  /* Interrupt details are DMAd here before interrupting. */
134 
136 
137  /* NIC command completion status is DMAd here. */
138 
140 };
141 
143 {
144  /* Interrupt support */
145 
146  uint32 *irq_claim; /* in NIC SRAM */
147  uint32 *irq_deassert; /* in NIC SRAM */
148 
149  /* DMA buffers. */
150 
152 
153  /*
154  * Transmit state.
155  *
156  * The counts here are uint32 for easy comparison with
157  * priv->dma->irq_data.send_done_count and with each other.
158  */
159 
165 
166  /*
167  * Receive state.
168  */
169 
172  unsigned int receives_posted;
173  unsigned int receives_done;
175 
176  /* Address for writing commands to the firmware.
177  BEWARE: the value must be written 32 bits at a time. */
178 
180 
181  /*
182  * Nonvolatile Storage for configuration options.
183  */
184 
185  struct nvs_device nvs;
186  struct nvo_block nvo;
187  unsigned int nvo_registered;
188 
189  /* Cached PCI capability locations. */
190 
192 };
193 
194 /****************************************************************
195  * Driver internal functions.
196  ****************************************************************/
197 
198 /* Print ring status when debugging. Use this only after a printed
199  value changes. */
200 
201 #define DBG2_RINGS( priv ) \
202  DBG2 ( "tx %x/%x rx %x/%x in %s() \n", \
203  ( priv ) ->transmits_done, ( priv ) -> transmits_posted, \
204  ( priv ) ->receives_done, ( priv ) -> receives_posted, \
205  __FUNCTION__ )
206 
207 /*
208  * Return a pointer to the driver private data for a network device.
209  *
210  * @v netdev Network device created by this driver.
211  * @ret priv The corresponding driver private data.
212  */
213 static inline struct myri10ge_private *myri10ge_priv ( struct net_device *nd )
214 {
215  /* Our private data always follows the network device in memory,
216  since we use alloc_netdev() to allocate the storage. */
217 
218  return ( struct myri10ge_private * ) ( nd + 1 );
219 }
220 
221 /*
222  * Convert a Myri10ge driver private data pointer to a netdev pointer.
223  *
224  * @v p Myri10ge device private data.
225  * @ret r The corresponding network device.
226  */
227 static inline struct net_device *myri10ge_netdev ( struct myri10ge_private *p )
228 {
229  return ( ( struct net_device * ) p ) - 1;
230 }
231 
232 /*
233  * Convert a network device pointer to a PCI device pointer.
234  *
235  * @v netdev A Network Device.
236  * @ret r The corresponding PCI device.
237  */
238 static inline struct pci_device *myri10ge_pcidev ( struct net_device *netdev )
239 {
240  return container_of (netdev->dev, struct pci_device, dev);
241 }
242 
243 /*
244  * Pass a receive buffer to the NIC to be filled.
245  *
246  * @v priv The network device to receive the buffer.
247  * @v iob The I/O buffer to fill.
248  *
249  * Receive buffers are filled in FIFO order.
250  */
252  struct io_buffer *iob )
253 {
254  unsigned int receives_posted;
256 
257  /* Record the posted I/O buffer, to be passed to netdev_rx() on
258  receive. */
259 
260  receives_posted = priv->receives_posted;
261  priv->receive_iob[receives_posted & MYRI10GE_RECEIVE_WRAP] = iob;
262 
263  /* Post the receive. */
264 
265  request = &priv->receive_post_ring[receives_posted
266  & priv->receive_post_ring_wrap];
267  request->addr_high = 0;
268  wmb();
269  request->addr_low = htonl ( virt_to_bus ( iob->data ) );
270  priv->receives_posted = ++receives_posted;
271 }
272 
273 /*
274  * Execute a command on the NIC.
275  *
276  * @v priv NIC to perform the command.
277  * @v cmd The command to perform.
278  * @v data I/O copy buffer for parameters/results
279  * @ret rc 0 on success, else an error code.
280  */
282  uint32 cmd,
283  uint32 data[3] )
284 {
285  int i;
287  uint32 result;
288  unsigned int slept_ms;
289  volatile mcp_cmd_response_t *response;
290 
291  DBGP ( "myri10ge_command ( ,%d, ) \n", cmd );
292  command = priv->command;
293  response = &priv->dma->command_response;
294 
295  /* Mark the command as incomplete. */
296 
297  response->result = 0xFFFFFFFF;
298 
299  /* Pass the command to the NIC. */
300 
301  command->cmd = htonl ( cmd );
302  command->data0 = htonl ( data[0] );
303  command->data1 = htonl ( data[1] );
304  command->data2 = htonl ( data[2] );
305  command->response_addr.high = 0;
306  command->response_addr.low
307  = htonl ( virt_to_bus ( &priv->dma->command_response ) );
308  for ( i=0; i<9; i++ )
309  command->pad[i] = 0;
310  wmb();
311  command->pad[9] = 0;
312 
313  /* Wait up to 2 seconds for a response. */
314 
315  for ( slept_ms=0; slept_ms<2000; slept_ms++ ) {
316  result = response->result;
317  if ( result == 0 ) {
318  data[0] = ntohl ( response->data );
319  return 0;
320  } else if ( result != 0xFFFFFFFF ) {
321  DBG ( "cmd%d:0x%x\n",
322  cmd,
323  ntohl ( response->result ) );
324  return -EIO;
325  }
326  udelay ( 1000 );
327  rmb();
328  }
329  DBG ( "cmd%d:timed out\n", cmd );
330  return -ETIMEDOUT;
331 }
332 
333 /*
334  * Handle any pending interrupt.
335  *
336  * @v netdev Device being polled for interrupts.
337  *
338  * This is called periodically to let the driver check for interrupts.
339  */
341 {
342  struct myri10ge_private *priv;
343  mcp_irq_data_t *irq_data;
344  uint8 valid;
345 
346  priv = myri10ge_priv ( netdev );
347  irq_data = &priv->dma->irq_data;
348 
349  /* Return if there was no interrupt. */
350 
351  rmb();
352  valid = irq_data->valid;
353  if ( !valid )
354  return;
355  DBG2 ( "irq " );
356 
357  /* Tell the NIC to deassert the interrupt and clear
358  irq_data->valid.*/
359 
360  *priv->irq_deassert = 0; /* any value is OK. */
361  mb();
362 
363  /* Handle any new receives. */
364 
365  if ( valid & 1 ) {
366 
367  /* Pass the receive interrupt token back to the NIC. */
368 
369  DBG2 ( "rx " );
370  *priv->irq_claim = htonl ( 3 );
371  wmb();
372  }
373 
374  /* Handle any sent packet by freeing its I/O buffer, now that
375  we know it has been DMAd. */
376 
377  if ( valid & 2 ) {
378  unsigned int nic_done_count;
379 
380  DBG2 ( "snt " );
381  nic_done_count = ntohl ( priv->dma->irq_data.send_done_count );
382  while ( priv->transmits_done != nic_done_count ) {
383  struct io_buffer *iob;
384 
385  iob = priv->transmit_iob [priv->transmits_done
387  DBG2 ( "%p ", iob );
388  netdev_tx_complete ( netdev, iob );
389  ++priv->transmits_done;
390  }
391  }
392 
393  /* Record any statistics update. */
394 
395  if ( irq_data->stats_updated ) {
396 
397  /* Update the link status. */
398 
399  DBG2 ( "stats " );
400  if ( ntohl ( irq_data->link_up ) == MXGEFW_LINK_UP )
402  else
404 
405  /* Ignore all error counters from the NIC. */
406  }
407 
408  /* Wait for the interrupt to be deasserted, as indicated by
409  irq_data->valid, which is set by the NIC after the deassert. */
410 
411  DBG2 ( "wait " );
412  do {
413  mb();
414  } while ( irq_data->valid );
415 
416  /* Claim the interrupt to enable future interrupt generation. */
417 
418  DBG2 ( "claim\n" );
419  * ( priv->irq_claim + 1 ) = htonl ( 3 );
420  mb();
421 }
422 
423 /* Constants for reading the STRING_SPECS via the Myricom
424  Vendor Specific PCI configuration space capability. */
425 
426 #define VS_EEPROM_READ_ADDR ( vs + 0x04 )
427 #define VS_EEPROM_READ_DATA ( vs + 0x08 )
428 #define VS_EEPROM_WRITE ( vs + 0x0C )
429 #define VS_ADDR ( vs + 0x18 )
430 #define VS_DATA ( vs + 0x14 )
431 #define VS_MODE ( vs + 0x10 )
432 #define VS_MODE_READ32 0x3
433 #define VS_MODE_LOCATE 0x8
434 #define VS_LOCATE_STRING_SPECS 0x3
435 #define VS_MODE_EEPROM_STREAM_WRITE 0xB
436 
437 /*
438  * Read MAC address from its 'string specs' via the vendor-specific
439  * capability. (This capability allows NIC SRAM and ROM to be read
440  * before it is mapped.)
441  *
442  * @v pci The device.
443  * @v vs Offset of the PCI Vendor-Specific Capability.
444  * @v mac Buffer to store the MAC address.
445  * @ret rc Returns 0 on success, else an error code.
446  */
447 static int mac_address_from_string_specs ( struct pci_device *pci,
448  unsigned int vs,
449  uint8 mac[ETH_ALEN] )
450 {
451  char string_specs[256];
452  char *ptr, *limit;
453  char *to = string_specs;
454  uint32 addr;
455  uint32 len;
456  int mac_set = 0;
457 
458  /* Locate the String specs in LANai SRAM. */
459 
463  pci_read_config_dword ( pci, VS_DATA, &len );
464  DBG2 ( "ss@%x,%x\n", addr, len );
465 
466  /* Copy in the string specs. Use 32-bit reads for performance. */
467 
468  if ( len > sizeof ( string_specs ) || ( len & 3 ) ) {
469  pci_write_config_byte ( pci, VS_MODE, 0 );
470  DBG ( "SS too big\n" );
471  return -ENOTSUP;
472  }
473 
475  while ( len >= 4 ) {
476  uint32 tmp;
477 
479  pci_read_config_dword ( pci, VS_DATA, &tmp );
480  tmp = ntohl ( tmp );
481  memcpy ( to, &tmp, 4 );
482  to += 4;
483  addr += 4;
484  len -= 4;
485  }
486  pci_write_config_byte ( pci, VS_MODE, 0 );
487 
488  /* Parse the string specs. */
489 
490  DBG2 ( "STRING_SPECS:\n" );
491  ptr = string_specs;
492  limit = string_specs + sizeof ( string_specs );
493  while ( *ptr != '\0' && ptr < limit ) {
494  DBG2 ( "%s\n", ptr );
495  if ( memcmp ( ptr, "MAC=", 4 ) == 0 ) {
496  unsigned int i;
497 
498  ptr += 4;
499  for ( i=0; i<6; i++ ) {
500  if ( ( ptr + 2 ) > limit ) {
501  DBG ( "bad MAC addr\n" );
502  return -ENOTSUP;
503  }
504  mac[i] = strtoul ( ptr, &ptr, 16 );
505  ptr += 1;
506  }
507  mac_set = 1;
508  }
509  else
510  while ( ptr < limit && *ptr++ );
511  }
512 
513  /* Verify we parsed all we need. */
514 
515  if ( !mac_set ) {
516  DBG ( "no MAC addr\n" );
517  return -ENOTSUP;
518  }
519 
520  DBG2 ( "MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
521  mac[0], mac[1], mac[2], mac[3], mac[4], mac[5] );
522 
523  return 0;
524 }
525 
526 /****************************************************************
527  * NonVolatile Storage support
528  ****************************************************************/
529 
530 /*
531  * Fill a buffer with data read from nonvolatile storage.
532  *
533  * @v nvs The NonVolatile Storage device to be read.
534  * @v addr The first NonVolatile Storage address to be read.
535  * @v _buf Pointer to the data buffer to be filled.
536  * @v len The number of bytes to copy.
537  * @ret rc 0 on success, else nonzero.
538  */
539 static int myri10ge_nvs_read ( struct nvs_device *nvs,
540  unsigned int addr,
541  void *_buf,
542  size_t len )
543 {
544  struct myri10ge_private *priv =
546  struct pci_device *pci = myri10ge_pcidev ( myri10ge_netdev ( priv ) );
547  unsigned int vs = priv->pci_cap_vs;
548  unsigned char *buf = (unsigned char *) _buf;
549  unsigned int data;
550  unsigned int i, j;
551 
552  DBGP ( "myri10ge_nvs_read\n" );
553 
554  /* Issue the first read address. */
555 
559  addr++;
560 
561  /* Issue all the reads, and harvest the results every 4th issue. */
562 
563  for ( i=0; i<len; ++i,addr++ ) {
564 
565  /* Issue the next read address, updating only the
566  bytes that need updating. We always update the
567  LSB, which triggers the read. */
568 
569  if ( ( addr & 0xff ) == 0 ) {
570  if ( ( addr & 0xffff ) == 0 ) {
571  pci_write_config_byte ( pci,
573  addr >> 16 );
574  }
575  pci_write_config_byte ( pci,
577  addr >> 8 );
578  }
580 
581  /* If 4 data bytes are available, read them with a single read. */
582 
583  if ( ( i & 3 ) == 3 ) {
584  pci_read_config_dword ( pci,
586  &data );
587  for ( j=0; j<4; j++ ) {
588  buf[i-j] = data;
589  data >>= 8;
590  }
591  }
592  }
593 
594  /* Harvest any remaining results. */
595 
596  if ( ( i & 3 ) != 0 ) {
598  for ( j=1; j<=(i&3); j++ ) {
599  buf[i-j] = data;
600  data >>= 8;
601  }
602  }
603 
604  DBGP_HDA ( addr - len, _buf, len );
605  return 0;
606 }
607 
608 /*
609  * Write a buffer into nonvolatile storage.
610  *
611  * @v nvs The NonVolatile Storage device to be written.
612  * @v address The NonVolatile Storage address to be written.
613  * @v _buf Pointer to the data to be written.
614  * @v len Length of the buffer to be written.
615  * @ret rc 0 on success, else nonzero.
616  */
617 static int myri10ge_nvs_write ( struct nvs_device *nvs,
618  unsigned int addr,
619  const void *_buf,
620  size_t len )
621 {
622  struct myri10ge_private *priv =
624  struct pci_device *pci = myri10ge_pcidev ( myri10ge_netdev ( priv ) );
625  unsigned int vs = priv->pci_cap_vs;
626  const unsigned char *buf = (const unsigned char *)_buf;
627  unsigned int i;
628  uint8 verify;
629 
630  DBGP ( "nvs_write " );
631  DBGP_HDA ( addr, _buf, len );
632 
633  /* Start erase of the NonVolatile Options block. */
634 
635  DBGP ( "erasing " );
636  pci_write_config_dword ( pci, VS_EEPROM_WRITE, ( addr << 8 ) | 0xff );
637 
638  /* Wait for erase to complete. */
639 
640  DBGP ( "waiting " );
641  pci_read_config_byte ( pci, VS_EEPROM_READ_DATA, &verify );
642  while ( verify != 0xff ) {
644  pci_read_config_byte ( pci, VS_EEPROM_READ_DATA, &verify );
645  }
646 
647  /* Write the data one byte at a time. */
648 
649  DBGP ( "writing " );
652  for (i=0; i<len; i++, addr++)
653  pci_write_config_byte ( pci, VS_DATA, buf[i] );
654  pci_write_config_dword ( pci, VS_ADDR, 0xffffffff );
655  pci_write_config_byte ( pci, VS_MODE, 0 );
656 
657  DBGP ( "done\n" );
658  return 0;
659 }
660 
661 /*
662  * Initialize NonVolatile storage support for a device.
663  *
664  * @v priv Device private data for the device.
665  * @ret rc 0 on success, else an error code.
666  */
667 
668 static int myri10ge_nv_init ( struct myri10ge_private *priv )
669 {
670  int rc;
671  struct myri10ge_eeprom_header
672  {
673  uint8 __jump[8];
674  uint32 eeprom_len;
675  uint32 eeprom_segment_len;
676  uint32 mcp1_offset;
677  uint32 mcp2_offset;
678  uint32 version;
679  } hdr;
680  uint32 mcp2_len;
681  unsigned int nvo_fragment_pos;
682 
683  DBGP ( "myri10ge_nv_init\n" );
684 
685  /* Read the EEPROM header, and byteswap the fields we will use.
686  This is safe even though priv->nvs is not yet initialized. */
687 
688  rc = myri10ge_nvs_read ( &priv->nvs, 0, &hdr, sizeof ( hdr ) );
689  if ( rc ) {
690  DBG ( "EEPROM header unreadable\n" );
691  return rc;
692  }
693  hdr.eeprom_len = ntohl ( hdr.eeprom_len );
694  hdr.eeprom_segment_len = ntohl ( hdr.eeprom_segment_len );
695  hdr.mcp2_offset = ntohl ( hdr.mcp2_offset );
696  hdr.version = ntohl ( hdr.version );
697  DBG2 ( "eelen:%xh seglen:%xh mcp2@%xh ver%d\n", hdr.eeprom_len,
698  hdr.eeprom_segment_len, hdr.mcp2_offset, hdr.version );
699 
700  /* If the firmware does not support EEPROM writes, simply return. */
701 
702  if ( hdr.version < 1 ) {
703  DBG ( "No EEPROM write support\n" );
704  return 0;
705  }
706 
707  /* Read the length of MCP2. */
708 
709  rc = myri10ge_nvs_read ( &priv->nvs, hdr.mcp2_offset, &mcp2_len, 4 );
710  mcp2_len = ntohl ( mcp2_len );
711  DBG2 ( "mcp2len:%xh\n", mcp2_len );
712 
713  /* Determine the position of the NonVolatile Options fragment and
714  simply return if it overlaps other data. */
715 
716  nvo_fragment_pos = hdr.eeprom_len - hdr.eeprom_segment_len;
717  if ( hdr.mcp2_offset + mcp2_len > nvo_fragment_pos ) {
718  DBG ( "EEPROM full\n" );
719  return 0;
720  }
721 
722  /* Initialize NonVolatile Storage state. */
723 
724  priv->nvs.word_len_log2 = 0;
725  priv->nvs.size = hdr.eeprom_len;
726  priv->nvs.block_size = hdr.eeprom_segment_len;
727  priv->nvs.read = myri10ge_nvs_read;
728  priv->nvs.write = myri10ge_nvs_write;
729 
730  /* Register the NonVolatile Options storage. */
731 
732  nvo_init ( &priv->nvo,
733  &priv->nvs,
734  nvo_fragment_pos, 0x200,
735  NULL,
736  & myri10ge_netdev (priv) -> refcnt );
737  rc = register_nvo ( &priv->nvo,
739  if ( rc ) {
740  DBG ("register_nvo failed");
741  return rc;
742  }
743 
744  priv->nvo_registered = 1;
745  DBG2 ( "NVO supported\n" );
746  return 0;
747 }
748 
749 void
751 {
752  /* Simply return if nonvolatile access is not supported. */
753 
754  if ( 0 == priv->nvo_registered )
755  return;
756 
757  unregister_nvo ( &priv->nvo );
758 }
759 
760 /****************************************************************
761  * iPXE PCI Device Driver API functions
762  ****************************************************************/
763 
764 /*
765  * Initialize the PCI device.
766  *
767  * @v pci The device's associated pci_device structure.
768  * @v id The PCI device + vendor id.
769  * @ret rc Returns zero if successfully initialized.
770  *
771  * This function is called very early on, while iPXE is initializing.
772  * This is a iPXE PCI Device Driver API function.
773  */
774 static int myri10ge_pci_probe ( struct pci_device *pci )
775 {
776  static struct net_device_operations myri10ge_operations = {
778  .close = myri10ge_net_close,
779  .transmit = myri10ge_net_transmit,
780  .poll = myri10ge_net_poll,
781  .irq = myri10ge_net_irq
782  };
783 
784  const char *dbg;
785  int rc;
786  struct net_device *netdev;
787  struct myri10ge_private *priv;
788 
789  DBGP ( "myri10ge_pci_probe: " );
790 
791  netdev = alloc_etherdev ( sizeof ( *priv ) );
792  if ( !netdev ) {
793  rc = -ENOMEM;
794  dbg = "alloc_etherdev";
795  goto abort_with_nothing;
796  }
797 
798  netdev_init ( netdev, &myri10ge_operations );
799  priv = myri10ge_priv ( netdev );
800 
801  pci_set_drvdata ( pci, netdev );
802  netdev->dev = &pci->dev;
803 
804  /* Make sure interrupts are disabled. */
805 
806  myri10ge_net_irq ( netdev, 0 );
807 
808  /* Find the PCI Vendor-Specific capability. */
809 
810  priv->pci_cap_vs = pci_find_capability ( pci , PCI_CAP_ID_VNDR );
811  if ( 0 == priv->pci_cap_vs ) {
812  rc = -ENOTSUP;
813  dbg = "no_vs";
814  goto abort_with_netdev_init;
815  }
816 
817  /* Read the NIC HW address. */
818 
820  priv->pci_cap_vs,
821  netdev->hw_addr );
822  if ( rc ) {
823  dbg = "mac_from_ss";
824  goto abort_with_netdev_init;
825  }
826  DBGP ( "mac " );
827 
828  /* Enable bus master, etc. */
829 
830  adjust_pci_device ( pci );
831  DBGP ( "pci " );
832 
833  /* Register the initialized network device. */
834 
835  rc = register_netdev ( netdev );
836  if ( rc ) {
837  dbg = "register_netdev";
838  goto abort_with_netdev_init;
839  }
840 
841  /* Initialize NonVolatile Storage support. */
842 
843  rc = myri10ge_nv_init ( priv );
844  if ( rc ) {
845  dbg = "myri10ge_nv_init";
846  goto abort_with_registered_netdev;
847  }
848 
849  DBGP ( "done\n" );
850 
851  return 0;
852 
853 abort_with_registered_netdev:
855 abort_with_netdev_init:
857  netdev_put ( netdev );
858 abort_with_nothing:
859  DBG ( "%s:%s\n", dbg, strerror ( rc ) );
860  return rc;
861 }
862 
863 /*
864  * Remove a device from the PCI device list.
865  *
866  * @v pci PCI device to remove.
867  *
868  * This is a PCI Device Driver API function.
869  */
870 static void myri10ge_pci_remove ( struct pci_device *pci )
871 {
872  struct net_device *netdev;
873 
874  DBGP ( "myri10ge_pci_remove\n" );
875  netdev = pci_get_drvdata ( pci );
876 
880  netdev_put ( netdev );
881 }
882 
883 /****************************************************************
884  * iPXE Network Device Driver Operations
885  ****************************************************************/
886 
887 /*
888  * Close a network device.
889  *
890  * @v netdev Device to close.
891  *
892  * This is a iPXE Network Device Driver API function.
893  */
894 static void myri10ge_net_close ( struct net_device *netdev )
895 {
896  struct myri10ge_private *priv;
897  uint32 data[3];
898 
899  DBGP ( "myri10ge_net_close\n" );
900  priv = myri10ge_priv ( netdev );
901 
902  /* disable interrupts */
903 
904  myri10ge_net_irq ( netdev, 0 );
905 
906  /* Reset the NIC interface, so we won't get any more events from
907  the NIC. */
908 
910 
911  /* Free receive buffers that were never filled. */
912 
913  while ( priv->receives_done != priv->receives_posted ) {
914  free_iob ( priv->receive_iob[priv->receives_done
916  ++priv->receives_done;
917  }
918 
919  /* Release DMAable memory. */
920 
921  free_phys ( priv->dma, sizeof ( *priv->dma ) );
922 
923  /* Erase all state from the open. */
924 
925  memset ( priv, 0, sizeof ( *priv ) );
926 
927  DBG2_RINGS ( priv );
928 }
929 
930 /*
931  * Enable or disable IRQ masking.
932  *
933  * @v netdev Device to control.
934  * @v enable Zero to mask off IRQ, non-zero to enable IRQ.
935  *
936  * This is a iPXE Network Driver API function.
937  */
938 static void myri10ge_net_irq ( struct net_device *netdev, int enable )
939 {
940  struct pci_device *pci_dev;
941  uint16 val;
942 
943  DBGP ( "myri10ge_net_irq\n" );
944  pci_dev = ( struct pci_device * ) netdev->dev;
945 
946  /* Adjust the Interrupt Disable bit in the Command register of the
947  PCI Device. */
948 
949  pci_read_config_word ( pci_dev, PCI_COMMAND, &val );
950  if ( enable )
952  else
954  pci_write_config_word ( pci_dev, PCI_COMMAND, val );
955 }
956 
957 /*
958  * Opens a network device.
959  *
960  * @v netdev Device to be opened.
961  * @ret rc Non-zero if failed to open.
962  *
963  * This enables tx and rx on the device.
964  * This is a iPXE Network Device Driver API function.
965  */
966 static int myri10ge_net_open ( struct net_device *netdev )
967 {
968  const char *dbg; /* printed upon error return */
969  int rc;
970  struct io_buffer *iob;
971  struct myri10ge_private *priv;
972  uint32 data[3];
973  struct pci_device *pci_dev;
974  void *membase;
975 
976  DBGP ( "myri10ge_net_open\n" );
977  priv = myri10ge_priv ( netdev );
978  pci_dev = ( struct pci_device * ) netdev->dev;
979  membase = phys_to_virt ( pci_dev->membase );
980 
981  /* Compute address for passing commands to the firmware. */
982 
983  priv->command = membase + MXGEFW_ETH_CMD;
984 
985  /* Ensure interrupts are disabled. */
986 
987  myri10ge_net_irq ( netdev, 0 );
988 
989  /* Allocate cleared DMAable buffers. */
990 
991  priv->dma = malloc_phys ( sizeof ( *priv->dma ) , 128 );
992  if ( !priv->dma ) {
993  rc = -ENOMEM;
994  dbg = "DMA";
995  goto abort_with_nothing;
996  }
997  memset ( priv->dma, 0, sizeof ( *priv->dma ) );
998 
999  /* Simplify following code. */
1000 
1001 #define TRY( prefix, base, suffix ) do { \
1002  rc = myri10ge_command ( priv, \
1003  MXGEFW_ \
1004  ## prefix \
1005  ## base \
1006  ## suffix, \
1007  data ); \
1008  if ( rc ) { \
1009  dbg = #base; \
1010  goto abort_with_dma; \
1011  } \
1012  } while ( 0 )
1013 
1014  /* Send a reset command to the card to see if it is alive,
1015  and to reset its queue state. */
1016 
1017  TRY ( CMD_, RESET , );
1018 
1019  /* Set the interrupt queue size. */
1020 
1021  data[0] = ( (uint32_t)( sizeof ( priv->dma->receive_completion ) )
1023  TRY ( CMD_SET_ , INTRQ_SIZE , );
1024 
1025  /* Set the interrupt queue DMA address. */
1026 
1027  data[0] = virt_to_bus ( &priv->dma->receive_completion );
1028  data[1] = 0;
1029  TRY ( CMD_SET_, INTRQ_DMA, );
1030 
1031  /* Get the NIC interrupt claim address. */
1032 
1033  TRY ( CMD_GET_, IRQ_ACK, _OFFSET );
1034  priv->irq_claim = membase + data[0];
1035 
1036  /* Get the NIC interrupt assert address. */
1037 
1038  TRY ( CMD_GET_, IRQ_DEASSERT, _OFFSET );
1039  priv->irq_deassert = membase + data[0];
1040 
1041  /* Disable interrupt coalescing, which is inappropriate for the
1042  minimal buffering we provide. */
1043 
1044  TRY ( CMD_GET_, INTR_COAL, _DELAY_OFFSET );
1045  * ( ( uint32 * ) ( membase + data[0] ) ) = 0;
1046 
1047  /* Set the NIC mac address. */
1048 
1049  data[0] = ( netdev->ll_addr[0] << 24
1050  | netdev->ll_addr[1] << 16
1051  | netdev->ll_addr[2] << 8
1052  | netdev->ll_addr[3] );
1053  data[1] = ( ( netdev->ll_addr[4] << 8 )
1054  | netdev->ll_addr[5] );
1055  TRY ( SET_ , MAC_ADDRESS , );
1056 
1057  /* Enable multicast receives, because some iPXE clients don't work
1058  without multicast. . */
1059 
1060  TRY ( ENABLE_ , ALLMULTI , );
1061 
1062  /* Disable Ethernet flow control, so the NIC cannot deadlock the
1063  network under any circumstances. */
1064 
1065  TRY ( DISABLE_ , FLOW , _CONTROL );
1066 
1067  /* Compute transmit ring sizes. */
1068 
1069  data[0] = 0; /* slice 0 */
1070  TRY ( CMD_GET_, SEND_RING, _SIZE );
1071  priv->transmit_ring_wrap
1072  = data[0] / sizeof ( mcp_kreq_ether_send_t ) - 1;
1073  if ( priv->transmit_ring_wrap
1074  & ( priv->transmit_ring_wrap + 1 ) ) {
1075  rc = -EPROTO;
1076  dbg = "TX_RING";
1077  goto abort_with_dma;
1078  }
1079 
1080  /* Compute receive ring sizes. */
1081 
1082  data[0] = 0; /* slice 0 */
1083  TRY ( CMD_GET_ , RX_RING , _SIZE );
1084  priv->receive_post_ring_wrap = data[0] / sizeof ( mcp_dma_addr_t ) - 1;
1085  if ( priv->receive_post_ring_wrap
1086  & ( priv->receive_post_ring_wrap + 1 ) ) {
1087  rc = -EPROTO;
1088  dbg = "RX_RING";
1089  goto abort_with_dma;
1090  }
1091 
1092  /* Get NIC transmit ring address. */
1093 
1094  data[0] = 0; /* slice 0. */
1095  TRY ( CMD_GET_, SEND, _OFFSET );
1096  priv->transmit_ring = membase + data[0];
1097 
1098  /* Get the NIC receive ring address. */
1099 
1100  data[0] = 0; /* slice 0. */
1101  TRY ( CMD_GET_, SMALL_RX, _OFFSET );
1102  priv->receive_post_ring = membase + data[0];
1103 
1104  /* Set the Nic MTU. */
1105 
1106  data[0] = ETH_FRAME_LEN;
1107  TRY ( CMD_SET_, MTU, );
1108 
1109  /* Tell the NIC our buffer sizes. ( We use only small buffers, so we
1110  set both buffer sizes to the same value, which will force all
1111  received frames to use small buffers. ) */
1112 
1113  data[0] = MXGEFW_PAD + ETH_FRAME_LEN;
1114  TRY ( CMD_SET_, SMALL_BUFFER, _SIZE );
1115  data[0] = MXGEFW_PAD + ETH_FRAME_LEN;
1116  TRY ( CMD_SET_, BIG_BUFFER, _SIZE );
1117 
1118  /* Tell firmware where to DMA IRQ data */
1119 
1120  data[0] = virt_to_bus ( &priv->dma->irq_data );
1121  data[1] = 0;
1122  data[2] = sizeof ( priv->dma->irq_data );
1123  TRY ( CMD_SET_, STATS_DMA_V2, );
1124 
1125  /* Post receives. */
1126 
1127  while ( priv->receives_posted <= MYRI10GE_RECEIVE_WRAP ) {
1128 
1129  /* Reserve 2 extra bytes at the start of packets, since
1130  the firmware always skips the first 2 bytes of the buffer
1131  so TCP headers will be aligned. */
1132 
1133  iob = alloc_iob ( MXGEFW_PAD + ETH_FRAME_LEN );
1134  if ( !iob ) {
1135  rc = -ENOMEM;
1136  dbg = "alloc_iob";
1137  goto abort_with_receives_posted;
1138  }
1139  iob_reserve ( iob, MXGEFW_PAD );
1140  myri10ge_post_receive ( priv, iob );
1141  }
1142 
1143  /* Bring up the link. */
1144 
1145  TRY ( CMD_, ETHERNET_UP, );
1146 
1147  DBG2_RINGS ( priv );
1148  return 0;
1149 
1150 abort_with_receives_posted:
1151  while ( priv->receives_posted-- )
1152  free_iob ( priv->receive_iob[priv->receives_posted] );
1153 abort_with_dma:
1154  /* Because the link is not up, we don't have to reset the NIC here. */
1155  free_phys ( priv->dma, sizeof ( *priv->dma ) );
1156 abort_with_nothing:
1157  /* Erase all signs of the failed open. */
1158  memset ( priv, 0, sizeof ( *priv ) );
1159  DBG ( "%s: %s\n", dbg, strerror ( rc ) );
1160  return ( rc );
1161 }
1162 
1163 /*
1164  * This function allows a driver to process events during operation.
1165  *
1166  * @v netdev Device being polled.
1167  *
1168  * This is called periodically by iPXE to let the driver check the status of
1169  * transmitted packets and to allow the driver to check for received packets.
1170  * This is a iPXE Network Device Driver API function.
1171  */
1172 static void myri10ge_net_poll ( struct net_device *netdev )
1173 {
1174  struct io_buffer *iob;
1175  struct io_buffer *replacement;
1176  struct myri10ge_dma_buffers *dma;
1177  struct myri10ge_private *priv;
1178  unsigned int length;
1179  unsigned int orig_receives_posted;
1180 
1181  DBGP ( "myri10ge_net_poll\n" );
1182  priv = myri10ge_priv ( netdev );
1183  dma = priv->dma;
1184 
1185  /* Process any pending interrupt. */
1186 
1188 
1189  /* Pass up received frames, but limit ourselves to receives posted
1190  before this function was called, so we cannot livelock if
1191  receives are arriving faster than we process them. */
1192 
1193  orig_receives_posted = priv->receives_posted;
1194  while ( priv->receives_done != orig_receives_posted ) {
1195 
1196  /* Stop if there is no pending receive. */
1197 
1198  length = ntohs ( dma->receive_completion
1199  [priv->receives_done
1201  .length );
1202  if ( length == 0 )
1203  break;
1204 
1205  /* Allocate a replacement buffer. If none is available,
1206  stop passing up packets until a buffer is available.
1207 
1208  Reserve 2 extra bytes at the start of packets, since
1209  the firmware always skips the first 2 bytes of the buffer
1210  so TCP headers will be aligned. */
1211 
1212  replacement = alloc_iob ( MXGEFW_PAD + ETH_FRAME_LEN );
1213  if ( !replacement ) {
1214  DBG ( "NO RX BUF\n" );
1215  break;
1216  }
1217  iob_reserve ( replacement, MXGEFW_PAD );
1218 
1219  /* Pass up the received frame. */
1220 
1221  iob = priv->receive_iob[priv->receives_done
1223  iob_put ( iob, length );
1224  netdev_rx ( netdev, iob );
1225 
1226  /* We have consumed the packet, so clear the receive
1227  notification. */
1228 
1229  dma->receive_completion [priv->receives_done
1231  .length = 0;
1232  wmb();
1233 
1234  /* Replace the passed-up I/O buffer. */
1235 
1236  myri10ge_post_receive ( priv, replacement );
1237  ++priv->receives_done;
1238  DBG2_RINGS ( priv );
1239  }
1240 }
1241 
1242 /*
1243  * This transmits a packet.
1244  *
1245  * @v netdev Device to transmit from.
1246  * @v iobuf Data to transmit.
1247  * @ret rc Non-zero if failed to transmit.
1248  *
1249  * This is a iPXE Network Driver API function.
1250  */
1252  struct io_buffer *iobuf )
1253 {
1254  mcp_kreq_ether_send_t *kreq;
1255  size_t len;
1256  struct myri10ge_private *priv;
1258 
1259  DBGP ( "myri10ge_net_transmit\n" );
1260  priv = myri10ge_priv ( netdev );
1261 
1262  /* Confirm space in the send ring. */
1263 
1264  transmits_posted = priv->transmits_posted;
1265  if ( transmits_posted - priv->transmits_done
1267  DBG ( "TX ring full\n" );
1268  return -ENOBUFS;
1269  }
1270 
1271  DBG2 ( "TX %p+%zd ", iobuf->data, iob_len ( iobuf ) );
1272  DBG2_HD ( iobuf->data, 14 );
1273 
1274  /* Record the packet being transmitted, so we can later report
1275  send completion. */
1276 
1277  priv->transmit_iob[transmits_posted & MYRI10GE_TRANSMIT_WRAP] = iobuf;
1278 
1279  /* Copy and pad undersized frames, because the NIC does not pad,
1280  and we would rather copy small frames than do a gather. */
1281 
1282  len = iob_len ( iobuf );
1283  if ( len < ETH_ZLEN ) {
1284  iob_pad ( iobuf, ETH_ZLEN );
1285  len = ETH_ZLEN;
1286  }
1287 
1288  /* Enqueue the packet by writing a descriptor to the NIC.
1289  This is a bit tricky because the HW requires 32-bit writes,
1290  but the structure has smaller fields. */
1291 
1292  kreq = &priv->transmit_ring[transmits_posted
1293  & priv->transmit_ring_wrap];
1294  kreq->addr_high = 0;
1295  kreq->addr_low = htonl ( virt_to_bus ( iobuf->data ) );
1296  ( ( uint32 * ) kreq ) [2] = htonl (
1297  0x0000 << 16 /* pseudo_header_offset */
1298  | ( len & 0xFFFF ) /* length */
1299  );
1300  wmb();
1301  ( ( uint32 * ) kreq ) [3] = htonl (
1302  0x00 << 24 /* pad */
1303  | 0x01 << 16 /* rdma_count */
1304  | 0x00 << 8 /* cksum_offset */
1305  | ( MXGEFW_FLAGS_SMALL
1307  | MXGEFW_FLAGS_NO_TSO ) /* flags */
1308  );
1309  wmb();
1310 
1311  /* Mark the slot as consumed and return. */
1312 
1313  priv->transmits_posted = ++transmits_posted;
1314  DBG2_RINGS ( priv );
1315  return 0;
1316 }
1317 
1318 static struct pci_device_id myri10ge_nics[] = {
1319  /* Each of these macros must be a single line to satisfy a script. */
1320  PCI_ROM ( 0x14c1, 0x0008, "myri10ge", "Myricom 10Gb Ethernet Adapter", 0 ) ,
1321 };
1322 
1323 struct pci_driver myri10ge_driver __pci_driver = {
1324  .ids = myri10ge_nics,
1325  .id_count = ( sizeof ( myri10ge_nics ) / sizeof ( myri10ge_nics[0] ) ) ,
1328 };
1329 
1330 /*
1331  * Local variables:
1332  * c-basic-offset: 8
1333  * c-indent-level: 8
1334  * tab-width: 8
1335  * End:
1336  */
static int mac_address_from_string_specs(struct pci_device *pci, unsigned int vs, uint8 mac[ETH_ALEN])
Definition: myri10ge.c:447
u16 length
Definition: sky2.h:9
unsigned long membase
Memory base.
Definition: pci.h:197
#define MYRI10GE_RECEIVE_WRAP
Definition: myri10ge.c:116
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
static void netdev_tx_complete(struct net_device *netdev, struct io_buffer *iobuf)
Complete network transmission.
Definition: netdevice.h:752
wmb()
#define iob_put(iobuf, len)
Definition: iobuf.h:120
#define MXGEFW_PAD
Definition: myri10ge_mcp.h:133
static void myri10ge_net_irq(struct net_device *, int enable)
Definition: myri10ge.c:938
A PCI driver.
Definition: pci.h:227
unsigned long strtoul(const char *string, char **endp, int base)
Convert string to numeric value.
Definition: string.c:456
static int myri10ge_net_transmit(struct net_device *, struct io_buffer *)
Definition: myri10ge.c:1251
int(* open)(struct net_device *netdev)
Open network device.
Definition: netdevice.h:222
#define MYRI10GE_RECEIVE_COMPLETION_WRAP
Definition: myri10ge.c:117
int pci_find_capability(struct pci_device *pci, int cap)
Look for a PCI capability.
Definition: pciextra.c:36
uint32 transmit_ring_wrap
Definition: myri10ge.c:161
static int myri10ge_command(struct myri10ge_private *priv, uint32 cmd, uint32 data[3])
Definition: myri10ge.c:281
Error codes.
static void myri10ge_net_poll(struct net_device *)
Definition: myri10ge.c:1172
struct golan_inbox_hdr hdr
Message header.
Definition: CIB_PRM.h:28
unsigned int receives_done
Definition: myri10ge.c:173
A command-line command.
Definition: command.h:9
I/O buffers.
void free_iob(struct io_buffer *iobuf)
Free I/O buffer.
Definition: iobuf.c:146
A non-volatile storage device.
Definition: nvs.h:15
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:229
int register_nvo(struct nvo_block *nvo, struct settings *parent)
Register non-volatile stored options.
Definition: nvo.c:293
Definition: sis900.h:46
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
#define PCI_COMMAND_INTX_DISABLE
Interrupt disable.
Definition: pci.h:32
#define DBG2_HD(...)
Definition: compiler.h:517
#define PCI_CAP_ID_VNDR
Vendor-specific.
Definition: pci.h:96
uint32 * irq_claim
Definition: myri10ge.c:146
static void *__malloc malloc_phys(size_t size, size_t phys_align)
Allocate memory with specified physical alignment.
Definition: malloc.h:62
FILE_LICENCE(GPL2_ONLY)
#define ntohl(value)
Definition: byteswap.h:134
Non-volatile storage.
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
unsigned int nvo_registered
Definition: myri10ge.c:187
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:186
iPXE timers
#define PCI_COMMAND
PCI command.
Definition: pci.h:25
struct io_buffer * transmit_iob[1+MYRI10GE_TRANSMIT_WRAP]
Definition: myri10ge.c:164
#define ntohs(value)
Definition: byteswap.h:136
static struct myri10ge_private * myri10ge_priv(struct net_device *nd)
Definition: myri10ge.c:213
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:24
#define VS_EEPROM_READ_DATA
Definition: myri10ge.c:427
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:129
unsigned int receives_posted
Definition: myri10ge.c:172
#define htonl(value)
Definition: byteswap.h:133
struct device dev
Generic device.
Definition: pci.h:190
static struct settings * netdev_settings(struct net_device *netdev)
Get per-netdevice configuration settings block.
Definition: netdevice.h:583
uint8_t uint8
Definition: stdint.h:28
uint32 transmits_done
Definition: myri10ge.c:163
#define ENOTSUP
Operation not supported.
Definition: errno.h:589
Dynamic memory allocation.
A reference counter.
Definition: refcnt.h:26
#define VS_MODE
Definition: myri10ge.c:431
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:504
struct nvo_block nvo
Definition: myri10ge.c:186
static __always_inline void * phys_to_virt(unsigned long phys_addr)
Convert physical address to a virtual address.
Definition: uaccess.h:299
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:341
#define rmb()
Definition: io.h:484
#define ENOMEM
Not enough space.
Definition: errno.h:534
struct mcp_dma_addr mcp_dma_addr_t
Definition: myri10ge_mcp.h:46
void * memcpy(void *dest, const void *src, size_t len) __nonnull
int result
Definition: bigint.h:148
mcp_kreq_ether_recv_t * receive_post_ring
Definition: myri10ge.c:170
u32 version
Version number.
Definition: ath9k_hw.c:1983
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define DBGP(...)
Definition: compiler.h:532
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:561
#define container_of(ptr, type, field)
Get containing structure.
Definition: stddef.h:35
Ethernet protocol.
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
mcp_kreq_ether_send_t * transmit_ring
Definition: myri10ge.c:160
#define ETH_FRAME_LEN
Definition: if_ether.h:11
#define VS_EEPROM_READ_ADDR
Definition: myri10ge.c:426
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:774
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
static struct net_device * netdev
Definition: gdbudp.c:52
#define MXGEFW_LINK_UP
Definition: myri10ge_mcp.h:481
uint8 pci_cap_vs
Definition: myri10ge.c:191
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:874
void unregister_nvo(struct nvo_block *nvo)
Unregister non-volatile stored options.
Definition: nvo.c:324
#define EPROTO
Protocol error.
Definition: errno.h:624
unsigned int receive_post_ring_wrap
Definition: myri10ge.c:171
#define MXGEFW_FLAGS_FIRST
Definition: myri10ge_mcp.h:115
Non-volatile stored options.
uint16_t limit
Limit.
Definition: librm.h:250
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
mcp_irq_data_t irq_data
Definition: myri10ge.c:135
A block of non-volatile stored options.
Definition: nvo.h:22
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
void nvo_init(struct nvo_block *nvo, struct nvs_device *nvs, size_t address, size_t len, int(*resize)(struct nvo_block *nvo, size_t len), struct refcnt *refcnt)
Initialise non-volatile stored options.
Definition: nvo.c:273
PCI bus.
A PCI device.
Definition: pci.h:188
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:697
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:155
uint8_t valid
Definition: myri10ge_mcp.h:496
struct nvs_device nvs
Definition: myri10ge.c:185
#define DBG2_RINGS(priv)
Definition: myri10ge.c:201
static struct net_device * myri10ge_netdev(struct myri10ge_private *p)
Definition: myri10ge.c:227
uint8_t * tmp
Definition: entropy.h:156
A network device.
Definition: netdevice.h:352
uint16_t uint16
Definition: stdint.h:30
#define TRY(prefix, base, suffix)
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:517
u32 addr
Definition: sky2.h:8
static int myri10ge_nv_init(struct myri10ge_private *priv)
Definition: myri10ge.c:668
#define MXGEFW_CMD_SET_INTRQ_SIZE_FLAG_NO_STRICT_SIZE_CHECK
Definition: myri10ge_mcp.h:222
static struct pci_device_id myri10ge_nics[]
Definition: myri10ge.c:1318
#define ETH_ALEN
Definition: if_ether.h:8
#define ETH_ZLEN
Definition: if_ether.h:10
A PCI device ID list entry.
Definition: pci.h:152
static void myri10ge_pci_remove(struct pci_device *)
Definition: myri10ge.c:870
static int command
Definition: epic100.c:68
unsigned int uint32_t
Definition: stdint.h:12
static struct xen_remove_from_physmap * remove
Definition: xenmem.h:39
static struct pci_device * myri10ge_pcidev(struct net_device *netdev)
Definition: myri10ge.c:238
void __asmcall int val
Definition: setjmp.h:28
Network device operations.
Definition: netdevice.h:213
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:489
struct device * dev
Underlying hardware device.
Definition: netdevice.h:364
#define DBGP_HDA(...)
Definition: compiler.h:533
static void myri10ge_net_close(struct net_device *)
Definition: myri10ge.c:894
Network device management.
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:351
#define iob_reserve(iobuf, len)
Definition: iobuf.h:67
void myri10ge_nv_fini(struct myri10ge_private *priv)
Definition: myri10ge.c:750
struct pci_driver myri10ge_driver __pci_driver
Definition: myri10ge.c:1323
struct io_buffer * receive_iob[1+MYRI10GE_RECEIVE_WRAP]
Definition: myri10ge.c:174
#define VS_MODE_READ32
Definition: myri10ge.c:432
uint32_t len
Length.
Definition: ena.h:14
#define ENOBUFS
No buffer space available.
Definition: errno.h:498
static struct tlan_private * priv
Definition: tlan.c:224
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:240
mcp_cmd_response_t command_response
Definition: myri10ge.c:139
void * data
Start of data.
Definition: iobuf.h:48
#define EIO
Input/output error.
Definition: errno.h:433
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
#define VS_DATA
Definition: myri10ge.c:430
u8 request[0]
List of IEs requested.
Definition: ieee80211.h:16
static int myri10ge_nvs_write(struct nvs_device *nvs, unsigned int addr, const void *_buf, size_t len)
Definition: myri10ge.c:617
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
#define MXGEFW_FLAGS_NO_TSO
Definition: myri10ge_mcp.h:119
#define VS_EEPROM_WRITE
Definition: myri10ge.c:428
static void free_phys(void *ptr, size_t size)
Free memory allocated with malloc_phys()
Definition: malloc.h:77
struct myri10ge_dma_buffers * dma
Definition: myri10ge.c:151
void mb(void)
Memory barrier.
uint32 * irq_deassert
Definition: myri10ge.c:147
static void myri10ge_interrupt_handler(struct net_device *netdev)
Definition: myri10ge.c:340
static int myri10ge_pci_probe(struct pci_device *)
Definition: myri10ge.c:774
struct arbelprm_port_state_change_st data
Message.
Definition: arbel.h:12
uint8_t ll_addr[MAX_LL_ADDR_LEN]
Link-layer address.
Definition: netdevice.h:387
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
static __always_inline physaddr_t dma(struct dma_mapping *map, void *addr)
Get DMA address from virtual address.
Definition: dma.h:436
uint32_t link_up
Definition: myri10ge_mcp.h:484
static int myri10ge_net_open(struct net_device *)
Definition: myri10ge.c:966
static int myri10ge_nvs_read(struct nvs_device *nvs, unsigned int addr, void *_buf, size_t len)
Definition: myri10ge.c:539
mcp_cmd_t * command
Definition: myri10ge.c:179
int memcmp(const void *first, const void *second, size_t len)
Compare memory regions.
Definition: string.c:113
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
Definition: netdevice.h:381
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
struct golan_eqe_cmd cmd
Definition: CIB_PRM.h:29
static void myri10ge_post_receive(struct myri10ge_private *priv, struct io_buffer *iob)
Definition: myri10ge.c:251
#define ETIMEDOUT
Connection timed out.
Definition: errno.h:669
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:286
uint8_t stats_updated
Definition: myri10ge_mcp.h:495
void iob_pad(struct io_buffer *iobuf, size_t min_len)
Pad I/O buffer.
Definition: iobpad.c:49
#define MXGEFW_ETH_CMD
Definition: myri10ge_mcp.h:161
#define VS_MODE_EEPROM_STREAM_WRITE
Definition: myri10ge.c:435
uint32 transmits_posted
Definition: myri10ge.c:162
uint32_t uint32
Definition: stdint.h:32
#define VS_ADDR
Definition: myri10ge.c:429
#define VS_MODE_LOCATE
Definition: myri10ge.c:433
#define MYRI10GE_TRANSMIT_WRAP
Definition: myri10ge.c:115
#define DBG2(...)
Definition: compiler.h:515
struct mcp_kreq_ether_send mcp_kreq_ether_send_t
Definition: myri10ge_mcp.h:146
#define VS_LOCATE_STRING_SPECS
Definition: myri10ge.c:434
void * memset(void *dest, int character, size_t len) __nonnull
mcp_slot_t receive_completion[1+MYRI10GE_RECEIVE_COMPLETION_WRAP]
Definition: myri10ge.c:131
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.
#define MXGEFW_FLAGS_SMALL
Definition: myri10ge_mcp.h:113
A persistent I/O buffer.
Definition: iobuf.h:33