iPXE
Enumerations | Functions | Variables
skge.c File Reference
#include <stdint.h>
#include <errno.h>
#include <stdio.h>
#include <unistd.h>
#include <ipxe/netdevice.h>
#include <ipxe/ethernet.h>
#include <ipxe/if_ether.h>
#include <ipxe/iobuf.h>
#include <ipxe/malloc.h>
#include <ipxe/pci.h>
#include "skge.h"

Go to the source code of this file.

Enumerations

enum  led_mode {
  LED_MODE_OFF, LED_MODE_ON, LED_MODE_TST, MO_LED_NORM = 0,
  MO_LED_BLINK = 1, MO_LED_OFF = 2, MO_LED_ON = 3
}
 

Functions

 FILE_LICENCE (GPL2_ONLY)
 
static int skge_up (struct net_device *dev)
 
static void skge_down (struct net_device *dev)
 
static void skge_tx_clean (struct net_device *dev)
 
static int xm_phy_write (struct skge_hw *hw, int port, u16 reg, u16 val)
 
static int gm_phy_write (struct skge_hw *hw, int port, u16 reg, u16 val)
 
static void yukon_init (struct skge_hw *hw, int port)
 
static void genesis_mac_init (struct skge_hw *hw, int port)
 
static void genesis_link_up (struct skge_port *skge)
 
static void skge_phyirq (struct skge_hw *hw)
 
static void skge_poll (struct net_device *dev)
 
static int skge_xmit_frame (struct net_device *dev, struct io_buffer *iob)
 
static void skge_net_irq (struct net_device *dev, int enable)
 
static void skge_rx_refill (struct net_device *dev)
 
static u32 skge_supported_modes (const struct skge_hw *hw)
 
static u32 hwkhz (const struct skge_hw *hw)
 
static u32 skge_usecs2clk (const struct skge_hw *hw, u32 usec)
 
static void skge_led (struct skge_port *skge, enum led_mode mode)
 
static int skge_ring_alloc (struct skge_ring *ring, void *vaddr, u32 base, size_t num)
 
static void skge_rx_setup (struct skge_port *skge __unused, struct skge_element *e, struct io_buffer *iob, unsigned int bufsize)
 
static void skge_rx_reuse (struct skge_element *e, unsigned int size)
 
static void skge_rx_clean (struct skge_port *skge)
 
static void skge_link_up (struct skge_port *skge)
 
static void skge_link_down (struct skge_port *skge)
 
static void xm_link_down (struct skge_hw *hw, int port)
 
static int __xm_phy_read (struct skge_hw *hw, int port, u16 reg, u16 *val)
 
static u16 xm_phy_read (struct skge_hw *hw, int port, u16 reg)
 
static void genesis_init (struct skge_hw *hw)
 
static void genesis_reset (struct skge_hw *hw, int port)
 
static void bcom_check_link (struct skge_hw *hw, int port)
 
static void bcom_phy_init (struct skge_port *skge)
 
static void xm_phy_init (struct skge_port *skge)
 
static int xm_check_link (struct net_device *dev)
 
static void xm_link_timer (struct skge_port *skge)
 
static void genesis_stop (struct skge_port *skge)
 
static void bcom_phy_intr (struct skge_port *skge)
 
static int __gm_phy_read (struct skge_hw *hw, int port, u16 reg, u16 *val)
 
static u16 gm_phy_read (struct skge_hw *hw, int port, u16 reg)
 
static void yukon_reset (struct skge_hw *hw, int port)
 
static int is_yukon_lite_a0 (struct skge_hw *hw)
 
static void yukon_mac_init (struct skge_hw *hw, int port)
 
static void yukon_suspend (struct skge_hw *hw, int port)
 
static void yukon_stop (struct skge_port *skge)
 
static u16 yukon_speed (const struct skge_hw *hw __unused, u16 aux)
 
static void yukon_link_up (struct skge_port *skge)
 
static void yukon_link_down (struct skge_port *skge)
 
static void yukon_phy_intr (struct skge_port *skge)
 
static void skge_ramset (struct skge_hw *hw, u16 q, u32 start, size_t len)
 
static void skge_qset (struct skge_port *skge, u16 q, const struct skge_element *e)
 
void skge_free (struct net_device *dev)
 
static void skge_rx_stop (struct skge_hw *hw, int port)
 
static int skge_tx_avail (const struct skge_ring *ring)
 
static u16 phy_length (const struct skge_hw *hw, u32 status)
 
static int bad_phy_status (const struct skge_hw *hw, u32 status)
 
static void skge_tx_done (struct net_device *dev)
 
static void skge_rx_done (struct net_device *dev)
 
static const char * skge_board_name (const struct skge_hw *hw)
 
static int skge_reset (struct skge_hw *hw)
 
static struct net_deviceskge_devinit (struct skge_hw *hw, int port, int highmem __unused)
 
static void skge_show_addr (struct net_device *dev)
 
static int skge_probe (struct pci_device *pdev)
 
static void skge_remove (struct pci_device *pdev)
 

Variables

static struct pci_device_id skge_id_table []
 
static struct net_device_operations skge_operations
 
static const int txqaddr [] = { Q_XA1, Q_XA2 }
 
static const int rxqaddr [] = { Q_R1, Q_R2 }
 
static const u32 portmask [] = { IS_PORT_1, IS_PORT_2 }
 
static const u16 phy_pause_map []
 
static const u16 fiber_pause_map []
 
struct {
   u8   id
 
   const char *   name
 
skge_chips []
 
struct pci_driver skge_driver __pci_driver
 

Enumeration Type Documentation

◆ led_mode

enum led_mode
Enumerator
LED_MODE_OFF 
LED_MODE_ON 
LED_MODE_TST 
MO_LED_NORM 
MO_LED_BLINK 
MO_LED_OFF 
MO_LED_ON 

Definition at line 132 of file skge.c.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_ONLY  )

◆ skge_up()

static int skge_up ( struct net_device dev)
static

Definition at line 1707 of file skge.c.

1708 {
1709  struct skge_port *skge = netdev_priv(dev);
1710  struct skge_hw *hw = skge->hw;
1711  int port = skge->port;
1712  u32 chunk, ram_addr;
1713  int err;
1714 
1715  DBG2(PFX "%s: enabling interface\n", dev->name);
1716 
1718  skge->dma = virt_to_bus(skge->mem);
1719  if (!skge->mem)
1720  return -ENOMEM;
1721  memset(skge->mem, 0, RING_SIZE);
1722 
1723  assert(!(skge->dma & 7));
1724 
1725  /* FIXME: find out whether 64 bit iPXE will be loaded > 4GB */
1726  if ((u64)skge->dma >> 32 != ((u64) skge->dma + RING_SIZE) >> 32) {
1727  DBG(PFX "pci_alloc_consistent region crosses 4G boundary\n");
1728  err = -EINVAL;
1729  goto err;
1730  }
1731 
1732  err = skge_ring_alloc(&skge->rx_ring, skge->mem, skge->dma, NUM_RX_DESC);
1733  if (err)
1734  goto err;
1735 
1736  /* this call relies on e->iob and d->control to be 0
1737  * This is assured by calling memset() on skge->mem and using zalloc()
1738  * for the skge_element structures.
1739  */
1741 
1742  err = skge_ring_alloc(&skge->tx_ring, skge->mem + RX_RING_SIZE,
1743  skge->dma + RX_RING_SIZE, NUM_TX_DESC);
1744  if (err)
1745  goto err;
1746 
1747  /* Initialize MAC */
1748  if (hw->chip_id == CHIP_ID_GENESIS)
1750  else
1752 
1753  /* Configure RAMbuffers - equally between ports and tx/rx */
1754  chunk = (hw->ram_size - hw->ram_offset) / (hw->ports * 2);
1755  ram_addr = hw->ram_offset + 2 * chunk * port;
1756 
1757  skge_ramset(hw, rxqaddr[port], ram_addr, chunk);
1758  skge_qset(skge, rxqaddr[port], skge->rx_ring.to_clean);
1759 
1760  assert(!(skge->tx_ring.to_use != skge->tx_ring.to_clean));
1761  skge_ramset(hw, txqaddr[port], ram_addr+chunk, chunk);
1762  skge_qset(skge, txqaddr[port], skge->tx_ring.to_use);
1763 
1764  /* Start receiver BMU */
1765  wmb();
1767  skge_led(skge, LED_MODE_ON);
1768 
1769  hw->intr_mask |= portmask[port];
1770  skge_write32(hw, B0_IMSK, hw->intr_mask);
1771 
1772  return 0;
1773 
1774  err:
1775  skge_rx_clean(skge);
1776  skge_free(dev);
1777 
1778  return err;
1779 }
#define EINVAL
Invalid argument.
Definition: errno.h:428
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
int port
Definition: skge.h:2498
wmb()
static const u32 portmask[]
Definition: skge.c:87
struct net_device * dev[2]
Definition: skge.h:2464
static void yukon_mac_init(struct skge_hw *hw, int port)
Definition: skge.c:1326
struct skge_ring tx_ring
Definition: skge.h:2500
#define SKGE_RING_ALIGN
Definition: skge.h:26
Definition: hw.c:16
#define NUM_RX_DESC
Definition: igbvf.h:281
Definition: skge.h:523
struct skge_hw * hw
Definition: skge.h:2496
u32 dma
Definition: skge.h:2511
#define ENOMEM
Not enough space.
Definition: errno.h:534
Definition: skge.h:82
u8 port
Port number.
Definition: CIB_PRM.h:31
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
uint64_t u64
Definition: stdint.h:25
#define RING_SIZE
Definition: skge.h:32
#define PFX
Definition: sis190.h:34
static void skge_rx_clean(struct skge_port *skge)
Definition: skge.c:378
static const int rxqaddr[]
Definition: skge.c:86
struct skge_element * to_clean
Definition: skge.h:2454
Definition: skge.h:2460
static void skge_qset(struct skge_port *skge, u16 q, const struct skge_element *e)
Definition: skge.c:1675
struct skge_ring rx_ring
Definition: skge.h:2501
#define RX_RING_SIZE
Definition: 3c515.c:87
static void skge_ramset(struct skge_hw *hw, u16 q, u32 start, size_t len)
Definition: skge.c:1644
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
static int skge_ring_alloc(struct skge_ring *ring, void *vaddr, u32 base, size_t num)
Definition: skge.c:311
void skge_free(struct net_device *dev)
Definition: skge.c:1692
void * mem
Definition: skge.h:2510
static void *__malloc malloc_dma(size_t size, size_t phys_align)
Allocate memory for DMA.
Definition: malloc.h:66
#define Q_ADDR(reg, offs)
Definition: skge.h:534
static const int txqaddr[]
Definition: skge.c:85
static void skge_rx_refill(struct net_device *dev)
Definition: skge.c:1962
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
static void skge_led(struct skge_port *skge, enum led_mode mode)
Definition: skge.c:133
#define NUM_TX_DESC
Definition: igbvf.h:280
struct skge_element * to_use
Definition: skge.h:2455
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
uint32_t u32
Definition: stdint.h:23
static void genesis_mac_init(struct skge_hw *hw, int port)
Definition: skge.c:852
#define DBG2(...)
Definition: compiler.h:515
void * memset(void *dest, int character, size_t len) __nonnull
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References assert(), B0_IMSK, CHIP_ID_GENESIS, CSR_IRQ_CL_F, CSR_START, DBG, DBG2, skge_hw::dev, skge_port::dma, EINVAL, ENOMEM, genesis_mac_init(), skge_port::hw, LED_MODE_ON, malloc_dma(), skge_port::mem, memset(), net_device::name, netdev_priv(), NUM_RX_DESC, NUM_TX_DESC, PFX, port, skge_port::port, portmask, Q_ADDR, Q_CSR, RING_SIZE, skge_port::rx_ring, RX_RING_SIZE, rxqaddr, skge_free(), skge_led(), skge_qset(), skge_ramset(), SKGE_RING_ALIGN, skge_ring_alloc(), skge_rx_clean(), skge_rx_refill(), skge_write32(), skge_write8(), skge_ring::to_clean, skge_ring::to_use, skge_port::tx_ring, txqaddr, virt_to_bus(), wmb(), and yukon_mac_init().

◆ skge_down()

static void skge_down ( struct net_device dev)
static

Definition at line 1790 of file skge.c.

1791 {
1792  struct skge_port *skge = netdev_priv(dev);
1793  struct skge_hw *hw = skge->hw;
1794  int port = skge->port;
1795 
1796  if (skge->mem == NULL)
1797  return;
1798 
1799  DBG2(PFX "%s: disabling interface\n", dev->name);
1800 
1801  if (hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC)
1802  skge->use_xm_link_timer = 0;
1803 
1805 
1806  hw->intr_mask &= ~portmask[port];
1807  skge_write32(hw, B0_IMSK, hw->intr_mask);
1808 
1809  skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF);
1810  if (hw->chip_id == CHIP_ID_GENESIS)
1811  genesis_stop(skge);
1812  else
1813  yukon_stop(skge);
1814 
1815  /* Stop transmitter */
1819 
1820 
1821  /* Disable Force Sync bit and Enable Alloc bit */
1824 
1825  /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1828 
1829  /* Reset PCI FIFO */
1832 
1833  /* Reset the RAM Buffer async Tx queue */
1835 
1836  skge_rx_stop(hw, port);
1837 
1838  if (hw->chip_id == CHIP_ID_GENESIS) {
1841  } else {
1844  }
1845 
1846  skge_led(skge, LED_MODE_OFF);
1847 
1848  skge_tx_clean(dev);
1849 
1850  skge_rx_clean(skge);
1851 
1852  skge_free(dev);
1853  return;
1854 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
int port
Definition: skge.h:2498
static const u32 portmask[]
Definition: skge.c:87
struct net_device * dev[2]
Definition: skge.h:2464
Definition: skge.h:560
int use_xm_link_timer
Definition: skge.h:2512
static void yukon_stop(struct skge_port *skge)
Definition: skge.c:1492
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:186
Definition: hw.c:16
Definition: skge.h:523
Definition: skge.h:496
struct skge_hw * hw
Definition: skge.h:2496
Definition: skge.h:550
#define RB_ADDR(offs, queue)
Definition: skge.h:590
Definition: skge.h:82
u8 port
Port number.
Definition: CIB_PRM.h:31
#define PFX
Definition: sis190.h:34
static void skge_rx_clean(struct skge_port *skge)
Definition: skge.c:378
Definition: skge.h:2460
Definition: skge.h:782
#define SK_REG(port, reg)
Definition: skge.h:2548
Definition: skge.h:562
static void skge_rx_stop(struct skge_hw *hw, int port)
Definition: skge.c:1782
static void genesis_stop(struct skge_port *skge)
Definition: skge.c:998
Definition: skge.h:719
static void skge_tx_clean(struct net_device *dev)
Definition: skge.c:1909
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
void skge_free(struct net_device *dev)
Definition: skge.c:1692
void * mem
Definition: skge.h:2510
#define Q_ADDR(reg, offs)
Definition: skge.h:534
static const int txqaddr[]
Definition: skge.c:85
#define CSR_SET_RESET
Definition: skge.h:790
static void skge_led(struct skge_port *skge, enum led_mode mode)
Definition: skge.c:133
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
#define DBG2(...)
Definition: compiler.h:515
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References B0_IMSK, CHIP_ID_GENESIS, CSR_SET_RESET, CSR_STOP, DBG2, skge_hw::dev, genesis_stop(), GMF_RST_SET, skge_port::hw, LED_MODE_OFF, LED_OFF, LNK_LED_REG, skge_port::mem, MFF_RST_SET, net_device::name, netdev_link_down(), netdev_priv(), NULL, PFX, port, skge_port::port, portmask, Q_ADDR, Q_CSR, Q_XA1, Q_XA2, RB_ADDR, RB_CTRL, RB_DIS_OP_MD, RB_RST_SET, RX_GMF_CTRL_T, RX_MFF_CTRL2, SK_PHY_XMAC, SK_REG, skge_free(), skge_led(), skge_rx_clean(), skge_rx_stop(), skge_tx_clean(), skge_write32(), skge_write8(), TX_GMF_CTRL_T, TX_MFF_CTRL2, TXA_CTRL, TXA_DIS_ALLOC, TXA_DIS_FSYNC, TXA_ITI_INI, TXA_LIM_INI, TXA_STOP_RC, txqaddr, skge_port::use_xm_link_timer, and yukon_stop().

◆ skge_tx_clean()

static void skge_tx_clean ( struct net_device dev)
static

Definition at line 1909 of file skge.c.

1910 {
1911  struct skge_port *skge = netdev_priv(dev);
1912  struct skge_element *e;
1913 
1914  for (e = skge->tx_ring.to_clean; e != skge->tx_ring.to_use; e = e->next) {
1915  struct skge_tx_desc *td = e->desc;
1916  td->control = 0;
1917  }
1918 
1919  skge->tx_ring.to_clean = e;
1920 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
struct skge_element * next
Definition: skge.h:2448
void * desc
Definition: skge.h:2449
struct skge_ring tx_ring
Definition: skge.h:2500
struct skge_element * to_clean
Definition: skge.h:2454
struct skge_element * to_use
Definition: skge.h:2455
u32 control
Definition: skge.h:2436

References skge_tx_desc::control, skge_element::desc, netdev_priv(), skge_element::next, skge_ring::to_clean, skge_ring::to_use, and skge_port::tx_ring.

Referenced by skge_down().

◆ xm_phy_write()

static int xm_phy_write ( struct skge_hw hw,
int  port,
u16  reg,
u16  val 
)
static

Definition at line 458 of file skge.c.

459 {
460  int i;
461 
462  xm_write16(hw, port, XM_PHY_ADDR, reg | hw->phy_addr);
463  for (i = 0; i < PHY_RETRIES; i++) {
465  goto ready;
466  udelay(1);
467  }
468  return -EIO;
469 
470  ready:
472  for (i = 0; i < PHY_RETRIES; i++) {
474  return 0;
475  udelay(1);
476  }
477  return -ETIMEDOUT;
478 }
static u16 xm_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2560
static void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2571
#define PHY_RETRIES
Definition: skge.h:28
Definition: hw.c:16
u8 port
Port number.
Definition: CIB_PRM.h:31
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
static unsigned int unsigned int reg
Definition: intel.h:245
void __asmcall int val
Definition: setjmp.h:28
#define EIO
Input/output error.
Definition: errno.h:433
#define ETIMEDOUT
Connection timed out.
Definition: errno.h:669

References EIO, ETIMEDOUT, PHY_RETRIES, port, reg, udelay(), val, XM_MMU_CMD, XM_MMU_PHY_BUSY, XM_PHY_ADDR, XM_PHY_DATA, xm_read16(), and xm_write16().

Referenced by bcom_phy_init(), bcom_phy_intr(), genesis_link_up(), skge_led(), and xm_phy_init().

◆ gm_phy_write()

static int gm_phy_write ( struct skge_hw hw,
int  port,
u16  reg,
u16  val 
)
static

Definition at line 1159 of file skge.c.

1160 {
1161  int i;
1162 
1165  GM_SMI_CT_PHY_AD(hw->phy_addr) | GM_SMI_CT_REG_AD(reg));
1166  for (i = 0; i < PHY_RETRIES; i++) {
1167  udelay(1);
1168 
1170  return 0;
1171  }
1172 
1173  DBG(PFX "%s: phy write timeout port %x reg %x val %x\n",
1174  hw->dev[port]->name,
1175  port, reg, val);
1176  return -EIO;
1177 }
static void gma_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2607
#define GM_SMI_CT_PHY_AD(x)
Definition: skge.h:1869
#define PHY_RETRIES
Definition: skge.h:28
Definition: hw.c:16
u8 port
Port number.
Definition: CIB_PRM.h:31
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
#define PFX
Definition: sis190.h:34
static unsigned int unsigned int reg
Definition: intel.h:245
void __asmcall int val
Definition: setjmp.h:28
static u16 gma_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2596
#define EIO
Input/output error.
Definition: errno.h:433
#define GM_SMI_CT_REG_AD(x)
Definition: skge.h:1870
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498

References DBG, EIO, GM_SMI_CT_BUSY, GM_SMI_CT_PHY_AD, GM_SMI_CT_REG_AD, GM_SMI_CTRL, GM_SMI_DATA, gma_read16(), gma_write16(), PFX, PHY_RETRIES, port, reg, udelay(), and val.

Referenced by skge_led(), yukon_init(), yukon_link_down(), yukon_link_up(), yukon_reset(), and yukon_suspend().

◆ yukon_init()

static void yukon_init ( struct skge_hw hw,
int  port 
)
static

Definition at line 1210 of file skge.c.

1211 {
1212  struct skge_port *skge = netdev_priv(hw->dev[port]);
1213  u16 ctrl, ct1000, adv;
1214 
1215  if (skge->autoneg == AUTONEG_ENABLE) {
1217 
1218  ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
1221 
1222  ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
1223 
1225  }
1226 
1228  if (skge->autoneg == AUTONEG_DISABLE)
1229  ctrl &= ~PHY_CT_ANE;
1230 
1231  ctrl |= PHY_CT_RESET;
1233 
1234  ctrl = 0;
1235  ct1000 = 0;
1236  adv = PHY_AN_CSMA;
1237 
1238  if (skge->autoneg == AUTONEG_ENABLE) {
1239  if (hw->copper) {
1241  ct1000 |= PHY_M_1000C_AFD;
1243  ct1000 |= PHY_M_1000C_AHD;
1245  adv |= PHY_M_AN_100_FD;
1247  adv |= PHY_M_AN_100_HD;
1249  adv |= PHY_M_AN_10_FD;
1251  adv |= PHY_M_AN_10_HD;
1252 
1253  /* Set Flow-control capabilities */
1254  adv |= phy_pause_map[skge->flow_control];
1255  } else {
1257  adv |= PHY_M_AN_1000X_AFD;
1259  adv |= PHY_M_AN_1000X_AHD;
1260 
1261  adv |= fiber_pause_map[skge->flow_control];
1262  }
1263 
1264  /* Restart Auto-negotiation */
1266  } else {
1267  /* forced speed/duplex settings */
1268  ct1000 = PHY_M_1000C_MSE;
1269 
1270  if (skge->duplex == DUPLEX_FULL)
1271  ctrl |= PHY_CT_DUP_MD;
1272 
1273  switch (skge->speed) {
1274  case SPEED_1000:
1275  ctrl |= PHY_CT_SP1000;
1276  break;
1277  case SPEED_100:
1278  ctrl |= PHY_CT_SP100;
1279  break;
1280  }
1281 
1282  ctrl |= PHY_CT_RESET;
1283  }
1284 
1286 
1289 
1290  /* Enable phy interrupt on autonegotiation complete (or link up) */
1291  if (skge->autoneg == AUTONEG_ENABLE)
1293  else
1295 }
#define SPEED_1000
Definition: atl1e.h:52
uint16_t u16
Definition: stdint.h:21
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
u32 advertising
Definition: skge.h:2508
#define ADVERTISED_100baseT_Half
Definition: bnx2.h:44
#define AUTONEG_ENABLE
Definition: bnx2.h:4584
u8 duplex
Definition: skge.h:2506
Definition: hw.c:16
#define ADVERTISED_1000baseT_Half
Definition: bnx2.h:46
#define SPEED_100
Definition: atl1e.h:51
u8 port
Port number.
Definition: CIB_PRM.h:31
static const u16 fiber_pause_map[]
Definition: skge.c:544
#define PHY_M_EC_M_DSC(x)
Definition: skge.h:1504
#define PHY_M_EC_S_DSC(x)
Definition: skge.h:1505
#define DUPLEX_FULL
Definition: bnx2.h:111
u8 autoneg
Definition: skge.h:2505
static u16 gm_phy_read(struct skge_hw *hw, int port, u16 reg)
Definition: skge.c:1199
enum pause_control flow_control
Definition: skge.h:2503
static unsigned int ctrl
Definition: intel.h:270
static int gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:1159
#define ADVERTISED_10baseT_Full
Definition: bnx2.h:43
#define AUTONEG_DISABLE
Definition: bnx2.h:4583
#define PHY_M_EC_MAC_S(x)
Definition: skge.h:1506
u16 speed
Definition: skge.h:2507
#define ADVERTISED_1000baseT_Full
Definition: bnx2.h:47
#define ADVERTISED_100baseT_Full
Definition: bnx2.h:45
#define ADVERTISED_10baseT_Half
Definition: bnx2.h:42
static const u16 phy_pause_map[]
Definition: skge.c:536

References ADVERTISED_1000baseT_Full, ADVERTISED_1000baseT_Half, ADVERTISED_100baseT_Full, ADVERTISED_100baseT_Half, ADVERTISED_10baseT_Full, ADVERTISED_10baseT_Half, skge_port::advertising, skge_port::autoneg, AUTONEG_DISABLE, AUTONEG_ENABLE, ctrl, skge_port::duplex, DUPLEX_FULL, fiber_pause_map, skge_port::flow_control, gm_phy_read(), gm_phy_write(), MAC_TX_CLK_25_MHZ, netdev_priv(), PHY_AN_CSMA, PHY_CT_ANE, PHY_CT_DUP_MD, PHY_CT_RE_CFG, PHY_CT_RESET, PHY_CT_SP100, PHY_CT_SP1000, PHY_M_1000C_AFD, PHY_M_1000C_AHD, PHY_M_1000C_MSE, PHY_M_AN_1000X_AFD, PHY_M_AN_1000X_AHD, PHY_M_AN_100_FD, PHY_M_AN_100_HD, PHY_M_AN_10_FD, PHY_M_AN_10_HD, PHY_M_EC_M_DSC, PHY_M_EC_M_DSC_MSK, PHY_M_EC_MAC_S, PHY_M_EC_MAC_S_MSK, PHY_M_EC_S_DSC, PHY_M_EC_S_DSC_MSK, PHY_M_IS_AN_MSK, PHY_M_IS_DEF_MSK, PHY_MARV_1000T_CTRL, PHY_MARV_AUNE_ADV, PHY_MARV_CTRL, PHY_MARV_EXT_CTRL, PHY_MARV_INT_MASK, phy_pause_map, port, skge_port::speed, SPEED_100, and SPEED_1000.

Referenced by yukon_link_down(), and yukon_mac_init().

◆ genesis_mac_init()

static void genesis_mac_init ( struct skge_hw hw,
int  port 
)
static

Definition at line 852 of file skge.c.

853 {
854  struct net_device *dev = hw->dev[port];
855  struct skge_port *skge = netdev_priv(dev);
856  int i;
857  u32 r;
858  const u8 zero[6] = { 0 };
859 
860  for (i = 0; i < 10; i++) {
864  goto reset_ok;
865  udelay(1);
866  }
867 
868  DBG(PFX "%s: genesis reset failed\n", dev->name);
869 
870  reset_ok:
871  /* Unreset the XMAC. */
873 
874  /*
875  * Perform additional initialization for external PHYs,
876  * namely for the 1000baseTX cards that use the XMAC's
877  * GMII mode.
878  */
879  if (hw->phy_type != SK_PHY_XMAC) {
880  /* Take external Phy out of reset */
881  r = skge_read32(hw, B2_GP_IO);
882  if (port == 0)
883  r |= GP_DIR_0|GP_IO_0;
884  else
885  r |= GP_DIR_2|GP_IO_2;
886 
888 
889  /* Enable GMII interface */
891  }
892 
893 
894  switch(hw->phy_type) {
895  case SK_PHY_XMAC:
896  xm_phy_init(skge);
897  break;
898  case SK_PHY_BCOM:
899  bcom_phy_init(skge);
901  }
902 
903  /* Set Station Address */
904  xm_outaddr(hw, port, XM_SA, dev->ll_addr);
905 
906  /* We don't use match addresses so clear */
907  for (i = 1; i < 16; i++)
908  xm_outaddr(hw, port, XM_EXM(i), zero);
909 
910  /* Clear MIB counters */
913  /* Clear two times according to Errata #3 */
916 
917  /* configure Rx High Water Mark (XM_RX_HI_WM) */
918  xm_write16(hw, port, XM_RX_HI_WM, 1450);
919 
920  /* We don't need the FCS appended to the packet. */
922 
923  if (skge->duplex == DUPLEX_HALF) {
924  /*
925  * If in manual half duplex mode the other side might be in
926  * full duplex mode, so ignore if a carrier extension is not seen
927  * on frames received
928  */
929  r |= XM_RX_DIS_CEXT;
930  }
932 
933  /* We want short frames padded to 60 bytes. */
935 
936  xm_write16(hw, port, XM_TX_THR, 512);
937 
938  /*
939  * Enable the reception of all error frames. This is is
940  * a necessary evil due to the design of the XMAC. The
941  * XMAC's receive FIFO is only 8K in size, however jumbo
942  * frames can be up to 9000 bytes in length. When bad
943  * frame filtering is enabled, the XMAC's RX FIFO operates
944  * in 'store and forward' mode. For this to work, the
945  * entire frame has to fit into the FIFO, but that means
946  * that jumbo frames larger than 8192 bytes will be
947  * truncated. Disabling all bad frame filtering causes
948  * the RX FIFO to operate in streaming mode, in which
949  * case the XMAC will start transferring frames out of the
950  * RX FIFO as soon as the FIFO threshold is reached.
951  */
953 
954 
955  /*
956  * Initialize the Receive Counter Event Mask (XM_RX_EV_MSK)
957  * - Enable all bits excepting 'Octets Rx OK Low CntOv'
958  * and 'Octets Rx OK Hi Cnt Ov'.
959  */
961 
962  /*
963  * Initialize the Transmit Counter Event Mask (XM_TX_EV_MSK)
964  * - Enable all bits excepting 'Octets Tx OK Low CntOv'
965  * and 'Octets Tx OK Hi Cnt Ov'.
966  */
968 
969  /* Configure MAC arbiter */
971 
972  /* configure timeout values */
977 
982 
983  /* Configure Rx MAC FIFO */
987 
988  /* Configure Tx MAC FIFO */
992 
993  /* enable timeout timers */
995  (port == 0) ? PA_ENA_TO_TX1 : PA_ENA_TO_TX2);
996 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
static void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2571
static void xm_write32(const struct skge_hw *hw, int port, int r, u32 v)
Definition: skge.h:2565
u8 duplex
Definition: skge.h:2506
uint32_t zero
Must be zero.
Definition: ntlm.h:24
static void bcom_check_link(struct skge_hw *hw, int port)
Definition: skge.c:553
Definition: hw.c:16
static u32 skge_read32(const struct skge_hw *hw, int reg)
Definition: skge.h:2517
Definition: skge.h:367
u8 port
Port number.
Definition: CIB_PRM.h:31
Definition: skge.h:2100
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
static void bcom_phy_init(struct skge_port *skge)
Definition: skge.c:621
Definition: skge.h:2094
#define PFX
Definition: sis190.h:34
static void skge_write16(const struct skge_hw *hw, int reg, u16 val)
Definition: skge.h:2537
#define XMR_DEF_MSK
Definition: skge.h:2386
A network device.
Definition: netdevice.h:348
static void xm_outaddr(const struct skge_hw *hw, int port, int reg, const u8 *addr)
Definition: skge.h:2585
#define SK_REG(port, reg)
Definition: skge.h:2548
Definition: skge.h:369
struct device * dev
Underlying hardware device.
Definition: netdevice.h:360
#define XM_EXM(reg)
Definition: skge.h:2089
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
#define XM_DEF_MODE
Definition: skge.h:2337
Definition: skge.h:128
Definition: skge.h:358
static void xm_phy_init(struct skge_port *skge)
Definition: skge.c:718
Definition: skge.h:356
uint8_t ll_addr[MAX_LL_ADDR_LEN]
Link-layer address.
Definition: netdevice.h:381
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
uint8_t u8
Definition: stdint.h:19
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
uint32_t u32
Definition: stdint.h:23
static u16 skge_read16(const struct skge_hw *hw, int reg)
Definition: skge.h:2522
#define DUPLEX_HALF
Definition: bnx2.h:110
#define XMT_DEF_MSK
Definition: skge.h:2420
static const uint8_t r[3][4]
MD4 shift amounts.
Definition: md4.c:54
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References B2_GP_IO, B3_MA_RCINI_RX1, B3_MA_RCINI_RX2, B3_MA_RCINI_TX1, B3_MA_RCINI_TX2, B3_MA_TO_CTRL, B3_MA_TOINI_RX1, B3_MA_TOINI_RX2, B3_MA_TOINI_TX1, B3_MA_TOINI_TX2, B3_PA_CTRL, bcom_check_link(), bcom_phy_init(), DBG, net_device::dev, skge_port::duplex, DUPLEX_HALF, GP_DIR_0, GP_DIR_2, GP_IO_0, GP_IO_2, net_device::ll_addr, MA_RST_CLR, MFF_CLR_MAC_RST, MFF_ENA_OP_MD, MFF_ENA_TIM_PAT, MFF_RST_CLR, MFF_SET_MAC_RST, MFF_TX_CTRL_DEF, net_device::name, netdev_priv(), PA_ENA_TO_TX1, PA_ENA_TO_TX2, PFX, port, r, RX_MFF_CTRL1, RX_MFF_CTRL2, SK_PHY_BCOM, SK_PHY_XMAC, SK_REG, skge_read16(), skge_read32(), skge_write16(), skge_write32(), skge_write8(), TX_MFF_CTRL1, TX_MFF_CTRL2, udelay(), XM_DEF_MODE, XM_EXM, XM_HW_CFG, XM_HW_GMII_MD, XM_MODE, xm_outaddr(), xm_phy_init(), XM_RX_CMD, XM_RX_DIS_CEXT, XM_RX_EV_MSK, XM_RX_HI_WM, XM_RX_LENERR_OK, XM_RX_STRIP_FCS, XM_SA, XM_SC_CLR_RXC, XM_SC_CLR_TXC, XM_STAT_CMD, XM_TX_AUTO_PAD, XM_TX_CMD, XM_TX_EV_MSK, XM_TX_THR, xm_write16(), xm_write32(), XMR_DEF_MSK, XMT_DEF_MSK, and zero.

Referenced by skge_up().

◆ genesis_link_up()

static void genesis_link_up ( struct skge_port skge)
static

Definition at line 1045 of file skge.c.

1046 {
1047  struct skge_hw *hw = skge->hw;
1048  int port = skge->port;
1049  u16 cmd, msk;
1050  u32 mode;
1051 
1053 
1054  /*
1055  * enabling pause frame reception is required for 1000BT
1056  * because the XMAC is not reset if the link is going down
1057  */
1058  if (skge->flow_status == FLOW_STAT_NONE ||
1060  /* Disable Pause Frame Reception */
1061  cmd |= XM_MMU_IGN_PF;
1062  else
1063  /* Enable Pause Frame Reception */
1064  cmd &= ~XM_MMU_IGN_PF;
1065 
1067 
1068  mode = xm_read32(hw, port, XM_MODE);
1069  if (skge->flow_status== FLOW_STAT_SYMMETRIC ||
1070  skge->flow_status == FLOW_STAT_LOC_SEND) {
1071  /*
1072  * Configure Pause Frame Generation
1073  * Use internal and external Pause Frame Generation.
1074  * Sending pause frames is edge triggered.
1075  * Send a Pause frame with the maximum pause time if
1076  * internal oder external FIFO full condition occurs.
1077  * Send a zero pause time frame to re-start transmission.
1078  */
1079  /* XM_PAUSE_DA = '010000C28001' (default) */
1080  /* XM_MAC_PTIME = 0xffff (maximum) */
1081  /* remember this value is defined in big endian (!) */
1082  xm_write16(hw, port, XM_MAC_PTIME, 0xffff);
1083 
1084  mode |= XM_PAUSE_MODE;
1086  } else {
1087  /*
1088  * disable pause frame generation is required for 1000BT
1089  * because the XMAC is not reset if the link is going down
1090  */
1091  /* Disable Pause Mode in Mode Register */
1092  mode &= ~XM_PAUSE_MODE;
1093 
1095  }
1096 
1097  xm_write32(hw, port, XM_MODE, mode);
1098 
1099  /* Turn on detection of Tx underrun */
1100  msk = xm_read16(hw, port, XM_IMSK);
1101  msk &= ~XM_IS_TXF_UR;
1102  xm_write16(hw, port, XM_IMSK, msk);
1103 
1104  xm_read16(hw, port, XM_ISRC);
1105 
1106  /* get MMU Command Reg. */
1108  if (hw->phy_type != SK_PHY_XMAC && skge->duplex == DUPLEX_FULL)
1109  cmd |= XM_MMU_GMII_FD;
1110 
1111  /*
1112  * Workaround BCOM Errata (#10523) for all BCom Phys
1113  * Enable Power Management after link up
1114  */
1115  if (hw->phy_type == SK_PHY_BCOM) {
1118  & ~PHY_B_AC_DIS_PM);
1120  }
1121 
1122  /* enable Rx/Tx */
1125  skge_link_up(skge);
1126 }
#define XM_PAUSE_MODE
Definition: skge.h:2336
uint16_t u16
Definition: stdint.h:21
static u16 xm_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2560
int port
Definition: skge.h:2498
static void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2571
static void xm_write32(const struct skge_hw *hw, int port, int r, u32 v)
Definition: skge.h:2565
#define PHY_B_DEF_MSK
Definition: skge.h:1328
u8 duplex
Definition: skge.h:2506
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
u8 port
Port number.
Definition: CIB_PRM.h:31
enum pause_status flow_status
Definition: skge.h:2504
static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:458
static u32 xm_read32(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2552
Definition: skge.h:2100
#define DUPLEX_FULL
Definition: bnx2.h:111
static void skge_write16(const struct skge_hw *hw, int reg, u16 val)
Definition: skge.h:2537
static void skge_link_up(struct skge_port *skge)
Definition: skge.c:394
Definition: skge.h:2460
#define SK_REG(port, reg)
Definition: skge.h:2548
static u16 xm_phy_read(struct skge_hw *hw, int port, u16 reg)
Definition: skge.c:449
Definition: skge.h:2076
struct golan_eqe_cmd cmd
Definition: CIB_PRM.h:29
Definition: skge.h:2075
uint32_t u32
Definition: stdint.h:23

References cmd, skge_port::duplex, DUPLEX_FULL, FLOW_STAT_LOC_SEND, FLOW_STAT_NONE, FLOW_STAT_SYMMETRIC, skge_port::flow_status, skge_port::hw, MFF_DIS_PAUSE, MFF_ENA_PAUSE, PHY_B_AC_DIS_PM, PHY_B_DEF_MSK, PHY_BCOM_AUX_CTRL, PHY_BCOM_INT_MASK, port, skge_port::port, RX_MFF_CTRL1, SK_PHY_BCOM, SK_PHY_XMAC, SK_REG, skge_link_up(), skge_write16(), XM_IMSK, XM_IS_TXF_UR, XM_ISRC, XM_MAC_PTIME, XM_MMU_CMD, XM_MMU_ENA_RX, XM_MMU_ENA_TX, XM_MMU_GMII_FD, XM_MMU_IGN_PF, XM_MODE, XM_PAUSE_MODE, xm_phy_read(), xm_phy_write(), xm_read16(), xm_read32(), xm_write16(), and xm_write32().

Referenced by bcom_check_link(), and xm_check_link().

◆ skge_phyirq()

static void skge_phyirq ( struct skge_hw hw)
static

Definition at line 2082 of file skge.c.

2083 {
2084  int port;
2085 
2086  for (port = 0; port < hw->ports; port++) {
2087  struct net_device *dev = hw->dev[port];
2088  struct skge_port *skge = netdev_priv(dev);
2089 
2090  if (hw->chip_id != CHIP_ID_GENESIS)
2091  yukon_phy_intr(skge);
2092  else if (hw->phy_type == SK_PHY_BCOM)
2093  bcom_phy_intr(skge);
2094  }
2095 
2096  hw->intr_mask |= IS_EXT_REG;
2097  skge_write32(hw, B0_IMSK, hw->intr_mask);
2099 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
static void yukon_phy_intr(struct skge_port *skge)
Definition: skge.c:1567
Definition: hw.c:16
static u32 skge_read32(const struct skge_hw *hw, int reg)
Definition: skge.h:2517
Definition: skge.h:82
u8 port
Port number.
Definition: CIB_PRM.h:31
A network device.
Definition: netdevice.h:348
struct device * dev
Underlying hardware device.
Definition: netdevice.h:360
static void bcom_phy_intr(struct skge_port *skge)
Definition: skge.c:1129
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532

References B0_IMSK, bcom_phy_intr(), CHIP_ID_GENESIS, net_device::dev, IS_EXT_REG, netdev_priv(), port, SK_PHY_BCOM, skge_read32(), skge_write32(), and yukon_phy_intr().

Referenced by skge_poll().

◆ skge_poll()

static void skge_poll ( struct net_device dev)
static

Definition at line 2051 of file skge.c.

2052 {
2053  struct skge_port *skge = netdev_priv(dev);
2054  struct skge_hw *hw = skge->hw;
2055  u32 status;
2056 
2057  /* reading this register ACKs interrupts */
2059 
2060  /* Link event? */
2061  if (status & IS_EXT_REG) {
2062  skge_phyirq(hw);
2063  if (skge->use_xm_link_timer)
2064  xm_link_timer(skge);
2065  }
2066 
2067  skge_tx_done(dev);
2068 
2070 
2071  skge_rx_done(dev);
2072 
2073  /* restart receiver */
2074  wmb();
2076 
2078 
2079  return;
2080 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
int port
Definition: skge.h:2498
wmb()
static void xm_link_timer(struct skge_port *skge)
Definition: skge.c:827
struct net_device * dev[2]
Definition: skge.h:2464
int use_xm_link_timer
Definition: skge.h:2512
static void skge_phyirq(struct skge_hw *hw)
Definition: skge.c:2082
Definition: hw.c:16
Definition: skge.h:523
struct skge_hw * hw
Definition: skge.h:2496
static u32 skge_read32(const struct skge_hw *hw, int reg)
Definition: skge.h:2517
uint8_t status
Status.
Definition: ena.h:16
Definition: skge.h:82
static void skge_tx_done(struct net_device *dev)
Definition: skge.c:1940
static const int rxqaddr[]
Definition: skge.c:86
Definition: skge.h:2460
#define Q_ADDR(reg, offs)
Definition: skge.h:534
static void skge_rx_done(struct net_device *dev)
Definition: skge.c:2004
uint32_t u32
Definition: stdint.h:23
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References B0_IMSK, B0_SP_ISRC, CSR_IRQ_CL_F, CSR_START, skge_hw::dev, skge_port::hw, IS_EXT_REG, netdev_priv(), skge_port::port, Q_ADDR, Q_CSR, rxqaddr, skge_phyirq(), skge_read32(), skge_rx_done(), skge_tx_done(), skge_write8(), status, skge_port::use_xm_link_timer, wmb(), and xm_link_timer().

◆ skge_xmit_frame()

static int skge_xmit_frame ( struct net_device dev,
struct io_buffer iob 
)
static

Definition at line 1863 of file skge.c.

1864 {
1865  struct skge_port *skge = netdev_priv(dev);
1866  struct skge_hw *hw = skge->hw;
1867  struct skge_element *e;
1868  struct skge_tx_desc *td;
1869  u32 control, len;
1870  u64 map;
1871 
1872  if (skge_tx_avail(&skge->tx_ring) < 1)
1873  return -EBUSY;
1874 
1875  e = skge->tx_ring.to_use;
1876  td = e->desc;
1877  assert(!(td->control & BMU_OWN));
1878  e->iob = iob;
1879  len = iob_len(iob);
1880  map = virt_to_bus(iob->data);
1881 
1882  td->dma_lo = map;
1883  td->dma_hi = map >> 32;
1884 
1885  control = BMU_CHECK;
1886 
1888  /* Make sure all the descriptors written */
1889  wmb();
1890  td->control = BMU_OWN | BMU_SW | BMU_STF | control | len;
1891  wmb();
1892 
1894 
1895  DBGIO(PFX "%s: tx queued, slot %td, len %d\n",
1896  dev->name, e - skge->tx_ring.start, (unsigned int)len);
1897 
1898  skge->tx_ring.to_use = e->next;
1899  wmb();
1900 
1901  if (skge_tx_avail(&skge->tx_ring) <= 1) {
1902  DBG(PFX "%s: transmit queue full\n", dev->name);
1903  }
1904 
1905  return 0;
1906 }
u32 dma_lo
Definition: skge.h:2438
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
int port
Definition: skge.h:2498
wmb()
#define EBUSY
Device or resource busy.
Definition: errno.h:338
struct io_buffer * iob
Definition: skge.h:2450
Definition: skge.h:378
struct skge_element * next
Definition: skge.h:2448
void * desc
Definition: skge.h:2449
struct skge_ring tx_ring
Definition: skge.h:2500
Definition: hw.c:16
Definition: skge.h:523
struct skge_hw * hw
Definition: skge.h:2496
Definition: skge.h:377
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
struct skge_element * start
Definition: skge.h:2456
Definition: skge.h:376
uint64_t u64
Definition: stdint.h:25
#define PFX
Definition: sis190.h:34
#define DBGIO(...)
Definition: compiler.h:549
Definition: skge.h:2460
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:151
uint32_t control
Control.
Definition: myson.h:14
static int skge_tx_avail(const struct skge_ring *ring)
Definition: skge.c:1856
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
uint32_t len
Length.
Definition: ena.h:14
void * data
Start of data.
Definition: iobuf.h:44
#define Q_ADDR(reg, offs)
Definition: skge.h:534
Definition: skge.h:384
u32 dma_hi
Definition: skge.h:2439
static const int txqaddr[]
Definition: skge.c:85
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
struct skge_element * to_use
Definition: skge.h:2455
u32 control
Definition: skge.h:2436
uint32_t u32
Definition: stdint.h:23
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References assert(), BMU_CHECK, BMU_EOF, BMU_IRQ_EOF, BMU_OWN, BMU_STF, BMU_SW, control, skge_tx_desc::control, CSR_START, io_buffer::data, DBG, DBGIO, skge_element::desc, skge_tx_desc::dma_hi, skge_tx_desc::dma_lo, EBUSY, skge_port::hw, skge_element::iob, iob_len(), len, net_device::name, netdev_priv(), skge_element::next, PFX, skge_port::port, Q_ADDR, Q_CSR, skge_tx_avail(), skge_write8(), skge_ring::start, skge_ring::to_use, skge_port::tx_ring, txqaddr, virt_to_bus(), and wmb().

◆ skge_net_irq()

static void skge_net_irq ( struct net_device dev,
int  enable 
)
static

Definition at line 2447 of file skge.c.

2447  {
2448  struct skge_port *skge = netdev_priv(dev);
2449  struct skge_hw *hw = skge->hw;
2450 
2451  if (enable)
2452  hw->intr_mask |= portmask[skge->port];
2453  else
2454  hw->intr_mask &= ~portmask[skge->port];
2455  skge_write32(hw, B0_IMSK, hw->intr_mask);
2456 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
int port
Definition: skge.h:2498
static const u32 portmask[]
Definition: skge.c:87
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
Definition: skge.h:82
Definition: skge.h:2460
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532

References B0_IMSK, skge_port::hw, netdev_priv(), skge_port::port, portmask, and skge_write32().

◆ skge_rx_refill()

static void skge_rx_refill ( struct net_device dev)
static

Definition at line 1962 of file skge.c.

1963 {
1964  struct skge_port *skge = netdev_priv(dev);
1965  struct skge_ring *ring = &skge->rx_ring;
1966  struct skge_element *e;
1967  struct io_buffer *iob;
1968  struct skge_rx_desc *rd;
1969  u32 control;
1970  int i;
1971 
1972  for (i = 0; i < NUM_RX_DESC; i++) {
1973  e = ring->to_clean;
1974  rd = e->desc;
1975  iob = e->iob;
1976  control = rd->control;
1977 
1978  /* nothing to do here */
1979  if (iob || (control & BMU_OWN))
1980  continue;
1981 
1982  DBG2("refilling rx desc %zd: ", (ring->to_clean - ring->start));
1983 
1984  iob = alloc_iob(RX_BUF_SIZE);
1985  if (iob) {
1986  skge_rx_setup(skge, e, iob, RX_BUF_SIZE);
1987  } else {
1988  DBG("descr %zd: alloc_iob() failed\n",
1989  (ring->to_clean - ring->start));
1990  /* We pass the descriptor to the NIC even if the
1991  * allocation failed. The card will stop as soon as it
1992  * encounters a descriptor with the OWN bit set to 0,
1993  * thus never getting to the next descriptor that might
1994  * contain a valid io_buffer. This would effectively
1995  * stall the receive.
1996  */
1997  skge_rx_setup(skge, e, NULL, 0);
1998  }
1999 
2000  ring->to_clean = e->next;
2001  }
2002 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
struct io_buffer * iob
Definition: skge.h:2450
#define RX_BUF_SIZE
Definition: 3c90x.h:269
struct skge_element * next
Definition: skge.h:2448
void * desc
Definition: skge.h:2449
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:128
#define NUM_RX_DESC
Definition: igbvf.h:281
u32 control
Definition: skge.h:2423
struct skge_element * start
Definition: skge.h:2456
Definition: skge.h:376
struct skge_element * to_clean
Definition: skge.h:2454
uint32_t control
Control.
Definition: myson.h:14
struct skge_ring rx_ring
Definition: skge.h:2501
static void skge_rx_setup(struct skge_port *skge __unused, struct skge_element *e, struct io_buffer *iob, unsigned int bufsize)
Definition: skge.c:338
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
uint32_t u32
Definition: stdint.h:23
#define DBG2(...)
Definition: compiler.h:515
A persistent I/O buffer.
Definition: iobuf.h:32

References alloc_iob(), BMU_OWN, control, skge_rx_desc::control, DBG, DBG2, skge_element::desc, skge_element::iob, netdev_priv(), skge_element::next, NULL, NUM_RX_DESC, RX_BUF_SIZE, skge_port::rx_ring, skge_rx_setup(), skge_ring::start, and skge_ring::to_clean.

Referenced by skge_rx_done(), and skge_up().

◆ skge_supported_modes()

static u32 skge_supported_modes ( const struct skge_hw hw)
static

Definition at line 92 of file skge.c.

93 {
94  u32 supported;
95 
96  if (hw->copper) {
97  supported = SUPPORTED_10baseT_Half
104 
105  if (hw->chip_id == CHIP_ID_GENESIS)
106  supported &= ~(SUPPORTED_10baseT_Half
110 
111  else if (hw->chip_id == CHIP_ID_YUKON)
112  supported &= ~SUPPORTED_1000baseT_Half;
113  } else
116 
117  return supported;
118 }
#define SUPPORTED_1000baseT_Half
Definition: skge.h:62
#define SUPPORTED_Autoneg
Definition: skge.h:64
#define SUPPORTED_100baseT_Full
Definition: skge.h:61
Definition: hw.c:16
#define SUPPORTED_10baseT_Half
Definition: skge.h:58
#define SUPPORTED_TP
Definition: skge.h:65
#define SUPPORTED_10baseT_Full
Definition: skge.h:59
#define SUPPORTED_100baseT_Half
Definition: skge.h:60
#define SUPPORTED_FIBRE
Definition: skge.h:66
#define SUPPORTED_1000baseT_Full
Definition: skge.h:63
uint32_t u32
Definition: stdint.h:23

References CHIP_ID_GENESIS, CHIP_ID_YUKON, SUPPORTED_1000baseT_Full, SUPPORTED_1000baseT_Half, SUPPORTED_100baseT_Full, SUPPORTED_100baseT_Half, SUPPORTED_10baseT_Full, SUPPORTED_10baseT_Half, SUPPORTED_Autoneg, SUPPORTED_FIBRE, and SUPPORTED_TP.

Referenced by skge_devinit().

◆ hwkhz()

static u32 hwkhz ( const struct skge_hw hw)
inlinestatic

Definition at line 121 of file skge.c.

122 {
123  return (hw->chip_id == CHIP_ID_GENESIS) ? 53125 : 78125;
124 }
Definition: hw.c:16

References CHIP_ID_GENESIS.

Referenced by skge_usecs2clk().

◆ skge_usecs2clk()

static u32 skge_usecs2clk ( const struct skge_hw hw,
u32  usec 
)
inlinestatic

Definition at line 127 of file skge.c.

128 {
129  return hwkhz(hw) * usec / 1000;
130 }
static u32 hwkhz(const struct skge_hw *hw)
Definition: skge.c:121
Definition: hw.c:16

References hwkhz().

Referenced by skge_reset().

◆ skge_led()

static void skge_led ( struct skge_port skge,
enum led_mode  mode 
)
static

Definition at line 133 of file skge.c.

134 {
135  struct skge_hw *hw = skge->hw;
136  int port = skge->port;
137 
138  if (hw->chip_id == CHIP_ID_GENESIS) {
139  switch (mode) {
140  case LED_MODE_OFF:
141  if (hw->phy_type == SK_PHY_BCOM)
143  else {
146  }
150  break;
151 
152  case LED_MODE_ON:
155 
158 
159  break;
160 
161  case LED_MODE_TST:
165 
166  if (hw->phy_type == SK_PHY_BCOM)
168  else {
172  }
173 
174  }
175  } else {
176  switch (mode) {
177  case LED_MODE_OFF:
185  break;
186  case LED_MODE_ON:
192 
195  (skge->speed == SPEED_100 ?
197  break;
198  case LED_MODE_TST:
206  }
207  }
208 }
int port
Definition: skge.h:2498
#define PHY_M_LED_MO_RX(x)
Definition: skge.h:1567
#define PHY_M_LED_MO_DUP(x)
Definition: skge.h:1563
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
#define SPEED_100
Definition: atl1e.h:51
u8 port
Port number.
Definition: CIB_PRM.h:31
#define PHY_M_LED_BLINK_RT(x)
Definition: skge.h:1528
static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:458
#define PHY_M_LED_PULS_DUR(x)
Definition: skge.h:1527
Definition: skge.h:2460
#define SK_REG(port, reg)
Definition: skge.h:2548
#define PHY_M_LED_MO_1000(x)
Definition: skge.h:1566
Definition: skge.h:707
static int gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:1159
#define PHY_M_LED_MO_10(x)
Definition: skge.h:1564
#define PHY_M_LED_MO_100(x)
Definition: skge.h:1565
u16 speed
Definition: skge.h:2507
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References BLINK_84MS, CHIP_ID_GENESIS, gm_phy_write(), skge_port::hw, LED_MODE_OFF, LED_MODE_ON, LED_MODE_TST, LED_START, LED_T_OFF, LED_T_ON, LINKLED_LINKSYNC_ON, LINKLED_OFF, LINKLED_ON, LNK_LED_REG, MO_LED_OFF, MO_LED_ON, PHY_B_PEC_LED_OFF, PHY_B_PEC_LED_ON, PHY_BCOM_P_EXT_CTRL, PHY_M_LED_BLINK_RT, PHY_M_LED_MO_10, PHY_M_LED_MO_100, PHY_M_LED_MO_1000, PHY_M_LED_MO_DUP, PHY_M_LED_MO_RX, PHY_M_LED_PULS_DUR, PHY_M_LEDC_DP_CTRL, PHY_M_LEDC_TX_CTRL, PHY_MARV_LED_CTRL, PHY_MARV_LED_OVER, port, skge_port::port, PULS_170MS, RX_LED_CTRL, RX_LED_TST, RX_LED_VAL, SK_PHY_BCOM, SK_REG, skge_write32(), skge_write8(), skge_port::speed, SPEED_100, TX_LED_CTRL, TX_LED_TST, TX_LED_VAL, and xm_phy_write().

Referenced by skge_down(), and skge_up().

◆ skge_ring_alloc()

static int skge_ring_alloc ( struct skge_ring ring,
void *  vaddr,
u32  base,
size_t  num 
)
static

Definition at line 311 of file skge.c.

313 {
314  struct skge_tx_desc *d;
315  struct skge_element *e;
316  unsigned int i;
317 
318  ring->start = zalloc(num*sizeof(*e));
319  if (!ring->start)
320  return -ENOMEM;
321 
322  for (i = 0, e = ring->start, d = vaddr; i < num; i++, e++, d++) {
323  e->desc = d;
324  if (i == num - 1) {
325  e->next = ring->start;
326  d->next_offset = base;
327  } else {
328  e->next = e + 1;
329  d->next_offset = base + (i+1) * sizeof(*d);
330  }
331  }
332  ring->to_use = ring->to_clean = ring->start;
333 
334  return 0;
335 }
struct skge_element * next
Definition: skge.h:2448
void * desc
Definition: skge.h:2449
#define ENOMEM
Not enough space.
Definition: errno.h:534
struct skge_element * start
Definition: skge.h:2456
u32 next_offset
Definition: skge.h:2437
char unsigned long * num
Definition: xenstore.h:17
void * zalloc(size_t size)
Allocate cleared memory.
Definition: malloc.c:624
struct skge_element * to_clean
Definition: skge.h:2454
uint16_t base
Base address.
Definition: edd.h:14
struct skge_element * to_use
Definition: skge.h:2455

References base, skge_element::desc, ENOMEM, skge_element::next, skge_tx_desc::next_offset, num, skge_ring::start, skge_ring::to_clean, skge_ring::to_use, and zalloc().

Referenced by skge_up().

◆ skge_rx_setup()

static void skge_rx_setup ( struct skge_port *skge  __unused,
struct skge_element e,
struct io_buffer iob,
unsigned int  bufsize 
)
static

Definition at line 338 of file skge.c.

341 {
342  struct skge_rx_desc *rd = e->desc;
343  u64 map;
344 
345  map = ( iob != NULL ) ? virt_to_bus(iob->data) : 0;
346 
347  rd->dma_lo = map;
348  rd->dma_hi = map >> 32;
349  e->iob = iob;
350  rd->csum1_start = ETH_HLEN;
351  rd->csum2_start = ETH_HLEN;
352  rd->csum1 = 0;
353  rd->csum2 = 0;
354 
355  wmb();
356 
358 }
wmb()
struct io_buffer * iob
Definition: skge.h:2450
u16 csum1_start
Definition: skge.h:2432
void * desc
Definition: skge.h:2449
u32 control
Definition: skge.h:2423
Definition: skge.h:377
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define ETH_HLEN
Definition: if_ether.h:9
Definition: skge.h:376
u16 csum2_start
Definition: skge.h:2431
uint64_t u64
Definition: stdint.h:25
u32 dma_hi
Definition: skge.h:2426
u16 csum2
Definition: skge.h:2429
u16 csum1
Definition: skge.h:2430
void * data
Start of data.
Definition: iobuf.h:44
u32 dma_lo
Definition: skge.h:2425
uint8_t bufsize
Size of the packet, in bytes.
Definition: int13.h:12
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362

References BMU_IRQ_EOF, BMU_OWN, BMU_STF, BMU_TCP_CHECK, bufsize, skge_rx_desc::control, skge_rx_desc::csum1, skge_rx_desc::csum1_start, skge_rx_desc::csum2, skge_rx_desc::csum2_start, io_buffer::data, skge_element::desc, skge_rx_desc::dma_hi, skge_rx_desc::dma_lo, ETH_HLEN, skge_element::iob, NULL, virt_to_bus(), and wmb().

Referenced by skge_rx_refill().

◆ skge_rx_reuse()

static void skge_rx_reuse ( struct skge_element e,
unsigned int  size 
)
inlinestatic

Definition at line 364 of file skge.c.

365 {
366  struct skge_rx_desc *rd = e->desc;
367 
368  rd->csum2 = 0;
369  rd->csum2_start = ETH_HLEN;
370 
371  wmb();
372 
374 }
wmb()
void * desc
Definition: skge.h:2449
u32 control
Definition: skge.h:2423
Definition: skge.h:377
#define ETH_HLEN
Definition: if_ether.h:9
Definition: skge.h:376
u16 csum2_start
Definition: skge.h:2431
u16 csum2
Definition: skge.h:2429
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:16

References BMU_IRQ_EOF, BMU_OWN, BMU_STF, BMU_TCP_CHECK, skge_rx_desc::control, skge_rx_desc::csum2, skge_rx_desc::csum2_start, skge_element::desc, ETH_HLEN, size, and wmb().

◆ skge_rx_clean()

static void skge_rx_clean ( struct skge_port skge)
static

Definition at line 378 of file skge.c.

379 {
380  struct skge_ring *ring = &skge->rx_ring;
381  struct skge_element *e;
382 
383  e = ring->start;
384  do {
385  struct skge_rx_desc *rd = e->desc;
386  rd->control = 0;
387  if (e->iob) {
388  free_iob(e->iob);
389  e->iob = NULL;
390  }
391  } while ((e = e->next) != ring->start);
392 }
struct io_buffer * iob
Definition: skge.h:2450
void free_iob(struct io_buffer *iobuf)
Free I/O buffer.
Definition: iobuf.c:145
struct skge_element * next
Definition: skge.h:2448
void * desc
Definition: skge.h:2449
u32 control
Definition: skge.h:2423
struct skge_element * start
Definition: skge.h:2456
struct skge_ring rx_ring
Definition: skge.h:2501
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362

References skge_rx_desc::control, skge_element::desc, free_iob(), skge_element::iob, skge_element::next, NULL, skge_port::rx_ring, and skge_ring::start.

Referenced by skge_down(), and skge_up().

◆ skge_link_up()

static void skge_link_up ( struct skge_port skge)
static

Definition at line 394 of file skge.c.

395 {
396  skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG),
398 
399  netdev_link_up(skge->netdev);
400 
401  DBG2(PFX "%s: Link is up at %d Mbps, %s duplex\n",
402  skge->netdev->name, skge->speed,
403  skge->duplex == DUPLEX_FULL ? "full" : "half");
404 }
int port
Definition: skge.h:2498
u8 duplex
Definition: skge.h:2506
Definition: skge.h:718
struct skge_hw * hw
Definition: skge.h:2496
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:768
#define DUPLEX_FULL
Definition: bnx2.h:111
#define PFX
Definition: sis190.h:34
#define SK_REG(port, reg)
Definition: skge.h:2548
struct net_device * netdev
Definition: skge.h:2497
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
u16 speed
Definition: skge.h:2507
#define DBG2(...)
Definition: compiler.h:515
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References DBG2, skge_port::duplex, DUPLEX_FULL, skge_port::hw, LED_BLK_OFF, LED_ON, LED_SYNC_OFF, LNK_LED_REG, net_device::name, skge_port::netdev, netdev_link_up(), PFX, skge_port::port, SK_REG, skge_write8(), and skge_port::speed.

Referenced by genesis_link_up(), and yukon_link_up().

◆ skge_link_down()

static void skge_link_down ( struct skge_port skge)
static

Definition at line 406 of file skge.c.

407 {
408  skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF);
409  netdev_link_down(skge->netdev);
410 
411  DBG2(PFX "%s: Link is down.\n", skge->netdev->name);
412 }
int port
Definition: skge.h:2498
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:186
struct skge_hw * hw
Definition: skge.h:2496
#define PFX
Definition: sis190.h:34
#define SK_REG(port, reg)
Definition: skge.h:2548
struct net_device * netdev
Definition: skge.h:2497
Definition: skge.h:719
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
#define DBG2(...)
Definition: compiler.h:515
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References DBG2, skge_port::hw, LED_OFF, LNK_LED_REG, net_device::name, skge_port::netdev, netdev_link_down(), PFX, skge_port::port, SK_REG, and skge_write8().

Referenced by xm_link_down(), and yukon_link_down().

◆ xm_link_down()

static void xm_link_down ( struct skge_hw hw,
int  port 
)
static

Definition at line 415 of file skge.c.

416 {
417  struct net_device *dev = hw->dev[port];
418  struct skge_port *skge = netdev_priv(dev);
419 
421 
422  if (netdev_link_ok(dev))
423  skge_link_down(skge);
424 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
static void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2571
static void skge_link_down(struct skge_port *skge)
Definition: skge.c:406
Definition: hw.c:16
u8 port
Port number.
Definition: CIB_PRM.h:31
static int netdev_link_ok(struct net_device *netdev)
Check link state of network device.
Definition: netdevice.h:630
A network device.
Definition: netdevice.h:348
struct device * dev
Underlying hardware device.
Definition: netdevice.h:360
Definition: skge.h:2075

References net_device::dev, netdev_link_ok(), netdev_priv(), port, skge_link_down(), XM_IMSK, XM_IMSK_DISABLE, and xm_write16().

Referenced by bcom_check_link(), and xm_check_link().

◆ __xm_phy_read()

static int __xm_phy_read ( struct skge_hw hw,
int  port,
u16  reg,
u16 val 
)
static

Definition at line 426 of file skge.c.

427 {
428  int i;
429 
430  xm_write16(hw, port, XM_PHY_ADDR, reg | hw->phy_addr);
432 
433  if (hw->phy_type == SK_PHY_XMAC)
434  goto ready;
435 
436  for (i = 0; i < PHY_RETRIES; i++) {
438  goto ready;
439  udelay(1);
440  }
441 
442  return -ETIMEDOUT;
443  ready:
445 
446  return 0;
447 }
static u16 xm_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2560
static void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2571
#define PHY_RETRIES
Definition: skge.h:28
Definition: hw.c:16
u8 port
Port number.
Definition: CIB_PRM.h:31
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
static unsigned int unsigned int reg
Definition: intel.h:245
void __asmcall int val
Definition: setjmp.h:28
#define ETIMEDOUT
Connection timed out.
Definition: errno.h:669

References ETIMEDOUT, PHY_RETRIES, port, reg, SK_PHY_XMAC, udelay(), val, XM_MMU_CMD, XM_MMU_PHY_RDY, XM_PHY_ADDR, XM_PHY_DATA, xm_read16(), and xm_write16().

Referenced by xm_phy_read().

◆ xm_phy_read()

static u16 xm_phy_read ( struct skge_hw hw,
int  port,
u16  reg 
)
static

Definition at line 449 of file skge.c.

450 {
451  u16 v = 0;
452  if (__xm_phy_read(hw, port, reg, &v))
453  DBG(PFX "%s: phy read timed out\n",
454  hw->dev[port]->name);
455  return v;
456 }
uint16_t u16
Definition: stdint.h:21
Definition: hw.c:16
u8 port
Port number.
Definition: CIB_PRM.h:31
#define PFX
Definition: sis190.h:34
static unsigned int unsigned int reg
Definition: intel.h:245
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
static int __xm_phy_read(struct skge_hw *hw, int port, u16 reg, u16 *val)
Definition: skge.c:426

References __xm_phy_read(), DBG, PFX, port, and reg.

Referenced by bcom_check_link(), bcom_phy_init(), bcom_phy_intr(), genesis_link_up(), and xm_check_link().

◆ genesis_init()

static void genesis_init ( struct skge_hw hw)
static

Definition at line 480 of file skge.c.

481 {
482  /* set blink source counter */
485 
486  /* configure mac arbiter */
488 
489  /* configure mac arbiter timeout values */
494 
499 
500  /* configure packet arbiter timeout */
506 }
Definition: hw.c:16
static void skge_write16(const struct skge_hw *hw, int reg, u16 val)
Definition: skge.h:2537
#define SK_PKT_TO_MAX
Definition: skge.h:441
#define SK_FACT_53
Definition: skge.h:865
#define SK_BLK_DUR
Definition: skge.h:857
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
#define SK_MAC_TO_53
Definition: skge.h:439
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References B2_BSC_CTRL, B2_BSC_INI, B3_MA_RCINI_RX1, B3_MA_RCINI_RX2, B3_MA_RCINI_TX1, B3_MA_RCINI_TX2, B3_MA_TO_CTRL, B3_MA_TOINI_RX1, B3_MA_TOINI_RX2, B3_MA_TOINI_TX1, B3_MA_TOINI_TX2, B3_PA_CTRL, B3_PA_TOINI_RX1, B3_PA_TOINI_RX2, B3_PA_TOINI_TX1, B3_PA_TOINI_TX2, BSC_START, MA_RST_CLR, PA_RST_CLR, SK_BLK_DUR, SK_FACT_53, SK_MAC_TO_53, SK_PKT_TO_MAX, skge_write16(), skge_write32(), and skge_write8().

Referenced by skge_reset().

◆ genesis_reset()

static void genesis_reset ( struct skge_hw hw,
int  port 
)
static

Definition at line 508 of file skge.c.

509 {
510  const u8 zero[8] = { 0 };
511  u32 reg;
512 
514 
515  /* reset the statistics module */
518  xm_write32(hw, port, XM_MODE, 0); /* clear Mode Reg */
519  xm_write16(hw, port, XM_TX_CMD, 0); /* reset TX CMD Reg */
520  xm_write16(hw, port, XM_RX_CMD, 0); /* reset RX CMD Reg */
521 
522  /* disable Broadcom PHY IRQ */
523  if (hw->phy_type == SK_PHY_BCOM)
524  xm_write16(hw, port, PHY_BCOM_INT_MASK, 0xffff);
525 
527 
528  /* Flush TX and RX fifo */
529  reg = xm_read32(hw, port, XM_MODE);
532 }
Definition: skge.h:2095
static void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2571
static void xm_write32(const struct skge_hw *hw, int port, int r, u32 v)
Definition: skge.h:2565
uint32_t zero
Must be zero.
Definition: ntlm.h:24
Definition: hw.c:16
u8 port
Port number.
Definition: CIB_PRM.h:31
static void xm_outhash(const struct skge_hw *hw, int port, int reg, const u8 *hash)
Definition: skge.h:2576
static u32 xm_read32(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2552
Definition: skge.h:2100
static unsigned int unsigned int reg
Definition: intel.h:245
#define SK_REG(port, reg)
Definition: skge.h:2548
uint8_t u8
Definition: stdint.h:19
Definition: skge.h:2075
uint32_t u32
Definition: stdint.h:23
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References GMAC_IRQ_MSK, PHY_BCOM_INT_MASK, port, reg, SK_PHY_BCOM, SK_REG, skge_write8(), XM_GP_PORT, XM_GP_RES_STAT, XM_HSM, XM_IMSK, XM_IMSK_DISABLE, XM_MD_FRF, XM_MD_FTF, XM_MODE, xm_outhash(), xm_read32(), XM_RX_CMD, XM_TX_CMD, xm_write16(), xm_write32(), and zero.

Referenced by genesis_stop(), and skge_reset().

◆ bcom_check_link()

static void bcom_check_link ( struct skge_hw hw,
int  port 
)
static

Definition at line 553 of file skge.c.

554 {
555  struct net_device *dev = hw->dev[port];
556  struct skge_port *skge = netdev_priv(dev);
557  u16 status;
558 
559  /* read twice because of latch */
562 
563  if ((status & PHY_ST_LSYNC) == 0) {
564  xm_link_down(hw, port);
565  return;
566  }
567 
568  if (skge->autoneg == AUTONEG_ENABLE) {
569  u16 lpa, aux;
570 
571  if (!(status & PHY_ST_AN_OVER))
572  return;
573 
575  if (lpa & PHY_B_AN_RF) {
576  DBG(PFX "%s: remote fault\n",
577  dev->name);
578  return;
579  }
580 
582 
583  /* Check Duplex mismatch */
584  switch (aux & PHY_B_AS_AN_RES_MSK) {
585  case PHY_B_RES_1000FD:
586  skge->duplex = DUPLEX_FULL;
587  break;
588  case PHY_B_RES_1000HD:
589  skge->duplex = DUPLEX_HALF;
590  break;
591  default:
592  DBG(PFX "%s: duplex mismatch\n",
593  dev->name);
594  return;
595  }
596 
597  /* We are using IEEE 802.3z/D5.0 Table 37-4 */
598  switch (aux & PHY_B_AS_PAUSE_MSK) {
599  case PHY_B_AS_PAUSE_MSK:
601  break;
602  case PHY_B_AS_PRR:
604  break;
605  case PHY_B_AS_PRT:
607  break;
608  default:
609  skge->flow_status = FLOW_STAT_NONE;
610  }
611  skge->speed = SPEED_1000;
612  }
613 
614  if (!netdev_link_ok(dev))
615  genesis_link_up(skge);
616 }
#define SPEED_1000
Definition: atl1e.h:52
uint16_t u16
Definition: stdint.h:21
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
static void xm_link_down(struct skge_hw *hw, int port)
Definition: skge.c:415
#define AUTONEG_ENABLE
Definition: bnx2.h:4584
u8 duplex
Definition: skge.h:2506
Definition: hw.c:16
uint8_t status
Status.
Definition: ena.h:16
u8 port
Port number.
Definition: CIB_PRM.h:31
enum pause_status flow_status
Definition: skge.h:2504
#define PHY_B_AS_PAUSE_MSK
Definition: skge.h:1307
static int netdev_link_ok(struct net_device *netdev)
Check link state of network device.
Definition: netdevice.h:630
#define DUPLEX_FULL
Definition: bnx2.h:111
u8 autoneg
Definition: skge.h:2505
#define PFX
Definition: sis190.h:34
A network device.
Definition: netdevice.h:348
struct device * dev
Underlying hardware device.
Definition: netdevice.h:360
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
static u16 xm_phy_read(struct skge_hw *hw, int port, u16 reg)
Definition: skge.c:449
static void genesis_link_up(struct skge_port *skge)
Definition: skge.c:1045
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
u16 speed
Definition: skge.h:2507
#define DUPLEX_HALF
Definition: bnx2.h:110

References skge_port::autoneg, AUTONEG_ENABLE, DBG, net_device::dev, skge_port::duplex, DUPLEX_FULL, DUPLEX_HALF, FLOW_STAT_LOC_SEND, FLOW_STAT_NONE, FLOW_STAT_REM_SEND, FLOW_STAT_SYMMETRIC, skge_port::flow_status, genesis_link_up(), net_device::name, netdev_link_ok(), netdev_priv(), PFX, PHY_B_AN_RF, PHY_B_AS_AN_RES_MSK, PHY_B_AS_PAUSE_MSK, PHY_B_AS_PRR, PHY_B_AS_PRT, PHY_B_RES_1000FD, PHY_B_RES_1000HD, PHY_BCOM_AUX_STAT, PHY_BCOM_STAT, PHY_ST_AN_OVER, PHY_ST_LSYNC, PHY_XMAC_AUNE_LP, port, skge_port::speed, SPEED_1000, status, xm_link_down(), and xm_phy_read().

Referenced by bcom_phy_intr(), and genesis_mac_init().

◆ bcom_phy_init()

static void bcom_phy_init ( struct skge_port skge)
static

Definition at line 621 of file skge.c.

622 {
623  struct skge_hw *hw = skge->hw;
624  int port = skge->port;
625  unsigned int i;
626  u16 id1, r, ext, ctl;
627 
628  /* magic workaround patterns for Broadcom */
629  static const struct {
630  u16 reg;
631  u16 val;
632  } A1hack[] = {
633  { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 },
634  { 0x17, 0x0013 }, { 0x15, 0x0404 }, { 0x17, 0x8006 },
635  { 0x15, 0x0132 }, { 0x17, 0x8006 }, { 0x15, 0x0232 },
636  { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 },
637  }, C0hack[] = {
638  { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 },
639  { 0x17, 0x0013 }, { 0x15, 0x0A04 }, { 0x18, 0x0420 },
640  };
641 
642  /* read Id from external PHY (all have the same address) */
643  id1 = xm_phy_read(hw, port, PHY_XMAC_ID1);
644 
645  /* Optimize MDIO transfer by suppressing preamble. */
647  r |= XM_MMU_NO_PRE;
649 
650  switch (id1) {
651  case PHY_BCOM_ID1_C0:
652  /*
653  * Workaround BCOM Errata for the C0 type.
654  * Write magic patterns to reserved registers.
655  */
656  for (i = 0; i < ARRAY_SIZE(C0hack); i++)
658  C0hack[i].reg, C0hack[i].val);
659 
660  break;
661  case PHY_BCOM_ID1_A1:
662  /*
663  * Workaround BCOM Errata for the A1 type.
664  * Write magic patterns to reserved registers.
665  */
666  for (i = 0; i < ARRAY_SIZE(A1hack); i++)
668  A1hack[i].reg, A1hack[i].val);
669  break;
670  }
671 
672  /*
673  * Workaround BCOM Errata (#10523) for all BCom PHYs.
674  * Disable Power Management after reset.
675  */
677  r |= PHY_B_AC_DIS_PM;
679 
680  /* Dummy read */
682 
683  ext = PHY_B_PEC_EN_LTR; /* enable tx led */
684  ctl = PHY_CT_SP1000; /* always 1000mbit */
685 
686  if (skge->autoneg == AUTONEG_ENABLE) {
687  /*
688  * Workaround BCOM Errata #1 for the C5 type.
689  * 1000Base-T Link Acquisition Failure in Slave Mode
690  * Set Repeater/DTE bit 10 of the 1000Base-T Control Register
691  */
692  u16 adv = PHY_B_1000C_RD;
694  adv |= PHY_B_1000C_AHD;
696  adv |= PHY_B_1000C_AFD;
698 
699  ctl |= PHY_CT_ANE | PHY_CT_RE_CFG;
700  } else {
701  if (skge->duplex == DUPLEX_FULL)
702  ctl |= PHY_CT_DUP_MD;
703  /* Force to slave */
705  }
706 
707  /* Set autonegotiation pause parameters */
710 
713 
714  /* Use link status change interrupt */
716 }
uint16_t u16
Definition: stdint.h:21
static u16 xm_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2560
int port
Definition: skge.h:2498
static void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2571
#define PHY_B_DEF_MSK
Definition: skge.h:1328
u32 advertising
Definition: skge.h:2508
#define AUTONEG_ENABLE
Definition: bnx2.h:4584
u8 duplex
Definition: skge.h:2506
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
#define ADVERTISED_1000baseT_Half
Definition: bnx2.h:46
u8 port
Port number.
Definition: CIB_PRM.h:31
static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:458
#define DUPLEX_FULL
Definition: bnx2.h:111
u8 autoneg
Definition: skge.h:2505
static unsigned int unsigned int reg
Definition: intel.h:245
Definition: skge.h:2460
#define ARRAY_SIZE(x)
Definition: efx_common.h:43
void __asmcall int val
Definition: setjmp.h:28
uint16_t ext
Extended status.
Definition: ena.h:20
enum pause_control flow_control
Definition: skge.h:2503
static u16 xm_phy_read(struct skge_hw *hw, int port, u16 reg)
Definition: skge.c:449
Definition: skge.h:2076
#define ADVERTISED_1000baseT_Full
Definition: bnx2.h:47
static const u16 phy_pause_map[]
Definition: skge.c:536
static const uint8_t r[3][4]
MD4 shift amounts.
Definition: md4.c:54

References ADVERTISED_1000baseT_Full, ADVERTISED_1000baseT_Half, skge_port::advertising, ARRAY_SIZE, skge_port::autoneg, AUTONEG_ENABLE, skge_port::duplex, DUPLEX_FULL, ext, skge_port::flow_control, skge_port::hw, PHY_AN_CSMA, PHY_B_1000C_AFD, PHY_B_1000C_AHD, PHY_B_1000C_MSE, PHY_B_1000C_RD, PHY_B_AC_DIS_PM, PHY_B_DEF_MSK, PHY_B_PEC_EN_LTR, PHY_BCOM_1000T_CTRL, PHY_BCOM_AUNE_ADV, PHY_BCOM_AUX_CTRL, PHY_BCOM_CTRL, PHY_BCOM_ID1_A1, PHY_BCOM_ID1_C0, PHY_BCOM_INT_MASK, PHY_BCOM_P_EXT_CTRL, PHY_CT_ANE, PHY_CT_DUP_MD, PHY_CT_RE_CFG, PHY_CT_SP1000, phy_pause_map, PHY_XMAC_ID1, port, skge_port::port, r, reg, val, XM_ISRC, XM_MMU_CMD, XM_MMU_NO_PRE, xm_phy_read(), xm_phy_write(), xm_read16(), and xm_write16().

Referenced by genesis_mac_init().

◆ xm_phy_init()

static void xm_phy_init ( struct skge_port skge)
static

Definition at line 718 of file skge.c.

719 {
720  struct skge_hw *hw = skge->hw;
721  int port = skge->port;
722  u16 ctrl = 0;
723 
724  if (skge->autoneg == AUTONEG_ENABLE) {
726  ctrl |= PHY_X_AN_HD;
728  ctrl |= PHY_X_AN_FD;
729 
731 
733 
734  /* Restart Auto-negotiation */
736  } else {
737  /* Set DuplexMode in Config register */
738  if (skge->duplex == DUPLEX_FULL)
739  ctrl |= PHY_CT_DUP_MD;
740  /*
741  * Do NOT enable Auto-negotiation here. This would hold
742  * the link down because no IDLEs are transmitted
743  */
744  }
745 
747 
748  /* Poll PHY for status changes */
749  skge->use_xm_link_timer = 1;
750 }
uint16_t u16
Definition: stdint.h:21
int port
Definition: skge.h:2498
u32 advertising
Definition: skge.h:2508
#define AUTONEG_ENABLE
Definition: bnx2.h:4584
int use_xm_link_timer
Definition: skge.h:2512
u8 duplex
Definition: skge.h:2506
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
#define ADVERTISED_1000baseT_Half
Definition: bnx2.h:46
u8 port
Port number.
Definition: CIB_PRM.h:31
static const u16 fiber_pause_map[]
Definition: skge.c:544
static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:458
#define DUPLEX_FULL
Definition: bnx2.h:111
u8 autoneg
Definition: skge.h:2505
Definition: skge.h:2460
enum pause_control flow_control
Definition: skge.h:2503
static unsigned int ctrl
Definition: intel.h:270
#define ADVERTISED_1000baseT_Full
Definition: bnx2.h:47

References ADVERTISED_1000baseT_Full, ADVERTISED_1000baseT_Half, skge_port::advertising, skge_port::autoneg, AUTONEG_ENABLE, ctrl, skge_port::duplex, DUPLEX_FULL, fiber_pause_map, skge_port::flow_control, skge_port::hw, PHY_CT_ANE, PHY_CT_DUP_MD, PHY_CT_RE_CFG, PHY_X_AN_FD, PHY_X_AN_HD, PHY_XMAC_AUNE_ADV, PHY_XMAC_CTRL, port, skge_port::port, skge_port::use_xm_link_timer, and xm_phy_write().

Referenced by genesis_mac_init().

◆ xm_check_link()

static int xm_check_link ( struct net_device dev)
static

Definition at line 752 of file skge.c.

753 {
754  struct skge_port *skge = netdev_priv(dev);
755  struct skge_hw *hw = skge->hw;
756  int port = skge->port;
757  u16 status;
758 
759  /* read twice because of latch */
762 
763  if ((status & PHY_ST_LSYNC) == 0) {
764  xm_link_down(hw, port);
765  return 0;
766  }
767 
768  if (skge->autoneg == AUTONEG_ENABLE) {
769  u16 lpa, res;
770 
771  if (!(status & PHY_ST_AN_OVER))
772  return 0;
773 
775  if (lpa & PHY_B_AN_RF) {
776  DBG(PFX "%s: remote fault\n",
777  dev->name);
778  return 0;
779  }
780 
782 
783  /* Check Duplex mismatch */
784  switch (res & (PHY_X_RS_HD | PHY_X_RS_FD)) {
785  case PHY_X_RS_FD:
786  skge->duplex = DUPLEX_FULL;
787  break;
788  case PHY_X_RS_HD:
789  skge->duplex = DUPLEX_HALF;
790  break;
791  default:
792  DBG(PFX "%s: duplex mismatch\n",
793  dev->name);
794  return 0;
795  }
796 
797  /* We are using IEEE 802.3z/D5.0 Table 37-4 */
798  if ((skge->flow_control == FLOW_MODE_SYMMETRIC ||
800  (lpa & PHY_X_P_SYM_MD))
802  else if (skge->flow_control == FLOW_MODE_SYM_OR_REM &&
803  (lpa & PHY_X_RS_PAUSE) == PHY_X_P_ASYM_MD)
804  /* Enable PAUSE receive, disable PAUSE transmit */
806  else if (skge->flow_control == FLOW_MODE_LOC_SEND &&
807  (lpa & PHY_X_RS_PAUSE) == PHY_X_P_BOTH_MD)
808  /* Disable PAUSE receive, enable PAUSE transmit */
810  else
811  skge->flow_status = FLOW_STAT_NONE;
812 
813  skge->speed = SPEED_1000;
814  }
815 
816  if (!netdev_link_ok(dev))
817  genesis_link_up(skge);
818  return 1;
819 }
#define SPEED_1000
Definition: atl1e.h:52
uint16_t u16
Definition: stdint.h:21
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
int port
Definition: skge.h:2498
struct net_device * dev[2]
Definition: skge.h:2464
static void xm_link_down(struct skge_hw *hw, int port)
Definition: skge.c:415
#define AUTONEG_ENABLE
Definition: bnx2.h:4584
u8 duplex
Definition: skge.h:2506
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
uint8_t status
Status.
Definition: ena.h:16
u8 port
Port number.
Definition: CIB_PRM.h:31
enum pause_status flow_status
Definition: skge.h:2504
static int netdev_link_ok(struct net_device *netdev)
Check link state of network device.
Definition: netdevice.h:630
#define DUPLEX_FULL
Definition: bnx2.h:111
u8 autoneg
Definition: skge.h:2505
#define PFX
Definition: sis190.h:34
Definition: skge.h:2460
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
enum pause_control flow_control
Definition: skge.h:2503
static u16 xm_phy_read(struct skge_hw *hw, int port, u16 reg)
Definition: skge.c:449
static void genesis_link_up(struct skge_port *skge)
Definition: skge.c:1045
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
u16 speed
Definition: skge.h:2507
#define DUPLEX_HALF
Definition: bnx2.h:110

References skge_port::autoneg, AUTONEG_ENABLE, DBG, skge_hw::dev, skge_port::duplex, DUPLEX_FULL, DUPLEX_HALF, skge_port::flow_control, FLOW_MODE_LOC_SEND, FLOW_MODE_SYM_OR_REM, FLOW_MODE_SYMMETRIC, FLOW_STAT_LOC_SEND, FLOW_STAT_NONE, FLOW_STAT_REM_SEND, FLOW_STAT_SYMMETRIC, skge_port::flow_status, genesis_link_up(), skge_port::hw, net_device::name, netdev_link_ok(), netdev_priv(), PFX, PHY_B_AN_RF, PHY_ST_AN_OVER, PHY_ST_LSYNC, PHY_X_P_ASYM_MD, PHY_X_P_BOTH_MD, PHY_X_P_SYM_MD, PHY_X_RS_FD, PHY_X_RS_HD, PHY_X_RS_PAUSE, PHY_XMAC_AUNE_LP, PHY_XMAC_RES_ABI, PHY_XMAC_STAT, port, skge_port::port, skge_port::speed, SPEED_1000, status, xm_link_down(), and xm_phy_read().

Referenced by xm_link_timer().

◆ xm_link_timer()

static void xm_link_timer ( struct skge_port skge)
static

Definition at line 827 of file skge.c.

828 {
829  struct net_device *dev = skge->netdev;
830  struct skge_hw *hw = skge->hw;
831  int port = skge->port;
832  int i;
833 
834  /*
835  * Verify that the link by checking GPIO register three times.
836  * This pin has the signal from the link_sync pin connected to it.
837  */
838  for (i = 0; i < 3; i++) {
840  return;
841  }
842 
843  /* Re-enable interrupt to detect link down */
844  if (xm_check_link(dev)) {
845  u16 msk = xm_read16(hw, port, XM_IMSK);
846  msk &= ~XM_IS_INP_ASS;
847  xm_write16(hw, port, XM_IMSK, msk);
849  }
850 }
uint16_t u16
Definition: stdint.h:21
static u16 xm_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2560
int port
Definition: skge.h:2498
static void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2571
struct net_device * dev[2]
Definition: skge.h:2464
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
u8 port
Port number.
Definition: CIB_PRM.h:31
static int xm_check_link(struct net_device *dev)
Definition: skge.c:752
Definition: skge.h:2460
A network device.
Definition: netdevice.h:348
struct device * dev
Underlying hardware device.
Definition: netdevice.h:360
struct net_device * netdev
Definition: skge.h:2497
Definition: skge.h:2076
Definition: skge.h:2075

References net_device::dev, skge_hw::dev, skge_port::hw, skge_port::netdev, port, skge_port::port, xm_check_link(), XM_GP_INP_ASS, XM_GP_PORT, XM_IMSK, XM_IS_INP_ASS, XM_ISRC, xm_read16(), and xm_write16().

Referenced by skge_poll().

◆ genesis_stop()

static void genesis_stop ( struct skge_port skge)
static

Definition at line 998 of file skge.c.

999 {
1000  struct skge_hw *hw = skge->hw;
1001  int port = skge->port;
1002  unsigned retries = 1000;
1003  u16 cmd;
1004 
1005  /* Disable Tx and Rx */
1009 
1010  genesis_reset(hw, port);
1011 
1012  /* Clear Tx packet arbiter timeout IRQ */
1014  port == 0 ? PA_CLR_TO_TX1 : PA_CLR_TO_TX2);
1015 
1016  /* Reset the MAC */
1018  do {
1021  break;
1022  } while (--retries > 0);
1023 
1024  /* For external PHYs there must be special handling */
1025  if (hw->phy_type != SK_PHY_XMAC) {
1027  if (port == 0) {
1028  reg |= GP_DIR_0;
1029  reg &= ~GP_IO_0;
1030  } else {
1031  reg |= GP_DIR_2;
1032  reg &= ~GP_IO_2;
1033  }
1036  }
1037 
1040  & ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX));
1041 
1043 }
uint16_t u16
Definition: stdint.h:21
static u16 xm_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2560
int port
Definition: skge.h:2498
static void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2571
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
static u32 skge_read32(const struct skge_hw *hw, int reg)
Definition: skge.h:2517
Definition: skge.h:367
u8 port
Port number.
Definition: CIB_PRM.h:31
static void skge_write16(const struct skge_hw *hw, int reg, u16 val)
Definition: skge.h:2537
static unsigned int unsigned int reg
Definition: intel.h:245
Definition: skge.h:2460
#define SK_REG(port, reg)
Definition: skge.h:2548
Definition: skge.h:369
Definition: skge.h:128
Definition: skge.h:358
Definition: skge.h:356
struct golan_eqe_cmd cmd
Definition: CIB_PRM.h:29
static void genesis_reset(struct skge_hw *hw, int port)
Definition: skge.c:508
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
uint32_t u32
Definition: stdint.h:23
static u16 skge_read16(const struct skge_hw *hw, int reg)
Definition: skge.h:2522

References B2_GP_IO, B3_PA_CTRL, cmd, genesis_reset(), GP_DIR_0, GP_DIR_2, GP_IO_0, GP_IO_2, skge_port::hw, MFF_CLR_MAC_RST, MFF_SET_MAC_RST, PA_CLR_TO_TX1, PA_CLR_TO_TX2, port, skge_port::port, reg, SK_PHY_XMAC, SK_REG, skge_read16(), skge_read32(), skge_write16(), skge_write32(), TX_MFF_CTRL1, XM_MMU_CMD, XM_MMU_ENA_RX, XM_MMU_ENA_TX, xm_read16(), and xm_write16().

Referenced by skge_down().

◆ bcom_phy_intr()

static void bcom_phy_intr ( struct skge_port skge)
inlinestatic

Definition at line 1129 of file skge.c.

1130 {
1131  struct skge_hw *hw = skge->hw;
1132  int port = skge->port;
1133  u16 isrc;
1134 
1136  DBGIO(PFX "%s: phy interrupt status 0x%x\n",
1137  skge->netdev->name, isrc);
1138 
1139  if (isrc & PHY_B_IS_PSE)
1140  DBG(PFX "%s: uncorrectable pair swap error\n",
1141  hw->dev[port]->name);
1142 
1143  /* Workaround BCom Errata:
1144  * enable and disable loopback mode if "NO HCD" occurs.
1145  */
1146  if (isrc & PHY_B_IS_NO_HDCL) {
1149  ctrl | PHY_CT_LOOP);
1151  ctrl & ~PHY_CT_LOOP);
1152  }
1153 
1154  if (isrc & (PHY_B_IS_AN_PR | PHY_B_IS_LST_CHANGE))
1156 
1157 }
uint16_t u16
Definition: stdint.h:21
int port
Definition: skge.h:2498
static void bcom_check_link(struct skge_hw *hw, int port)
Definition: skge.c:553
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
u8 port
Port number.
Definition: CIB_PRM.h:31
static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:458
#define PFX
Definition: sis190.h:34
#define DBGIO(...)
Definition: compiler.h:549
Definition: skge.h:2460
struct net_device * netdev
Definition: skge.h:2497
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
static unsigned int ctrl
Definition: intel.h:270
static u16 xm_phy_read(struct skge_hw *hw, int port, u16 reg)
Definition: skge.c:449
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498

References bcom_check_link(), ctrl, DBG, DBGIO, skge_port::hw, net_device::name, skge_port::netdev, PFX, PHY_B_IS_AN_PR, PHY_B_IS_LST_CHANGE, PHY_B_IS_NO_HDCL, PHY_B_IS_PSE, PHY_BCOM_CTRL, PHY_BCOM_INT_STAT, PHY_CT_LOOP, port, skge_port::port, xm_phy_read(), and xm_phy_write().

Referenced by skge_phyirq().

◆ __gm_phy_read()

static int __gm_phy_read ( struct skge_hw hw,
int  port,
u16  reg,
u16 val 
)
static

Definition at line 1179 of file skge.c.

1180 {
1181  int i;
1182 
1184  GM_SMI_CT_PHY_AD(hw->phy_addr)
1186 
1187  for (i = 0; i < PHY_RETRIES; i++) {
1188  udelay(1);
1190  goto ready;
1191  }
1192 
1193  return -ETIMEDOUT;
1194  ready:
1196  return 0;
1197 }
static void gma_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2607
#define GM_SMI_CT_PHY_AD(x)
Definition: skge.h:1869
#define PHY_RETRIES
Definition: skge.h:28
Definition: hw.c:16
u8 port
Port number.
Definition: CIB_PRM.h:31
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
static unsigned int unsigned int reg
Definition: intel.h:245
void __asmcall int val
Definition: setjmp.h:28
static u16 gma_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2596
#define GM_SMI_CT_REG_AD(x)
Definition: skge.h:1870
#define ETIMEDOUT
Connection timed out.
Definition: errno.h:669

References ETIMEDOUT, GM_SMI_CT_OP_RD, GM_SMI_CT_PHY_AD, GM_SMI_CT_RD_VAL, GM_SMI_CT_REG_AD, GM_SMI_CTRL, GM_SMI_DATA, gma_read16(), gma_write16(), PHY_RETRIES, port, reg, udelay(), and val.

Referenced by gm_phy_read().

◆ gm_phy_read()

static u16 gm_phy_read ( struct skge_hw hw,
int  port,
u16  reg 
)
static

Definition at line 1199 of file skge.c.

1200 {
1201  u16 v = 0;
1202  if (__gm_phy_read(hw, port, reg, &v))
1203  DBG(PFX "%s: phy read timeout port %x reg %x val %x\n",
1204  hw->dev[port]->name,
1205  port, reg, v);
1206  return v;
1207 }
uint16_t u16
Definition: stdint.h:21
Definition: hw.c:16
static int __gm_phy_read(struct skge_hw *hw, int port, u16 reg, u16 *val)
Definition: skge.c:1179
u8 port
Port number.
Definition: CIB_PRM.h:31
#define PFX
Definition: sis190.h:34
static unsigned int unsigned int reg
Definition: intel.h:245
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498

References __gm_phy_read(), DBG, PFX, port, and reg.

Referenced by yukon_init(), yukon_link_down(), yukon_phy_intr(), and yukon_suspend().

◆ yukon_reset()

static void yukon_reset ( struct skge_hw hw,
int  port 
)
static

Definition at line 1297 of file skge.c.

1298 {
1299  gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);/* disable PHY IRQs */
1300  gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
1304 
1308 }
static void gma_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2607
Definition: hw.c:16
u8 port
Port number.
Definition: CIB_PRM.h:31
static u16 gma_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2596
static int gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:1159

References GM_MC_ADDR_H1, GM_MC_ADDR_H2, GM_MC_ADDR_H3, GM_MC_ADDR_H4, gm_phy_write(), GM_RX_CTRL, GM_RXCR_MCF_ENA, GM_RXCR_UCF_ENA, gma_read16(), gma_write16(), PHY_MARV_INT_MASK, and port.

Referenced by skge_reset(), and yukon_stop().

◆ is_yukon_lite_a0()

static int is_yukon_lite_a0 ( struct skge_hw hw)
static

Definition at line 1311 of file skge.c.

1312 {
1313  u32 reg;
1314  int ret;
1315 
1316  if (hw->chip_id != CHIP_ID_YUKON)
1317  return 0;
1318 
1319  reg = skge_read32(hw, B2_FAR);
1320  skge_write8(hw, B2_FAR + 3, 0xff);
1321  ret = (skge_read8(hw, B2_FAR + 3) != 0);
1323  return ret;
1324 }
Definition: hw.c:16
static u32 skge_read32(const struct skge_hw *hw, int reg)
Definition: skge.h:2517
static u8 skge_read8(const struct skge_hw *hw, int reg)
Definition: skge.h:2527
static unsigned int unsigned int reg
Definition: intel.h:245
Definition: skge.h:112
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
uint32_t u32
Definition: stdint.h:23
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References B2_FAR, CHIP_ID_YUKON, reg, skge_read32(), skge_read8(), skge_write32(), and skge_write8().

Referenced by yukon_mac_init().

◆ yukon_mac_init()

static void yukon_mac_init ( struct skge_hw hw,
int  port 
)
static

Definition at line 1326 of file skge.c.

1327 {
1328  struct skge_port *skge = netdev_priv(hw->dev[port]);
1329  int i;
1330  u32 reg;
1331  const u8 *addr = hw->dev[port]->ll_addr;
1332 
1333  /* WA code for COMA mode -- set PHY reset */
1334  if (hw->chip_id == CHIP_ID_YUKON_LITE &&
1335  hw->chip_rev >= CHIP_REV_YU_LITE_A3) {
1336  reg = skge_read32(hw, B2_GP_IO);
1337  reg |= GP_DIR_9 | GP_IO_9;
1339  }
1340 
1341  /* hard reset */
1344 
1345  /* WA code for COMA mode -- clear PHY reset */
1346  if (hw->chip_id == CHIP_ID_YUKON_LITE &&
1347  hw->chip_rev >= CHIP_REV_YU_LITE_A3) {
1348  reg = skge_read32(hw, B2_GP_IO);
1349  reg |= GP_DIR_9;
1350  reg &= ~GP_IO_9;
1352  }
1353 
1354  /* Set hardware config mode */
1358 
1359  /* Clear GMC reset */
1363 
1364  if (skge->autoneg == AUTONEG_DISABLE) {
1368 
1369  switch (skge->speed) {
1370  case SPEED_1000:
1371  reg &= ~GM_GPCR_SPEED_100;
1373  break;
1374  case SPEED_100:
1375  reg &= ~GM_GPCR_SPEED_1000;
1377  break;
1378  case SPEED_10:
1380  break;
1381  }
1382 
1383  if (skge->duplex == DUPLEX_FULL)
1384  reg |= GM_GPCR_DUP_FULL;
1385  } else
1387 
1388  switch (skge->flow_control) {
1389  case FLOW_MODE_NONE:
1392  break;
1393  case FLOW_MODE_LOC_SEND:
1394  /* disable Rx flow-control */
1396  break;
1397  case FLOW_MODE_SYMMETRIC:
1398  case FLOW_MODE_SYM_OR_REM:
1399  /* enable Tx & Rx flow-control */
1400  break;
1401  }
1402 
1405 
1406  yukon_init(hw, port);
1407 
1408  /* MIB clear */
1411 
1412  for (i = 0; i < GM_MIB_CNT_SIZE; i++)
1413  gma_read16(hw, port, GM_MIB_CNT_BASE + 8*i);
1415 
1416  /* transmit control */
1418 
1419  /* receive control reg: unicast + multicast + no FCS */
1422 
1423  /* transmit flow control */
1424  gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
1425 
1426  /* transmit parameter */
1431 
1432  /* configure the Serial Mode Register */
1436 
1438 
1439  /* physical address: used for pause frames */
1441  /* virtual address for data */
1443 
1444  /* enable interrupt mask for counter overflows */
1448 
1449  /* Initialize Mac Fifo */
1450 
1451  /* Configure Rx MAC FIFO */
1454 
1455  /* disable Rx GMAC FIFO Flush for YUKON-Lite Rev. A0 only */
1456  if (is_yukon_lite_a0(hw))
1457  reg &= ~GMF_RX_F_FL_ON;
1458 
1461  /*
1462  * because Pause Packet Truncation in GMAC is not working
1463  * we have to increase the Flush Threshold to 64 bytes
1464  * in order to flush pause packets in Rx FIFO on Yukon-1
1465  */
1467 
1468  /* Configure Tx MAC FIFO */
1471 }
#define SPEED_1000
Definition: atl1e.h:52
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
#define IPG_DATA_DEF
Definition: skge.h:1858
static void gma_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2607
#define TX_COL_THR(x)
Definition: skge.h:1818
u8 duplex
Definition: skge.h:2506
#define SPEED_10
Definition: atl1e.h:50
Definition: hw.c:16
static u32 skge_read32(const struct skge_hw *hw, int reg)
Definition: skge.h:2517
#define SPEED_100
Definition: atl1e.h:51
static int is_yukon_lite_a0(struct skge_hw *hw)
Definition: skge.c:1311
#define TX_JAM_IPG_VAL(x)
Definition: skge.h:1841
#define GM_GPCR_SPEED_1000
Definition: skge.h:1807
u8 port
Port number.
Definition: CIB_PRM.h:31
#define DUPLEX_FULL
Definition: bnx2.h:111
u8 autoneg
Definition: skge.h:2505
#define TX_IPG_JAM_DATA(x)
Definition: skge.h:1842
static void skge_write16(const struct skge_hw *hw, int reg, u16 val)
Definition: skge.h:2537
#define GPC_HWCFG_GMII_COP
Definition: skge.h:1988
Definition: skge.h:360
#define IPG_DATA_VAL(x)
Definition: skge.h:1857
static unsigned int unsigned int reg
Definition: intel.h:245
#define TX_JAM_LEN_VAL(x)
Definition: skge.h:1840
u32 addr
Definition: sky2.h:8
#define SK_REG(port, reg)
Definition: skge.h:2548
static u16 gma_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2596
Definition: skge.h:349
enum pause_control flow_control
Definition: skge.h:2503
#define TX_COL_DEF
Definition: skge.h:1819
#define GPC_HWCFG_GMII_FIB
Definition: skge.h:1989
#define DATA_BLIND_DEF
Definition: skge.h:1855
Definition: skge.h:128
static void yukon_init(struct skge_hw *hw, int port)
Definition: skge.c:1210
#define AUTONEG_DISABLE
Definition: bnx2.h:4583
#define DATA_BLIND_VAL(x)
Definition: skge.h:1854
static void gma_set_addr(struct skge_hw *hw, int port, int reg, const u8 *addr)
Definition: skge.h:2612
#define GM_MIB_CNT_SIZE
Definition: skge.h:1716
#define GM_GPCR_AU_ALL_DIS
Definition: skge.h:1808
u16 speed
Definition: skge.h:2507
#define GPC_ANEG_ADV_ALL_M
Definition: skge.h:1990
uint8_t u8
Definition: stdint.h:19
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
uint32_t u32
Definition: stdint.h:23
static u16 skge_read16(const struct skge_hw *hw, int reg)
Definition: skge.h:2522
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References addr, skge_port::autoneg, AUTONEG_DISABLE, B2_GP_IO, CHIP_ID_YUKON_LITE, CHIP_REV_YU_LITE_A3, DATA_BLIND_DEF, DATA_BLIND_VAL, skge_port::duplex, DUPLEX_FULL, skge_port::flow_control, FLOW_MODE_LOC_SEND, FLOW_MODE_NONE, FLOW_MODE_SYM_OR_REM, FLOW_MODE_SYMMETRIC, GM_GP_CTRL, GM_GPCR_AU_ALL_DIS, GM_GPCR_AU_FCT_DIS, GM_GPCR_DUP_FULL, GM_GPCR_FC_RX_DIS, GM_GPCR_FC_TX_DIS, GM_GPCR_SPEED_100, GM_GPCR_SPEED_1000, GM_MIB_CNT_BASE, GM_MIB_CNT_SIZE, GM_PAR_MIB_CLR, GM_PHY_ADDR, GM_RX_CTRL, GM_RX_IRQ_MSK, GM_RXCR_CRC_DIS, GM_RXCR_MCF_ENA, GM_RXCR_UCF_ENA, GM_SERIAL_MODE, GM_SMOD_VLAN_ENA, GM_SRC_ADDR_1L, GM_SRC_ADDR_2L, GM_TR_IRQ_MSK, GM_TX_CTRL, GM_TX_FLOW_CTRL, GM_TX_IRQ_MSK, GM_TX_PARAM, gma_read16(), gma_set_addr(), gma_write16(), GMAC_CTRL, GMAC_IRQ_SRC, GMC_PAUSE_OFF, GMC_PAUSE_ON, GMC_RST_CLR, GMC_RST_SET, GMF_OPER_ON, GMF_RST_CLR, GMF_RX_F_FL_ON, GP_DIR_9, GP_IO_9, GPC_ANEG_ADV_ALL_M, GPC_DIS_FC, GPC_DIS_SLEEP, GPC_ENA_PAUSE, GPC_ENA_XC, GPC_HWCFG_GMII_COP, GPC_HWCFG_GMII_FIB, GPC_INT_POL_HI, GPC_RST_CLR, GPC_RST_SET, GPHY_CTRL, IPG_DATA_DEF, IPG_DATA_VAL, is_yukon_lite_a0(), netdev_priv(), port, reg, RX_FF_FL_DEF_MSK, RX_GMF_CTRL_T, RX_GMF_FL_MSK, RX_GMF_FL_THR, RX_GMF_FL_THR_DEF, SK_REG, skge_read16(), skge_read32(), skge_write16(), skge_write32(), skge_write8(), skge_port::speed, SPEED_10, SPEED_100, SPEED_1000, TX_COL_DEF, TX_COL_THR, TX_GMF_CTRL_T, TX_IPG_JAM_DATA, TX_IPG_JAM_DEF, TX_JAM_IPG_DEF, TX_JAM_IPG_VAL, TX_JAM_LEN_DEF, TX_JAM_LEN_VAL, and yukon_init().

Referenced by skge_up().

◆ yukon_suspend()

static void yukon_suspend ( struct skge_hw hw,
int  port 
)
static

Definition at line 1474 of file skge.c.

1475 {
1476  u16 ctrl;
1477 
1481 
1483  ctrl |= PHY_CT_RESET;
1485 
1486  /* switch IEEE compatible power down mode on */
1488  ctrl |= PHY_CT_PDOWN;
1490 }
uint16_t u16
Definition: stdint.h:21
Definition: hw.c:16
u8 port
Port number.
Definition: CIB_PRM.h:31
static u16 gm_phy_read(struct skge_hw *hw, int port, u16 reg)
Definition: skge.c:1199
static unsigned int ctrl
Definition: intel.h:270
static int gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:1159

References ctrl, gm_phy_read(), gm_phy_write(), PHY_CT_PDOWN, PHY_CT_RESET, PHY_M_PC_POL_R_DIS, PHY_MARV_CTRL, PHY_MARV_PHY_CTRL, and port.

Referenced by yukon_stop().

◆ yukon_stop()

static void yukon_stop ( struct skge_port skge)
static

Definition at line 1492 of file skge.c.

1493 {
1494  struct skge_hw *hw = skge->hw;
1495  int port = skge->port;
1496 
1498  yukon_reset(hw, port);
1499 
1504 
1505  yukon_suspend(hw, port);
1506 
1507  /* set GPHY Control reset */
1510 }
static void yukon_reset(struct skge_hw *hw, int port)
Definition: skge.c:1297
int port
Definition: skge.h:2498
static void gma_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2607
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
u8 port
Port number.
Definition: CIB_PRM.h:31
Definition: skge.h:2460
#define SK_REG(port, reg)
Definition: skge.h:2548
static u16 gma_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2596
static void yukon_suspend(struct skge_hw *hw, int port)
Definition: skge.c:1474
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References GM_GP_CTRL, GM_GPCR_RX_ENA, GM_GPCR_TX_ENA, gma_read16(), gma_write16(), GMAC_CTRL, GMAC_IRQ_MSK, GMC_RST_SET, GPC_RST_SET, GPHY_CTRL, skge_port::hw, port, skge_port::port, SK_REG, skge_write8(), yukon_reset(), and yukon_suspend().

Referenced by skge_down().

◆ yukon_speed()

static u16 yukon_speed ( const struct skge_hw *hw  __unused,
u16  aux 
)
static

Definition at line 1512 of file skge.c.

1513 {
1514  switch (aux & PHY_M_PS_SPEED_MSK) {
1515  case PHY_M_PS_SPEED_1000:
1516  return SPEED_1000;
1517  case PHY_M_PS_SPEED_100:
1518  return SPEED_100;
1519  default:
1520  return SPEED_10;
1521  }
1522 }
#define SPEED_1000
Definition: atl1e.h:52
#define SPEED_10
Definition: atl1e.h:50
#define SPEED_100
Definition: atl1e.h:51

References PHY_M_PS_SPEED_100, PHY_M_PS_SPEED_1000, PHY_M_PS_SPEED_MSK, SPEED_10, SPEED_100, and SPEED_1000.

Referenced by yukon_phy_intr().

◆ yukon_link_up()

static void yukon_link_up ( struct skge_port skge)
static

Definition at line 1524 of file skge.c.

1525 {
1526  struct skge_hw *hw = skge->hw;
1527  int port = skge->port;
1528  u16 reg;
1529 
1530  /* Enable Transmit FIFO Underrun */
1532 
1534  if (skge->duplex == DUPLEX_FULL || skge->autoneg == AUTONEG_ENABLE)
1535  reg |= GM_GPCR_DUP_FULL;
1536 
1537  /* enable Rx/Tx */
1540 
1542  skge_link_up(skge);
1543 }
uint16_t u16
Definition: stdint.h:21
int port
Definition: skge.h:2498
static void gma_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2607
#define AUTONEG_ENABLE
Definition: bnx2.h:4584
u8 duplex
Definition: skge.h:2506
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
u8 port
Port number.
Definition: CIB_PRM.h:31
#define GMAC_DEF_MSK
Definition: skge.h:2021
#define DUPLEX_FULL
Definition: bnx2.h:111
u8 autoneg
Definition: skge.h:2505
static void skge_link_up(struct skge_port *skge)
Definition: skge.c:394
static unsigned int unsigned int reg
Definition: intel.h:245
Definition: skge.h:2460
#define SK_REG(port, reg)
Definition: skge.h:2548
static u16 gma_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2596
static int gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:1159
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References skge_port::autoneg, AUTONEG_ENABLE, skge_port::duplex, DUPLEX_FULL, GM_GP_CTRL, GM_GPCR_DUP_FULL, GM_GPCR_RX_ENA, GM_GPCR_TX_ENA, gm_phy_write(), gma_read16(), gma_write16(), GMAC_DEF_MSK, GMAC_IRQ_MSK, skge_port::hw, PHY_M_IS_DEF_MSK, PHY_MARV_INT_MASK, port, skge_port::port, reg, SK_REG, skge_link_up(), and skge_write8().

Referenced by yukon_phy_intr().

◆ yukon_link_down()

static void yukon_link_down ( struct skge_port skge)
static

Definition at line 1545 of file skge.c.

1546 {
1547  struct skge_hw *hw = skge->hw;
1548  int port = skge->port;
1549  u16 ctrl;
1550 
1554 
1555  if (skge->flow_status == FLOW_STAT_REM_SEND) {
1557  ctrl |= PHY_M_AN_ASP;
1558  /* restore Asymmetric Pause bit */
1560  }
1561 
1562  skge_link_down(skge);
1563 
1564  yukon_init(hw, port);
1565 }
uint16_t u16
Definition: stdint.h:21
int port
Definition: skge.h:2498
static void gma_write16(const struct skge_hw *hw, int port, int r, u16 v)
Definition: skge.h:2607
static void skge_link_down(struct skge_port *skge)
Definition: skge.c:406
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
u8 port
Port number.
Definition: CIB_PRM.h:31
enum pause_status flow_status
Definition: skge.h:2504
Definition: skge.h:2460
static u16 gm_phy_read(struct skge_hw *hw, int port, u16 reg)
Definition: skge.c:1199
static u16 gma_read16(const struct skge_hw *hw, int port, int reg)
Definition: skge.h:2596
static unsigned int ctrl
Definition: intel.h:270
static int gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
Definition: skge.c:1159
static void yukon_init(struct skge_hw *hw, int port)
Definition: skge.c:1210

References ctrl, FLOW_STAT_REM_SEND, skge_port::flow_status, GM_GP_CTRL, GM_GPCR_RX_ENA, GM_GPCR_TX_ENA, gm_phy_read(), gm_phy_write(), gma_read16(), gma_write16(), skge_port::hw, PHY_M_AN_ASP, PHY_MARV_AUNE_ADV, port, skge_port::port, skge_link_down(), and yukon_init().

Referenced by yukon_phy_intr().

◆ yukon_phy_intr()

static void yukon_phy_intr ( struct skge_port skge)
static

Definition at line 1567 of file skge.c.

1568 {
1569  struct skge_hw *hw = skge->hw;
1570  int port = skge->port;
1571  const char *reason = NULL;
1572  u16 istatus, phystat;
1573 
1574  istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
1575  phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
1576 
1577  DBGIO(PFX "%s: phy interrupt status 0x%x 0x%x\n",
1578  skge->netdev->name, istatus, phystat);
1579 
1580  if (istatus & PHY_M_IS_AN_COMPL) {
1582  & PHY_M_AN_RF) {
1583  reason = "remote fault";
1584  goto failed;
1585  }
1586 
1588  reason = "master/slave fault";
1589  goto failed;
1590  }
1591 
1592  if (!(phystat & PHY_M_PS_SPDUP_RES)) {
1593  reason = "speed/duplex";
1594  goto failed;
1595  }
1596 
1597  skge->duplex = (phystat & PHY_M_PS_FULL_DUP)
1599  skge->speed = yukon_speed(hw, phystat);
1600 
1601  /* We are using IEEE 802.3z/D5.0 Table 37-4 */
1602  switch (phystat & PHY_M_PS_PAUSE_MSK) {
1603  case PHY_M_PS_PAUSE_MSK:
1605  break;
1606  case PHY_M_PS_RX_P_EN:
1608  break;
1609  case PHY_M_PS_TX_P_EN:
1611  break;
1612  default:
1613  skge->flow_status = FLOW_STAT_NONE;
1614  }
1615 
1616  if (skge->flow_status == FLOW_STAT_NONE ||
1617  (skge->speed < SPEED_1000 && skge->duplex == DUPLEX_HALF))
1619  else
1621  yukon_link_up(skge);
1622  return;
1623  }
1624 
1625  if (istatus & PHY_M_IS_LSP_CHANGE)
1626  skge->speed = yukon_speed(hw, phystat);
1627 
1628  if (istatus & PHY_M_IS_DUP_CHANGE)
1629  skge->duplex = (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
1630  if (istatus & PHY_M_IS_LST_CHANGE) {
1631  if (phystat & PHY_M_PS_LINK_UP)
1632  yukon_link_up(skge);
1633  else
1634  yukon_link_down(skge);
1635  }
1636  return;
1637  failed:
1638  DBG(PFX "%s: autonegotiation failed (%s)\n",
1639  skge->netdev->name, reason);
1640 
1641  /* XXX restart autonegotiation? */
1642 }
#define SPEED_1000
Definition: atl1e.h:52
uint16_t u16
Definition: stdint.h:21
static void yukon_link_down(struct skge_port *skge)
Definition: skge.c:1545
int port
Definition: skge.h:2498
u8 duplex
Definition: skge.h:2506
Definition: hw.c:16
struct skge_hw * hw
Definition: skge.h:2496
u8 port
Port number.
Definition: CIB_PRM.h:31
enum pause_status flow_status
Definition: skge.h:2504
static u16 yukon_speed(const struct skge_hw *hw __unused, u16 aux)
Definition: skge.c:1512
#define PHY_M_PS_PAUSE_MSK
Definition: skge.h:1451
#define DUPLEX_FULL
Definition: bnx2.h:111
#define PFX
Definition: sis190.h:34
#define DBGIO(...)
Definition: compiler.h:549
Definition: skge.h:2460
static u16 gm_phy_read(struct skge_hw *hw, int port, u16 reg)
Definition: skge.c:1199
#define SK_REG(port, reg)
Definition: skge.h:2548
struct net_device * netdev
Definition: skge.h:2497
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
static void yukon_link_up(struct skge_port *skge)
Definition: skge.c:1524
uint16_t reason
Rejection reason.
Definition: ib_mad.h:20
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
u16 speed
Definition: skge.h:2507
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
#define DUPLEX_HALF
Definition: bnx2.h:110
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References DBG, DBGIO, skge_port::duplex, DUPLEX_FULL, DUPLEX_HALF, FLOW_STAT_LOC_SEND, FLOW_STAT_NONE, FLOW_STAT_REM_SEND, FLOW_STAT_SYMMETRIC, skge_port::flow_status, gm_phy_read(), GMAC_CTRL, GMC_PAUSE_OFF, GMC_PAUSE_ON, skge_port::hw, net_device::name, skge_port::netdev, NULL, PFX, PHY_B_1000S_MSF, PHY_M_AN_RF, PHY_M_IS_AN_COMPL, PHY_M_IS_DUP_CHANGE, PHY_M_IS_LSP_CHANGE, PHY_M_IS_LST_CHANGE, PHY_M_PS_FULL_DUP, PHY_M_PS_LINK_UP, PHY_M_PS_PAUSE_MSK, PHY_M_PS_RX_P_EN, PHY_M_PS_SPDUP_RES, PHY_M_PS_TX_P_EN, PHY_MARV_1000T_STAT, PHY_MARV_AUNE_LP, PHY_MARV_INT_STAT, PHY_MARV_PHY_STAT, port, skge_port::port, reason, SK_REG, skge_write8(), skge_port::speed, SPEED_1000, yukon_link_down(), yukon_link_up(), and yukon_speed().

Referenced by skge_phyirq().

◆ skge_ramset()

static void skge_ramset ( struct skge_hw hw,
u16  q,
u32  start,
size_t  len 
)
static

Definition at line 1644 of file skge.c.

1645 {
1646  u32 end;
1647 
1648  start /= 8;
1649  len /= 8;
1650  end = start + len - 1;
1651 
1656  skge_write32(hw, RB_ADDR(q, RB_END), end);
1657 
1658  if (q == Q_R1 || q == Q_R2) {
1659  /* Set thresholds on receive queue's */
1661  start + (2*len)/3);
1663  start + (len/3));
1664  } else {
1665  /* Enable store & forward on Tx queue's because
1666  * Tx FIFO is only 4K on Genesis and 1K on Yukon
1667  */
1669  }
1670 
1672 }
Definition: skge.h:539
Definition: skge.h:540
Definition: hw.c:16
Definition: skge.h:550
#define RB_ADDR(offs, queue)
Definition: skge.h:590
uint32_t start
Starting offset.
Definition: netvsc.h:12
Definition: skge.h:558
Definition: skge.h:557
Definition: skge.h:541
Definition: skge.h:542
uint32_t len
Length.
Definition: ena.h:14
uint32_t end
Ending offset.
Definition: netvsc.h:18
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
uint32_t u32
Definition: stdint.h:23
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References end, len, Q_R1, Q_R2, RB_ADDR, RB_CTRL, RB_ENA_OP_MD, RB_ENA_STFWD, RB_END, RB_RP, RB_RST_CLR, RB_RX_LTPP, RB_RX_UTPP, RB_START, RB_WP, skge_write32(), skge_write8(), and start.

Referenced by skge_up().

◆ skge_qset()

static void skge_qset ( struct skge_port skge,
u16  q,
const struct skge_element e 
)
static

Definition at line 1675 of file skge.c.

1677 {
1678  struct skge_hw *hw = skge->hw;
1679  u32 watermark = 0x600;
1680  u64 base = skge->dma + (e->desc - skge->mem);
1681 
1682  /* optimization to reduce window on 32bit/33mhz */
1683  if ((skge_read16(hw, B0_CTST) & (CS_BUS_CLOCK | CS_BUS_SLOT_SZ)) == 0)
1684  watermark /= 2;
1685 
1687  skge_write32(hw, Q_ADDR(q, Q_F), watermark);
1688  skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32));
1689  skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base);
1690 }
void * desc
Definition: skge.h:2449
Definition: hw.c:16
Definition: skge.h:523
struct skge_hw * hw
Definition: skge.h:2496
Definition: skge.h:519
u32 dma
Definition: skge.h:2511
uint64_t u64
Definition: stdint.h:25
Definition: skge.h:2460
Definition: skge.h:78
uint16_t base
Base address.
Definition: edd.h:14
Definition: skge.h:518
void * mem
Definition: skge.h:2510
#define Q_ADDR(reg, offs)
Definition: skge.h:534
#define CSR_CLR_RESET
Definition: skge.h:793
Definition: skge.h:524
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
uint32_t u32
Definition: stdint.h:23
static u16 skge_read16(const struct skge_hw *hw, int reg)
Definition: skge.h:2522

References B0_CTST, base, CS_BUS_CLOCK, CS_BUS_SLOT_SZ, CSR_CLR_RESET, skge_element::desc, skge_port::dma, skge_port::hw, skge_port::mem, Q_ADDR, Q_CSR, Q_DA_H, Q_DA_L, Q_F, skge_read16(), and skge_write32().

Referenced by skge_up().

◆ skge_free()

void skge_free ( struct net_device dev)

Definition at line 1692 of file skge.c.

1693 {
1694  struct skge_port *skge = netdev_priv(dev);
1695 
1696  free(skge->rx_ring.start);
1697  skge->rx_ring.start = NULL;
1698 
1699  free(skge->tx_ring.start);
1700  skge->tx_ring.start = NULL;
1701 
1702  free_dma(skge->mem, RING_SIZE);
1703  skge->mem = NULL;
1704  skge->dma = 0;
1705 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
struct skge_ring tx_ring
Definition: skge.h:2500
u32 dma
Definition: skge.h:2511
struct skge_element * start
Definition: skge.h:2456
#define RING_SIZE
Definition: skge.h:32
static void(* free)(struct refcnt *refcnt))
Definition: refcnt.h:54
struct skge_ring rx_ring
Definition: skge.h:2501
void * mem
Definition: skge.h:2510
static void free_dma(void *ptr, size_t size)
Free memory allocated with malloc_dma()
Definition: malloc.h:81
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362

References skge_port::dma, free, free_dma(), skge_port::mem, netdev_priv(), NULL, RING_SIZE, skge_port::rx_ring, skge_ring::start, and skge_port::tx_ring.

Referenced by skge_down(), and skge_up().

◆ skge_rx_stop()

static void skge_rx_stop ( struct skge_hw hw,
int  port 
)
static

Definition at line 1782 of file skge.c.

1783 {
1788 }
Definition: hw.c:16
Definition: skge.h:523
Definition: skge.h:550
#define RB_ADDR(offs, queue)
Definition: skge.h:590
u8 port
Port number.
Definition: CIB_PRM.h:31
Definition: skge.h:558
Definition: skge.h:557
static const int rxqaddr[]
Definition: skge.c:86
Definition: skge.h:782
#define Q_ADDR(reg, offs)
Definition: skge.h:534
#define CSR_SET_RESET
Definition: skge.h:790
static void skge_write32(const struct skge_hw *hw, int reg, u32 val)
Definition: skge.h:2532
static void skge_write8(const struct skge_hw *hw, int reg, u8 val)
Definition: skge.h:2542

References CSR_SET_RESET, CSR_STOP, port, Q_ADDR, Q_CSR, Q_R1, Q_R2, RB_ADDR, RB_CTRL, RB_DIS_OP_MD, RB_RST_SET, rxqaddr, skge_write32(), and skge_write8().

Referenced by skge_down().

◆ skge_tx_avail()

static int skge_tx_avail ( const struct skge_ring ring)
inlinestatic

Definition at line 1856 of file skge.c.

1857 {
1858  mb();
1859  return ((ring->to_clean > ring->to_use) ? 0 : NUM_TX_DESC)
1860  + (ring->to_clean - ring->to_use) - 1;
1861 }
struct skge_element * to_clean
Definition: skge.h:2454
void mb(void)
Memory barrier.
#define NUM_TX_DESC
Definition: igbvf.h:280
struct skge_element * to_use
Definition: skge.h:2455

References mb(), NUM_TX_DESC, skge_ring::to_clean, and skge_ring::to_use.

Referenced by skge_xmit_frame().

◆ phy_length()

static u16 phy_length ( const struct skge_hw hw,
u32  status 
)
inlinestatic

Definition at line 1922 of file skge.c.

1923 {
1924  if (hw->chip_id == CHIP_ID_GENESIS)
1925  return status >> XMR_FS_LEN_SHIFT;
1926  else
1927  return status >> GMR_FS_LEN_SHIFT;
1928 }
Definition: hw.c:16
uint8_t status
Status.
Definition: ena.h:16

References CHIP_ID_GENESIS, GMR_FS_LEN_SHIFT, status, and XMR_FS_LEN_SHIFT.

Referenced by skge_rx_done().

◆ bad_phy_status()

static int bad_phy_status ( const struct skge_hw hw,
u32  status 
)
inlinestatic

Definition at line 1930 of file skge.c.

1931 {
1932  if (hw->chip_id == CHIP_ID_GENESIS)
1933  return (status & (XMR_FS_ERR | XMR_FS_2L_VLAN)) != 0;
1934  else
1935  return (status & GMR_FS_ANY_ERR) ||
1936  (status & GMR_FS_RX_OK) == 0;
1937 }
Definition: hw.c:16
uint8_t status
Status.
Definition: ena.h:16

References CHIP_ID_GENESIS, GMR_FS_ANY_ERR, GMR_FS_RX_OK, status, XMR_FS_2L_VLAN, and XMR_FS_ERR.

Referenced by skge_rx_done().

◆ skge_tx_done()

static void skge_tx_done ( struct net_device dev)
static

Definition at line 1940 of file skge.c.

1941 {
1942  struct skge_port *skge = netdev_priv(dev);
1943  struct skge_ring *ring = &skge->tx_ring;
1944  struct skge_element *e;
1945 
1946  skge_write8(skge->hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F);
1947 
1948  for (e = ring->to_clean; e != ring->to_use; e = e->next) {
1949  u32 control = ((const struct skge_tx_desc *) e->desc)->control;
1950 
1951  if (control & BMU_OWN)
1952  break;
1953 
1954  netdev_tx_complete(dev, e->iob);
1955  }
1956  skge->tx_ring.to_clean = e;
1957 
1958  /* Can run lockless until we need to synchronize to restart queue. */
1959  mb();
1960 }
static void * netdev_priv(struct net_device *netdev)
Get driver private area for this network device.
Definition: netdevice.h:566
static void netdev_tx_complete(struct net_device *netdev, struct io_buffer *iobuf)
Complete network transmission.
Definition: netdevice.h:746
int port
Definition: skge.h:2498
struct io_buffer * iob
Definition: skge.h:2450
struct skge_element * next
Definition: skge.h:2448
void * desc
Definition: skge.h:2449
struct skge_ring tx_ring
Definition: skge.h:2500
Definition: skge.h:523
struct skge_hw * hw
Definition: skge.h:2496