70 DBGC ( intelxl,
"INTELXL %p could not map MSI-X target: %s\n",
77 DBGC ( intelxl,
"INTELXL %p could not enable MSI-X: %s\n",
151 admin->
desc = ( ( (
void * ) admin->
buf ) + buf_len );
153 DBGC ( intelxl,
"INTELXL %p A%cQ is at [%08lx,%08lx) buf " 154 "[%08lx,%08lx)\n", intelxl,
155 ( ( admin == &intelxl->
command ) ?
'T' :
'R' ),
173 void *admin_regs = ( intelxl->
regs + admin->
base );
191 admin_regs +
regs->bah );
199 admin_regs +
regs->len );
211 void *admin_regs = ( intelxl->
regs + admin->
base );
262 memset ( buf, 0,
sizeof ( *buf ) );
273 unsigned int index ) {
298 void *admin_regs = ( intelxl->
regs + admin->
base );
314 DBGC2 ( intelxl,
"INTELXL %p admin command %#x opcode %#04x",
318 DBGC2 ( intelxl,
":\n" );
341 cookie =
cmd->cookie;
360 DBGC2 ( intelxl,
"INTELXL %p admin command %#x response:\n",
370 if (
cmd->cookie != cookie ) {
371 DBGC ( intelxl,
"INTELXL %p admin command %#x bad " 372 "cookie %#x\n", intelxl,
index,
379 if ( (
cmd->ret != 0 ) && (
cmd->ret != silence ) ) {
380 DBGC ( intelxl,
"INTELXL %p admin command %#x error " 381 "%d\n", intelxl,
index,
392 DBGC ( intelxl,
"INTELXL %p timed out waiting for admin command %#x:\n",
420 DBGC ( intelxl,
"INTELXL %p firmware v%d.%d API v%d.%d\n",
427 DBGC ( intelxl,
"INTELXL %p unsupported API v%d\n",
519 DBGC ( intelxl,
"INTELXL %p has no MAC address\n", intelxl );
525 DBGC ( intelxl,
"INTELXL %p has invalid MAC address (%s)\n",
531 DBGC ( intelxl,
"INTELXL %p has MAC address %s\n",
587 pxe = &
cmd->params.pxe;
596 DBGC ( intelxl,
"INTELXL %p already in non-PXE mode\n",
624 sw = &
cmd->params.sw;
633 DBGC2 ( intelxl,
"INTELXL %p SEID %#04x:\n",
640 DBGC ( intelxl,
"INTELXL %p VSI %#04x uplink %#04x " 641 "downlink %#04x conn %#02x\n", intelxl,
647 }
while ( (
next =
sw->next ) );
650 if ( ! intelxl->
vsi ) {
651 DBGC ( intelxl,
"INTELXL %p has no VSI\n", intelxl );
686 DBGC ( intelxl,
"INTELXL %p VSI %#04x queue %#04x qset %#04x\n",
711 promisc = &
cmd->params.promisc;
737 config = &
cmd->params.mac_config;
762 autoneg = &
cmd->params.autoneg;
794 DBGC ( intelxl,
"INTELXL %p PHY %#02x speed %#02x status %#02x\n",
821 DBGC ( intelxl,
"INTELXL %p unrecognised event opcode " 838 void *admin_regs = ( intelxl->
regs + admin->
base );
869 DBGC2 ( intelxl,
"INTELXL %p admin event %#x:\n",
870 intelxl, admin->
index );
899 goto err_alloc_event;
903 goto err_alloc_command;
996 DBGC ( intelxl,
"INTELXL %p ring %06x is at [%08lx,%08lx)\n",
1042 DBGC2 ( intelxl,
"INTELXL %p context %#08x:\n", intelxl,
op );
1058 pfcm_lanctxstat =
readl ( intelxl->
regs +
1068 for ( i = 0 ; i < (
sizeof ( line ) /
1069 sizeof ( line.
raw[0] ) ) ; i++ ) {
1074 &line,
sizeof ( line ) );
1096 for ( i = 0; i < (
sizeof ( *line ) /
sizeof ( line->
raw[0] ) ); i++ ) {
1112 pfcm_lanctxstat =
readl ( intelxl->
regs +
1121 DBGC ( intelxl,
"INTELXL %p timed out waiting for context: %#08x\n",
1122 intelxl, pfcm_lanctxctl );
1141 DBGC2 ( intelxl,
"INTELXL %p context %#08x len %#zx:\n",
1227 void *ring_regs = ( intelxl->
regs + ring->
reg );
1235 DBGC ( intelxl,
"INTELXL %p ring %06x failed to enable: " 1236 "%#08x\n", intelxl, ring->
tail, qxx_ena );
1252 void *ring_regs = ( intelxl->
regs + ring->
reg );
1271 DBGC ( intelxl,
"INTELXL %p ring %06x timed out waiting for disable: " 1272 "%#08x\n", intelxl, ring->
tail, qxx_ena );
1339 unsigned int rx_idx;
1340 unsigned int rx_tail;
1341 unsigned int refilled = 0;
1365 DBGC2 ( intelxl,
"INTELXL %p RX %d is [%08lx,%08lx)\n",
1423 goto err_mac_config;
1513 unsigned int tx_idx;
1514 unsigned int tx_tail;
1519 DBGC ( intelxl,
"INTELXL %p out of transmit descriptors\n",
1538 DBGC2 ( intelxl,
"INTELXL %p TX %d is [%08lx,%08lx)\n",
1552 unsigned int tx_idx;
1564 DBGC2 ( intelxl,
"INTELXL %p TX %d complete\n",
1582 unsigned int rx_idx;
1612 DBGC ( intelxl,
"INTELXL %p RX %d error (length %zd, " 1613 "flags %08x)\n", intelxl, rx_idx,
len,
1617 DBGC2 ( intelxl,
"INTELXL %p RX %d complete (length " 1618 "%zd)\n", intelxl, rx_idx,
len );
1703 memset ( intelxl, 0,
sizeof ( *intelxl ) );
1722 if ( ! intelxl->
regs ) {
1728 intelxl->
dma = &pci->
dma;
1734 if ( ! intelxl->
exp ) {
1735 DBGC ( intelxl,
"INTELXL %p missing PCIe capability\n",
1751 DBGC ( intelxl,
"INTELXL %p PF %d using port %d queues [%#04x-%#04x]\n",
1752 intelxl, intelxl->
pf, intelxl->
port, intelxl->
base,
1762 goto err_open_admin;
1766 goto err_admin_version;
1770 goto err_admin_driver;
1774 goto err_admin_clear_pxe;
1778 goto err_admin_switch;
1786 goto err_admin_promisc;
1790 goto err_admin_mac_read;
1814 goto err_register_netdev;
1822 err_register_netdev:
1827 err_admin_clear_pxe:
1873 PCI_ROM ( 0x8086, 0x0cf8,
"x710-n3000",
"X710 FPGA N3000", 0 ),
1874 PCI_ROM ( 0x8086, 0x0d58,
"xxv710-n3000",
"XXV710 FPGA N3000", 0 ),
1875 PCI_ROM ( 0x8086, 0x104e,
"x710-sfp-b",
"X710 10GbE SFP+", 0 ),
1876 PCI_ROM ( 0x8086, 0x104f,
"x710-kx-b",
"X710 10GbE backplane", 0 ),
1877 PCI_ROM ( 0x8086, 0x1572,
"x710-sfp",
"X710 10GbE SFP+", 0 ),
1878 PCI_ROM ( 0x8086, 0x1574,
"xl710-qemu",
"Virtual XL710", 0 ),
1879 PCI_ROM ( 0x8086, 0x1580,
"xl710-kx-b",
"XL710 40GbE backplane", 0 ),
1880 PCI_ROM ( 0x8086, 0x1581,
"xl710-kx-c",
"XL710 10GbE backplane", 0 ),
1881 PCI_ROM ( 0x8086, 0x1583,
"xl710-qda2",
"XL710 40GbE QSFP+", 0 ),
1882 PCI_ROM ( 0x8086, 0x1584,
"xl710-qda1",
"XL710 40GbE QSFP+", 0 ),
1883 PCI_ROM ( 0x8086, 0x1585,
"x710-qsfp",
"X710 10GbE QSFP+", 0 ),
1884 PCI_ROM ( 0x8086, 0x1586,
"x710-10gt",
"X710 10GBASE-T", 0 ),
1885 PCI_ROM ( 0x8086, 0x1587,
"x710-kr2",
"XL710 20GbE backplane", 0 ),
1886 PCI_ROM ( 0x8086, 0x1588,
"x710-kr2-a",
"XL710 20GbE backplane", 0 ),
1887 PCI_ROM ( 0x8086, 0x1589,
"x710-10gt4",
"X710 10GBASE-T4", 0 ),
1888 PCI_ROM ( 0x8086, 0x158a,
"xxv710",
"XXV710 25GbE backplane", 0 ),
1889 PCI_ROM ( 0x8086, 0x158b,
"xxv710-sfp28",
"XXV710 25GbE SFP28", 0 ),
1890 PCI_ROM ( 0x8086, 0x15ff,
"x710-10gt-b",
"X710 10GBASE-T", 0 ),
1891 PCI_ROM ( 0x8086, 0x37ce,
"x722-kx",
"X722 10GbE backplane", 0 ),
1892 PCI_ROM ( 0x8086, 0x37cf,
"x722-qsfp",
"X722 10GbE QSFP+", 0 ),
1893 PCI_ROM ( 0x8086, 0x37d0,
"x722-sfp",
"X722 10GbE SFP+", 0 ),
1894 PCI_ROM ( 0x8086, 0x37d1,
"x722-1gt",
"X722 1GBASE-T", 0 ),
1895 PCI_ROM ( 0x8086, 0x37d2,
"x722-10gt",
"X722 10GBASE-T", 0 ),
1896 PCI_ROM ( 0x8086, 0x37d3,
"x722-sfp-i",
"X722 10GbE SFP+", 0 ),
const char product_short_name[]
Product short name string.
struct intelxl_admin_descriptor * intelxl_admin_command_descriptor(struct intelxl_nic *intelxl)
Get next admin command queue descriptor.
static int intelxl_admin_promisc(struct intelxl_nic *intelxl)
Set VSI promiscuous modes.
#define INTELXL_PFLAN_QALLOC_FIRSTQ(x)
First queue.
#define INTELXL_GLLAN_TXPRE_QDIS(x)
Global Transmit Pre Queue Disable register.
int intelxl_transmit(struct net_device *netdev, struct io_buffer *iobuf)
Transmit packet.
#define VLAN_TAG(tci)
Extract VLAN tag from tag control information.
#define INTELXL_ADMIN_PROMISC_FL_VLAN
Promiscuous VLAN mode.
#define INTELXL_QRX(x)
Global Receive Queue register block.
struct option_descriptor read[1]
#define INTELXL_ADMIN_AUTONEG_FL_RESTART
Restart autonegotiation.
unsigned long membase
Memory base.
#define INTELXL_ADMIN_SHUTDOWN
Admin queue Shutdown command.
size_t len
Length (in bytes)
#define INTELXL_ADMIN_FL_ERR
Admin descriptor completed in error.
struct dma_device * dma
DMA device.
#define INTELXL_PFLAN_QALLOC_LASTQ(x)
Last queue.
struct arbelprm_rc_send_wqe rc
#define INTELXL_CTX_RX_LEN(len)
Receive queue data buffer length.
void pci_msix_disable(struct pci_device *pci, struct pci_msix *msix)
Disable MSI-X interrupts.
#define INTELXL_ADMIN_BAH
Admin Queue Base Address High Register (offset)
#define iob_put(iobuf, len)
struct dma_device dma
DMA device.
#define INTELXL_PFFUNC_RID
Function Requester ID Information Register.
struct pci_msix cap
PCI capability.
void intelxl_destroy_ring(struct intelxl_nic *intelxl, struct intelxl_ring *ring)
Destroy descriptor ring.
static int intelxl_admin_switch(struct intelxl_nic *intelxl)
Get switch configuration.
#define INTELXL_ADMIN_EVT
PF Admin Event Queue register block.
#define INTELXL_PFLAN_QALLOC
PF Queue Allocation Register.
struct dma_mapping map
DMA mapping for dummy interrupt target.
int(* context)(struct intelxl_nic *intelxl, physaddr_t address)
Program queue context.
#define INTELXL_QXX_CTL_PFVF_Q_PF
PF queue.
static void intelxl_context_dump(struct intelxl_nic *intelxl, uint32_t op, size_t len)
Dump queue context (for debugging)
#define INTELXL_GLLAN_TXPRE_QDIS_QINDX(x)
Queue index.
#define INTELXL_ADMIN_LINK
Admin queue Get Link Status command.
#define le32_to_cpu(value)
int(* open)(struct net_device *netdev)
Open network device.
static int intelxl_context_tx(struct intelxl_nic *intelxl, physaddr_t address)
Program transmit queue context.
static int intelxl_open(struct net_device *netdev)
Open network device.
Admin queue Get Link Status command parameters.
uint32_t next
Next descriptor address.
#define INTELXL_ADMIN_SWITCH
Admin queue Get Switch Configuration command.
#define INTELXL_ADMIN_AUTONEG
Admin queue Restart Autonegotiation command.
#define INTELXL_QINT_RQCTL_NEXTQ_INDX(x)
Queue index.
void(* handle)(struct net_device *netdev, struct intelxl_admin_descriptor *evt, union intelxl_admin_buffer *buf)
Handle admin event.
#define INTELXL_PFCM_LANCTXCTL_OP_CODE_WRITE
Write context.
uint32_t vector
MSI-X vector.
#define INTELXL_ADMIN_LEN_ENABLE
Queue enable.
uint16_t queue[16]
Queue numbers.
#define INTELXL_QINT_TQCTL_NEXTQ_INDX_NONE
End of list.
#define INTELXL_ADMIN_CMD
PF Admin Command Queue register block.
union intelxl_admin_buffer * buf
Data buffers.
uint16_t qset[8]
Queue set handles for each traffic class.
struct intelxl_admin_vsi_buffer vsi
Get VSI Parameters data buffer.
static void netdev_tx_complete_next(struct net_device *netdev)
Complete network transmission.
Admin queue register offsets.
Admin queue Restart Autonegotiation command parameters.
static int intelxl_enable_ring(struct intelxl_nic *intelxl, struct intelxl_ring *ring)
Enable descriptor ring.
struct pci_device_id * ids
PCI ID table.
uint8_t type
Switching element type.
uint64_t address
Base address.
static int intelxl_admin_shutdown(struct intelxl_nic *intelxl)
Shutdown admin queues.
union intelxl_ring::@66 desc
Descriptors.
size_t mtu
Maximum transmission unit length.
#define INTELXL_TX_DATA_EOP
Transmit data descriptor end of packet.
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
Admin queue Get VSI Parameters command parameters.
unsigned int qset
Queue set handle.
#define INTELXL_RX_WB_FL_DD
Receive writeback descriptor complete.
#define INTELXL_TX_DATA_DTYP
Transmit data descriptor type.
int intelxl_admin_clear_pxe(struct intelxl_nic *intelxl)
Clear PXE mode.
#define INTELXL_PFINT_ICR0_ENA
PF Interrupt Zero Cause Enablement Register.
unsigned int prod
Producer index.
struct intelxl_admin command
Admin command queue.
Admin queue Shutdown command parameters.
#define ENOENT
No such file or directory.
char name[32]
Driver name.
static int intelxl_context_rx(struct intelxl_nic *intelxl, physaddr_t address)
Program receive queue context.
static __always_inline void dma_set_mask_64bit(struct dma_device *dma)
Set 64-bit addressable space mask.
union intelxl_admin_buffer * intelxl_admin_command_buffer(struct intelxl_nic *intelxl)
Get next admin command queue data buffer.
unsigned long long uint64_t
#define INTELXL_INT_DYN_CTL_INTENA
Enable.
static void intelxl_enable_admin(struct intelxl_nic *intelxl, struct intelxl_admin *admin)
Enable admin queue.
struct intelxl_admin_driver_buffer driver
Driver Version data buffer.
struct dma_device * dma
DMA device.
static int intelxl_admin_mac_read(struct net_device *netdev)
Get MAC address.
static void intelxl_poll_tx(struct net_device *netdev)
Poll for completed packets.
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
#define cpu_to_le64(value)
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
#define INTELXL_CTX_RX_MFS(mfs)
Receive queue maximum frame size.
#define INTELXL_QXX_ENA_STAT
Enabled status.
struct intelxl_rx_writeback_descriptor wb
Receive writeback descriptor.
#define INTELXL_ALIGN
Alignment.
static int intelxl_disable_ring(struct intelxl_nic *intelxl, struct intelxl_ring *ring)
Disable descriptor ring.
uint8_t mac[ETH_ALEN]
MAC address.
unsigned int bal
Base Address Low Register offset.
struct golan_eq_context ctx
#define INTELXL_PFINT_ICR0_ENA_ADMINQ
Admin event.
size_t mfs
Maximum frame size.
struct intelxl_admin_switch_buffer sw
Get Switch Configuration data buffer.
#define INTELXL_PFGEN_PORTNUM_PORT_NUM(x)
Port number.
Admin queue Set MAC Configuration command parameters.
int intelxl_open_admin(struct intelxl_nic *intelxl)
Open admin queues.
unsigned int base
Register block base.
union intelxl_tx_descriptor * tx
Transmit descriptors.
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
static __always_inline unsigned long virt_to_phys(volatile const void *addr)
Convert virtual address to a physical address.
struct intelxl_admin_version api
API version.
#define INTELXL_CTX_RX_FL_DSIZE
Use 32-byte receive descriptors.
#define INTELXL_ADMIN_VSI
Admin queue Get VSI Parameters command.
struct device dev
Generic device.
unsigned int queue
Queue number.
Admin queue Clear PXE Mode command parameters.
unsigned int exp
PCI Express capability offset.
#define INTELXL_ADMIN_PROMISC
Admin queue Set VSI Promiscuous Modes command.
#define ENOTSUP
Operation not supported.
#define INTELXL_ADMIN_NUM_DESC
Number of admin queue descriptors.
#define INTELXL_QXX_ENA
Queue Enable Register (offset)
#define INTELXL_TX_DATA_LEN(len)
Transmit data descriptor length.
#define INTELXL_ADMIN_MAC_READ_VALID_LAN
LAN MAC address is valid.
Intel 40 Gigabit Ethernet network card driver.
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
#define INTELXL_PFCM_LANCTXCTL_TYPE_RX
RX queue type.
static void intelxl_refill_rx(struct intelxl_nic *intelxl)
Refill receive descriptor ring.
#define INTELXL_PFCM_LANCTXCTL_TYPE_TX
TX queue type.
static struct pci_device_id intelxl_nics[]
PCI device IDs.
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
#define ENOMEM
Not enough space.
unsigned int cons
Consumer index.
#define INTELXL_PFGEN_PORTNUM
PF LAN Port Number Register.
void * memcpy(void *dest, const void *src, size_t len) __nonnull
uint8_t pf[ETH_ALEN]
Physical function MAC address.
static int intelxl_context(struct intelxl_nic *intelxl, struct intelxl_context_line *line, size_t len, uint32_t op)
Program queue context.
struct intelxl_ring rx
Receive descriptor ring.
static void intelxl_init_admin(struct intelxl_admin *admin, unsigned int base, const struct intelxl_admin_offsets *regs)
Initialise admin queue.
#define INTELXL_QINT_TQCTL_CAUSE_ENA
Enable.
#define INTELXL_ADMIN_FL_CMP
Admin descriptor contains a completion.
u32 version
Driver version.
unsigned int index
Queue index.
Transmit writeback descriptor.
#define INTELXL_ADMIN_CLEAR_PXE_MAGIC
Clear PXE Mode magic value.
void dma_free(struct dma_mapping *map, void *addr, size_t len)
Unmap and free DMA-coherent buffer.
struct io_buffer * rx_iobuf[INTELXL_RX_NUM_DESC]
Receive I/O buffers.
#define INTELXL_PFINT_LNKLST0_FIRSTQ_TYPE_RX
Receive queue.
static void intelxl_admin_event_init(struct intelxl_nic *intelxl, unsigned int index)
Initialise admin event queue descriptor.
#define INTELXL_PFINT_DYN_CTL0
PF Interrupt Zero Dynamic Control Register.
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
#define INTELXL_MAX_PKT_LEN
Maximum packet length (excluding CRC)
uint8_t magic
Magic value.
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
static void intelxl_admin_event(struct net_device *netdev, struct intelxl_admin_descriptor *evt, union intelxl_admin_buffer *buf __unused)
Handle admin event.
#define INTELXL_QXX_CTL_PFVF_PF_INDX(x)
PF index.
#define INTELXL_QINT_RQCTL_CAUSE_ENA
Enable.
Admin queue version number.
static void pci_msix_mask(struct pci_msix *msix, unsigned int vector)
Mask MSI-X interrupt vector.
unsigned int vsi
Virtual Station Interface switching element ID.
#define INTELXL_QINT_RQCTL_NEXTQ_TYPE_TX
Transmit queue.
struct intelxl_tx_data_descriptor data
Transmit data descriptor.
#define INTELXL_TX_NUM_DESC
Number of transmit descriptors.
void * priv
Driver private data.
uint16_t high
MAC address first 16 bits, byte-swapped.
#define INTELXL_PFCM_LANCTXCTL_QUEUE_NUM(x)
Queue number.
#define __unused
Declare a variable or data structure as unused.
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
#define INTELXL_PFCM_LANCTXSTAT
CMLAN Context Status Register.
static struct net_device * netdev
static __always_inline physaddr_t iob_dma(struct io_buffer *iobuf)
Get I/O buffer DMA address.
u32 link
Link to next descriptor.
#define INTELXL_RX_NUM_DESC
Number of receive descriptors.
static void intelxl_refill_admin(struct intelxl_nic *intelxl)
Refill admin event queue.
#define INTELXL_QXX_ENA_REQ
Enable request.
static void pci_msix_unmask(struct pci_msix *msix, unsigned int vector)
Unmask MSI-X interrupt vector.
#define INTELXL_ADMIN_VERSION
Admin queue Get Version command.
void dma_unmap(struct dma_mapping *map)
Unmap buffer.
#define INTELXL_CTX_TX_FL_NEW
New transmit queue context.
int intelxl_create_ring(struct intelxl_nic *intelxl, struct intelxl_ring *ring)
Create descriptor ring.
void intelxl_poll_admin(struct net_device *netdev)
Poll admin event queue.
uint32_t low
MAC address last 32 bits, byte-swapped.
void unregister_netdev(struct net_device *netdev)
Unregister network device.
uint16_t downlink
Downlink switching element ID.
struct intelxl_msix msix
MSI-X interrupt.
#define INTELXL_ADMIN_API_MAJOR
Admin queue API major version.
#define INTELXL_ADMIN_EEXIST
Error: attempt to create something that already exists.
struct dma_mapping map
DMA mapping.
unsigned int reg
Register block.
#define cpu_to_le32(value)
void intelxl_free_ring(struct intelxl_nic *intelxl __unused, struct intelxl_ring *ring)
Free descriptor ring.
static int intelxl_alloc_admin(struct intelxl_nic *intelxl, struct intelxl_admin *admin)
Allocate admin queue.
#define EPROTO
Protocol error.
struct intelxl_admin_mac_read_buffer mac_read
Manage MAC Address Read data buffer.
#define INTELXL_QUEUE_DISABLE_MAX_WAIT_MS
Maximum time to wait for a queue to become disabled.
#define INTELXL_TX_DATA_RS
Transmit data descriptor report status.
#define INTELXL_ADMIN_MAC_READ
Admin queue Manage MAC Address Read command.
char * strerror(int errno)
Retrieve string representation of error number.
Admin queue Driver Version command parameters.
Admin queue Manage MAC Address Read command parameters.
struct io_buffer * alloc_rx_iob(size_t len, struct dma_device *dma)
Allocate and map I/O buffer for receive DMA.
union intelxl_rx_descriptor * rx
Receive descriptors.
int register_netdev(struct net_device *netdev)
Register network device.
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
const char * eth_ntoa(const void *ll_addr)
Transcribe Ethernet address.
unsigned int intr
Interrupt control register.
static int intelxl_admin_autoneg(struct intelxl_nic *intelxl)
Restart autonegotiation.
#define INTELXL_PFCM_LANCTXCTL_SUB_LINE(x)
Sub-line.
struct intelxl_admin_descriptor * desc
Descriptors.
#define INTELXL_QTX(x)
Global Transmit Queue register block.
#define ENODEV
No such device.
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
static void intelxl_free_admin(struct intelxl_nic *intelxl __unused, struct intelxl_admin *admin)
Free admin queue.
#define INTELXL_ADMIN_MAC_WRITE
Admin queue Manage MAC Address Write command.
struct dma_mapping map
Descriptor ring DMA mapping.
static void intelxl_disable_admin(struct intelxl_nic *intelxl, struct intelxl_admin *admin)
Disable admin queue.
#define INTELXL_ADMIN_FL_BUF
Admin descriptor uses data buffer.
void intelxl_msix_disable(struct intelxl_nic *intelxl, struct pci_device *pci, unsigned int vector)
Disable MSI-X dummy interrupt.
unsigned int port
Port number.
#define INTELXL_ADMIN_BAL
Admin Queue Base Address Low Register (offset)
Admin queue Get Version command parameters.
Transmit data descriptor.
#define INTELXL_CTX_TX_QSET(qset)
Transmit queue set.
#define INTELXL_QUEUE_PRE_DISABLE_DELAY_US
Time to wait for a transmit queue to become pre-disabled.
An Intel 40 Gigabit network card.
#define INTELXL_PFINT_LNKLST0
PF Interrupt Zero Linked List Register.
#define INTELXL_TX_DATA_JFDI
Transmit data descriptor pretty please.
uint16_t vsi
VSI switching element ID.
union intelxl_admin_params params
Parameters.
uint8_t connection
Connection type.
A PCI device ID list entry.
#define le16_to_cpu(value)
static void intelxl_init_ring(struct intelxl_ring *ring, unsigned int count, size_t len, int(*context)(struct intelxl_nic *intelxl, physaddr_t address))
Initialise descriptor ring.
#define INTELXL_ADMIN_LEN_LEN(x)
Queue length.
static int is_valid_ether_addr(const void *addr)
Check if Ethernet address is valid.
uint32_t high
Buffer address high.
struct intelxl_ring tx
Transmit descriptor ring.
static void intelxl_close(struct net_device *netdev)
Close network device.
static struct xen_remove_from_physmap * remove
#define PCI_CAP_ID_EXP
PCI Express.
int intelxl_admin_command(struct intelxl_nic *intelxl)
Issue admin queue command.
struct pci_driver intelxl_driver __pci_driver
PCI driver.
Network device operations.
#define INTELXL_MSIX_VECTOR
MSI-X interrupt vector.
uint16_t vsi
VSI switching element ID.
struct device * dev
Underlying hardware device.
static int intelxl_admin_version(struct intelxl_nic *intelxl)
Get firmware version.
Admin queue Set VSI Promiscuous Modes command parameters.
#define DMA_RX
Device will write data to host memory.
#define INTELXL_CTX_TX_BASE(base)
Transmit queue base address.
void * dma_alloc(struct dma_device *dma, struct dma_mapping *map, size_t len, size_t align)
Allocate and map DMA-coherent buffer.
#define INTELXL_CTX_RX_FL_CRCSTRIP
Strip CRC from received packets.
#define INTELXL_ADMIN_MAC_CONFIG
Admin queue Set MAC Configuration command.
Network device management.
#define INTELXL_QINT_TQCTL(x)
Transmit Queue Interrupt Cause Control Register.
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
const int product_major_version
Product major version.
#define INTELXL_TX_WB_FL_DD
Transmit writeback descriptor complete.
unsigned int pf
Physical function number.
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
static uint16_t struct vmbus_xfer_pages_operations * op
#define ENXIO
No such device or address.
uint32_t low
Buffer address low.
uint16_t uplink
Uplink switching element ID.
static int intelxl_admin_mac_write(struct net_device *netdev)
Set MAC address.
#define INTELXL_ADMIN_TAIL
Admin Queue Tail Register (offset)
uint16_t mfs
Maximum frame size.
#define INTELXL_QXX_TAIL
Queue Tail Pointer Register (offset)
#define INTELXL_RX_WB_LEN(len)
Receive writeback descriptor length.
__weak void vlan_netdev_rx(struct net_device *netdev, unsigned int tag, struct io_buffer *iobuf)
Add VLAN tag-stripped packet to queue (when VLAN support is not present)
#define INTELXL_GLLAN_TXPRE_QDIS_SET_QDIS
Set disable.
void free_rx_iob(struct io_buffer *iobuf)
Unmap and free I/O buffer for receive DMA.
static int intelxl_probe(struct pci_device *pci)
Probe PCI device.
#define ENOBUFS
No buffer space available.
#define INTELXL_QUEUE_ENABLE_DELAY_US
Time to wait for a queue to become enabled.
int(* probe)(struct pci_device *pci)
Probe device.
#define INTELXL_ADMIN_LINK_UP
Link is up.
Admin queue Manage MAC Address Write command parameters.
void * data
Start of data.
#define INTELXL_ADMIN_LINK_NOTIFY
Notify driver of link status changes.
#define INTELXL_PFINT_LNKLST0_FIRSTQ_INDX(x)
Queue index.
static int intelxl_context_line(struct intelxl_nic *intelxl, struct intelxl_context_line *line, unsigned int index, uint32_t op)
Program queue context line.
int pci_msix_enable(struct pci_device *pci, struct pci_msix *msix)
Enable MSI-X interrupts.
#define EIO
Input/output error.
#define INTELXL_PFCM_LANCTXSTAT_DONE
Complete.
__weak void vlan_netdev_rx_err(struct net_device *netdev, unsigned int tag __unused, struct io_buffer *iobuf, int rc)
Discard received VLAN tag-stripped packet (when VLAN support is not present)
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
u8 rx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets from the AP.
#define INTELXL_GLLAN_TXPRE_QDIS_CLEAR_QDIS
Clear disable.
#define cpu_to_le16(value)
#define INTELXL_ADMIN_PROMISC_FL_BROADCAST
Promiscuous broadcast mode.
unsigned int base
Absolute queue number base.
void iounmap(volatile const void *io_addr)
Unmap I/O address.
struct intelxl_admin_switch_config cfg
Switch configuration.
unsigned int tail
Tail register.
Receive writeback descriptor.
unsigned int tail
Tail Register offset.
#define INTELXL_ADMIN_AUTONEG_FL_ENABLE
Enable link.
#define INTELXL_QINT_RQCTL(x)
Receive Queue Interrupt Cause Control Register.
struct intelxl_admin_buffer_params buffer
Additional data buffer command parameters.
int snprintf(char *buf, size_t size, const char *fmt,...)
Write a formatted string to a buffer.
const struct intelxl_admin_offsets * regs
Register offsets.
void intelxl_reopen_admin(struct intelxl_nic *intelxl)
Reopen admin queues (after virtual function reset)
#define INTELXL_ADMIN_MAC_CONFIG_FL_CRC
Append CRC on transmit.
#define INTELXL_BAR_SIZE
BAR size.
Admin queue Get Switch Configuration command parameters.
#define INTELXL_ADMIN_SHUTDOWN_UNLOADING
Driver is unloading.
uint16_t valid
Valid flags.
static int intelxl_admin_vsi(struct intelxl_nic *intelxl)
Get VSI parameters.
void shutdown(int flags)
Shut down iPXE.
struct intelxl_tx_writeback_descriptor wb
Transmit writeback descriptor.
#define INTELXL_ADMIN_PROMISC_FL_UNICAST
Promiscuous unicast mode.
const char product_name[]
Product name string.
uint8_t ll_addr[MAX_LL_ADDR_LEN]
Link-layer address.
size_t max_pkt_len
Maximum packet length.
static struct net_device_operations intelxl_operations
Network device operations.
void intelxl_close_admin(struct intelxl_nic *intelxl)
Close admin queues.
#define INTELXL_ADMIN_DRIVER
Admin queue Driver Version command.
void pci_msix_map(struct pci_msix *msix, unsigned int vector, physaddr_t address, uint32_t data)
Map MSI-X interrupt vector.
#define INTELXL_PFFUNC_RID_FUNC_NUM(x)
Function number.
#define INTELXL_CTX_TX_COUNT(count)
Transmit queue count.
#define INTELXL_ADMIN_SWITCH_TYPE_VSI
Virtual Station Inferface element type.
#define INTELXL_RX_FILL
Receive descriptor ring fill level.
static __always_inline physaddr_t dma(struct dma_mapping *map, void *addr)
Get DMA address from virtual address.
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
static int intelxl_admin_link(struct net_device *netdev)
Get link status.
static int intelxl_admin_driver(struct intelxl_nic *intelxl)
Report driver version.
uint64_t tag
Identity tag.
#define INTELXL_ADMIN_CLEAR_PXE
Admin queue Clear PXE Mode command.
#define INTELXL_CTX_MAX_WAIT_MS
Maximum time to wait for a context operation to complete.
uint16_t seid
Switching element ID.
#define INTELXL_RX_WB_FL_RXE
Receive writeback descriptor error.
#define INTELXL_ADMIN_FL_RD
Admin descriptor uses data buffer for command parameters.
#define INTELXL_CTX_RX_BASE_COUNT(base, count)
Receive queue base address and queue count.
static void intelxl_remove(struct pci_device *pci)
Remove PCI device.
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
#define NULL
NULL pointer (VOID *)
#define INTELXL_ADMIN_MAX_WAIT_MS
Maximum time to wait for an admin request to complete.
#define INTELXL_ADMIN_LEN
Admin Queue Length Register (offset)
#define INTELXL_ADMIN_PROMISC_FL_MULTICAST
Promiscuous multicast mode.
struct intelxl_admin event
Admin event queue.
#define INTELXL_QXX_CTL
Queue Control Register (offset)
#define ETIMEDOUT
Connection timed out.
#define INTELXL_QTX_HEAD(x)
Global Transmit Queue Head register.
#define INTELXL_ADMIN_FL_DD
Admin descriptor done.
#define PCI_ROM(_vendor, _device, _name, _description, _data)
#define INTELXL_PFCM_LANCTXCTL
CMLAN Context Control Register.
const int product_minor_version
Product minor version.
void intelxl_empty_rx(struct intelxl_nic *intelxl)
Discard unused receive I/O buffers.
#define INTELXL_TX_FILL
Transmit descriptor ring maximum fill level.
#define INTELXL_ADMIN_HEAD
Admin Queue Head Register (offset)
int intelxl_admin_mac_config(struct intelxl_nic *intelxl)
Set MAC configuration.
#define INTELXL_PFCM_LANCTXDATA(x)
CMLAN Context Data Register.
void intelxl_poll(struct net_device *netdev)
Poll for completed and received packets.
int intelxl_alloc_ring(struct intelxl_nic *intelxl, struct intelxl_ring *ring)
Allocate descriptor ring.
uint32_t msg
MSI-X dummy interrupt target.
#define INTELXL_RX_WB_FL_VLAN
Receive writeback descriptor VLAN tag present.
struct intelxl_rx_data_descriptor data
Receive data descriptor.
u8 tx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets to the AP.
static void intelxl_poll_rx(struct net_device *netdev)
Poll for received packets.
void * memset(void *dest, int character, size_t len) __nonnull
int intelxl_msix_enable(struct intelxl_nic *intelxl, struct pci_device *pci, unsigned int vector)
Enable MSI-X dummy interrupt.
#define INTELXL_PFCM_LANCTXCTL_OP_CODE_READ
Read context.