intelxl.c File Reference

Intel 40 Gigabit Ethernet network card driver. More...

#include <stdint.h>
#include <string.h>
#include <stdio.h>
#include <unistd.h>
#include <errno.h>
#include <byteswap.h>
#include <ipxe/netdevice.h>
#include <ipxe/ethernet.h>
#include <ipxe/if_ether.h>
#include <ipxe/vlan.h>
#include <ipxe/iobuf.h>
#include <ipxe/pci.h>
#include <ipxe/version.h>
#include "intelxl.h"

Go to the source code of this file.

Functions
	FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
	FILE_SECBOOT (PERMITTED)
int	intelxl_msix_enable (struct intelxl_nic *intelxl, struct pci_device *pci, unsigned int vector)
	Enable MSI-X dummy interrupt.
void	intelxl_msix_disable (struct intelxl_nic *intelxl, struct pci_device *pci, unsigned int vector)
	Disable MSI-X dummy interrupt.
static int	intelxl_alloc_admin (struct intelxl_nic *intelxl, struct intelxl_admin *admin)
	Allocate admin queue.
static void	intelxl_enable_admin (struct intelxl_nic *intelxl, struct intelxl_admin *admin)
	Enable admin queue.
static void	intelxl_disable_admin (struct intelxl_nic *intelxl, struct intelxl_admin *admin)
	Disable admin queue.
static void	intelxl_free_admin (struct intelxl_nic *intelxl __unused, struct intelxl_admin *admin)
	Free admin queue.
struct intelxl_admin_descriptor *	intelxl_admin_command_descriptor (struct intelxl_nic *intelxl)
	Get next admin command queue descriptor.
union intelxl_admin_buffer *	intelxl_admin_command_buffer (struct intelxl_nic *intelxl)
	Get next admin command queue data buffer.
static void	intelxl_admin_event_init (struct intelxl_nic *intelxl, unsigned int index)
	Initialise admin event queue descriptor.
int	intelxl_admin_command (struct intelxl_nic *intelxl)
	Issue admin queue command.
static int	intelxl_admin_version (struct intelxl_nic *intelxl)
	Get firmware version.
static int	intelxl_admin_driver (struct intelxl_nic *intelxl)
	Report driver version.
static int	intelxl_admin_shutdown (struct intelxl_nic *intelxl)
	Shutdown admin queues.
static int	intelxl_admin_mac_read (struct net_device *netdev)
	Get MAC address.
static int	intelxl_admin_mac_write (struct net_device *netdev)
	Set MAC address.
int	intelxl_admin_clear_pxe (struct intelxl_nic *intelxl)
	Clear PXE mode.
static int	intelxl_admin_switch (struct intelxl_nic *intelxl)
	Get switch configuration.
static int	intelxl_admin_vsi (struct intelxl_nic *intelxl)
	Get VSI parameters.
static int	intelxl_admin_promisc (struct intelxl_nic *intelxl)
	Set VSI promiscuous modes.
int	intelxl_admin_mac_config (struct intelxl_nic *intelxl)
	Set MAC configuration.
static int	intelxl_admin_autoneg (struct intelxl_nic *intelxl)
	Restart autonegotiation.
static int	intelxl_admin_link (struct net_device *netdev)
	Get link status.
static void	intelxl_admin_event (struct net_device *netdev, struct intelxl_admin_descriptor *evt, union intelxl_admin_buffer *buf __unused)
	Handle admin event.
static void	intelxl_refill_admin (struct intelxl_nic *intelxl)
	Refill admin event queue.
void	intelxl_poll_admin (struct net_device *netdev)
	Poll admin event queue.
int	intelxl_open_admin (struct intelxl_nic *intelxl)
	Open admin queues.
void	intelxl_reopen_admin (struct intelxl_nic *intelxl)
	Reopen admin queues (after virtual function reset)
void	intelxl_close_admin (struct intelxl_nic *intelxl)
	Close admin queues.
int	intelxl_alloc_ring (struct intelxl_nic *intelxl, struct intelxl_ring *ring)
	Allocate descriptor ring.
void	intelxl_free_ring (struct intelxl_nic *intelxl __unused, struct intelxl_ring *ring)
	Free descriptor ring.
static void	intelxl_context_dump (struct intelxl_nic *intelxl, uint32_t op, size_t len)
	Dump queue context (for debugging)
static int	intelxl_context_line (struct intelxl_nic *intelxl, struct intelxl_context_line *line, unsigned int index, uint32_t op)
	Program queue context line.
static int	intelxl_context (struct intelxl_nic *intelxl, struct intelxl_context_line *line, size_t len, uint32_t op)
	Program queue context.
static int	intelxl_context_tx (struct intelxl_nic *intelxl, physaddr_t address)
	Program transmit queue context.
static int	intelxl_context_rx (struct intelxl_nic *intelxl, physaddr_t address)
	Program receive queue context.
static int	intelxl_enable_ring (struct intelxl_nic *intelxl, struct intelxl_ring *ring)
	Enable descriptor ring.
static int	intelxl_disable_ring (struct intelxl_nic *intelxl, struct intelxl_ring *ring)
	Disable descriptor ring.
int	intelxl_create_ring (struct intelxl_nic *intelxl, struct intelxl_ring *ring)
	Create descriptor ring.
void	intelxl_destroy_ring (struct intelxl_nic *intelxl, struct intelxl_ring *ring)
	Destroy descriptor ring.
static void	intelxl_refill_rx (struct intelxl_nic *intelxl)
	Refill receive descriptor ring.
void	intelxl_empty_rx (struct intelxl_nic *intelxl)
	Discard unused receive I/O buffers.
static int	intelxl_open (struct net_device *netdev)
	Open network device.
static void	intelxl_close (struct net_device *netdev)
	Close network device.
int	intelxl_transmit (struct net_device *netdev, struct io_buffer *iobuf)
	Transmit packet.
static void	intelxl_poll_tx (struct net_device *netdev)
	Poll for completed packets.
static void	intelxl_poll_rx (struct net_device *netdev)
	Poll for received packets.
void	intelxl_poll (struct net_device *netdev)
	Poll for completed and received packets.
static int	intelxl_probe (struct pci_device *pci)
	Probe PCI device.
static void	intelxl_remove (struct pci_device *pci)
	Remove PCI device.

Variables
const struct intelxl_admin_offsets	intelxl_admin_offsets
	Admin queue register offsets.
static struct net_device_operations	intelxl_operations
	Network device operations.
static struct pci_device_id	intelxl_nics []
	PCI device IDs.
struct pci_driver intelxl_driver	__pci_driver
	PCI driver.

Detailed Description

Intel 40 Gigabit Ethernet network card driver.

Definition in file intelxl.c.

Function Documentation

FILE_LICENCE()

FILE_LICENCE

(

GPL2_OR_LATER_OR_UBDL

)

FILE_SECBOOT()

FILE_SECBOOT

(

PERMITTED

)

intelxl_msix_enable()

int intelxl_msix_enable	(	struct intelxl_nic *	intelxl,
		struct pci_device *	pci,
		unsigned int	vector )

Enable MSI-X dummy interrupt.

Parameters

intelxl	Intel device
pci	PCI device
vector	MSI-X vector

Return values

rc	Return status code

Definition at line 63 of file intelxl.c.

                                                                        {
        int rc;
 
        /* Enable MSI-X capability */
        if ( ( rc = pci_msix_enable ( pci, &intelxl->msix ) ) != 0 ) {
                DBGC ( intelxl, "INTELXL %p could not enable MSI-X: %s\n",
                       intelxl, strerror ( rc ) );
                goto err_enable;
        }
 
        /* Enable dummy interrupt */
        pci_msix_unmask ( &intelxl->msix, vector );
 
        return 0;
 
        pci_msix_disable ( pci, &intelxl->msix );
 err_enable:
        return rc;
}

References DBGC, intelxl_nic::msix, pci_msix_disable(), pci_msix_enable(), pci_msix_unmask(), rc, strerror(), and vector.

Referenced by ice_probe(), intelxl_probe(), and intelxlvf_probe().

intelxl_msix_disable()

void intelxl_msix_disable	(	struct intelxl_nic *	intelxl,
		struct pci_device *	pci,
		unsigned int	vector )

Disable MSI-X dummy interrupt.

Parameters

intelxl	Intel device
pci	PCI device
vector	MSI-X vector

Definition at line 91 of file intelxl.c.

                                                                          {
 
        /* Disable dummy interrupts */
        pci_msix_mask ( &intelxl->msix, vector );
 
        /* Disable MSI-X capability */
        pci_msix_disable ( pci, &intelxl->msix );
}

References intelxl_nic::msix, pci_msix_disable(), pci_msix_mask(), and vector.

Referenced by ice_probe(), ice_remove(), intelxl_probe(), intelxl_remove(), intelxlvf_probe(), and intelxlvf_remove().

intelxl_alloc_admin()

int intelxl_alloc_admin ( struct intelxl_nic * intelxl, struct intelxl_admin * admin )

static

Allocate admin queue.

Parameters

intelxl	Intel device
admin	Admin queue

Return values

rc	Return status code

Definition at line 124 of file intelxl.c.

                                                               {
        size_t buf_len = ( sizeof ( admin->buf[0] ) * INTELXL_ADMIN_NUM_DESC );
        size_t len = ( sizeof ( admin->desc[0] ) * INTELXL_ADMIN_NUM_DESC );
 
        /* Allocate admin queue */
        admin->buf = dma_alloc ( intelxl->dma, &admin->map, ( buf_len + len ),
                                 INTELXL_ALIGN );
        if ( ! admin->buf )
                return -ENOMEM;
        admin->desc = ( ( ( void * ) admin->buf ) + buf_len );
 
        DBGC ( intelxl, "INTELXL %p A%cQ is at [%08lx,%08lx) buf "
               "[%08lx,%08lx)\n", intelxl,
               ( ( admin == &intelxl->command ) ? 'T' : 'R' ),
               virt_to_phys ( admin->desc ),
               ( virt_to_phys ( admin->desc ) + len ),
               virt_to_phys ( admin->buf ),
               ( virt_to_phys ( admin->buf ) + buf_len ) );
        return 0;
}

References intelxl_admin::buf, intelxl_nic::command, DBGC, intelxl_admin::desc, intelxl_nic::dma, dma_alloc(), ENOMEM, INTELXL_ADMIN_NUM_DESC, INTELXL_ALIGN, len, and intelxl_admin::map.

Referenced by intelxl_open_admin().

intelxl_enable_admin()

void intelxl_enable_admin ( struct intelxl_nic * intelxl, struct intelxl_admin * admin )

static

Enable admin queue.

Parameters

intelxl	Intel device
admin	Admin queue

Definition at line 152 of file intelxl.c.

                                                                 {
        size_t len = ( sizeof ( admin->desc[0] ) * INTELXL_ADMIN_NUM_DESC );
        const struct intelxl_admin_offsets *regs = admin->regs;
        void *admin_regs = ( intelxl->regs + admin->base );
        physaddr_t address;
 
        /* Initialise admin queue */
        memset ( admin->desc, 0, len );
 
        /* Reset head and tail registers */
        writel ( 0, admin_regs + regs->head );
        writel ( 0, admin_regs + regs->tail );
 
        /* Reset queue index */
        admin->index = 0;
 
        /* Program queue address */
        address = dma ( &admin->map, admin->desc );
        writel ( ( address & 0xffffffffUL ), admin_regs + regs->bal );
        if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
                writel ( ( ( ( uint64_t ) address ) >> 32 ),
                         admin_regs + regs->bah );
        } else {
                writel ( 0, admin_regs + regs->bah );
        }
 
        /* Program queue length and enable queue */
        writel ( ( INTELXL_ADMIN_LEN_LEN ( INTELXL_ADMIN_NUM_DESC ) |
                   INTELXL_ADMIN_LEN_ENABLE ),
                 admin_regs + regs->len );
}

References address, intelxl_admin::base, intelxl_admin::desc, dma(), intelxl_admin::index, INTELXL_ADMIN_LEN_ENABLE, INTELXL_ADMIN_LEN_LEN, INTELXL_ADMIN_NUM_DESC, len, intelxl_admin::map, memset(), intelxl_admin::regs, intelxl_nic::regs, regs, and writel.

Referenced by intelxl_reopen_admin().

intelxl_disable_admin()

void intelxl_disable_admin ( struct intelxl_nic * intelxl, struct intelxl_admin * admin )

static

Disable admin queue.

Parameters

intelxl	Intel device
admin	Admin queue

Definition at line 191 of file intelxl.c.

                                                                  {
        const struct intelxl_admin_offsets *regs = admin->regs;
        void *admin_regs = ( intelxl->regs + admin->base );
 
        /* Disable queue */
        writel ( 0, admin_regs + regs->len );
}

References intelxl_admin::base, intelxl_admin::regs, intelxl_nic::regs, regs, and writel.

Referenced by intelxl_close_admin(), and intelxl_open_admin().

intelxl_free_admin()

void intelxl_free_admin ( struct intelxl_nic *intelxl __unused, struct intelxl_admin * admin )

static

Free admin queue.

Parameters

intelxl	Intel device
admin	Admin queue

Definition at line 206 of file intelxl.c.

                                                               {
        size_t buf_len = ( sizeof ( admin->buf[0] ) * INTELXL_ADMIN_NUM_DESC );
        size_t len = ( sizeof ( admin->desc[0] ) * INTELXL_ADMIN_NUM_DESC );
 
        /* Free queue */
        dma_free ( &admin->map, admin->buf, ( buf_len + len ) );
}

References __unused, intelxl_admin::buf, intelxl_admin::desc, dma_free(), INTELXL_ADMIN_NUM_DESC, len, and intelxl_admin::map.

Referenced by intelxl_close_admin(), and intelxl_open_admin().

intelxl_admin_command_descriptor()

struct intelxl_admin_descriptor * intelxl_admin_command_descriptor

(

struct intelxl_nic *

intelxl

)

Get next admin command queue descriptor.

Parameters

intelxl

Intel device

Return values

cmd	Command descriptor

Definition at line 222 of file intelxl.c.

                                                                 {
        struct intelxl_admin *admin = &intelxl->command;
        struct intelxl_admin_descriptor *cmd;
 
        /* Get and initialise next descriptor */
        cmd = &admin->desc[ admin->index % INTELXL_ADMIN_NUM_DESC ];
        memset ( cmd, 0, sizeof ( *cmd ) );
        return cmd;
}

References cmd, intelxl_nic::command, intelxl_admin::desc, intelxl_admin::index, INTELXL_ADMIN_NUM_DESC, and memset().

Referenced by ice_admin_command_descriptor(), intelxl_admin_autoneg(), intelxl_admin_clear_pxe(), intelxl_admin_driver(), intelxl_admin_link(), intelxl_admin_mac_config(), intelxl_admin_mac_read(), intelxl_admin_mac_write(), intelxl_admin_promisc(), intelxl_admin_shutdown(), intelxl_admin_switch(), intelxl_admin_version(), intelxl_admin_vsi(), and intelxlvf_admin_command_descriptor().

intelxl_admin_command_buffer()

union intelxl_admin_buffer * intelxl_admin_command_buffer

(

struct intelxl_nic *

intelxl

)

Get next admin command queue data buffer.

Parameters

intelxl

Intel device

Return values

buf	Data buffer

Definition at line 239 of file intelxl.c.

                                                             {
        struct intelxl_admin *admin = &intelxl->command;
        union intelxl_admin_buffer *buf;
 
        /* Get next data buffer */
        buf = &admin->buf[ admin->index % INTELXL_ADMIN_NUM_DESC ];
        memset ( buf, 0, sizeof ( *buf ) );
        return buf;
}

References intelxl_admin::buf, intelxl_nic::command, intelxl_admin::index, INTELXL_ADMIN_NUM_DESC, and memset().

Referenced by ice_admin_command_buffer(), intelxl_admin_driver(), intelxl_admin_mac_read(), intelxl_admin_switch(), intelxl_admin_vsi(), and intelxlvf_admin_command_buffer().

intelxl_admin_event_init()

void intelxl_admin_event_init ( struct intelxl_nic * intelxl, unsigned int index )

static

Initialise admin event queue descriptor.

Parameters

intelxl	Intel device
index	Event queue index

Definition at line 255 of file intelxl.c.

                                                            {
        struct intelxl_admin *admin = &intelxl->event;
        struct intelxl_admin_descriptor *evt;
        union intelxl_admin_buffer *buf;
        uint64_t address;
 
        /* Initialise descriptor */
        evt = &admin->desc[ index % INTELXL_ADMIN_NUM_DESC ];
        buf = &admin->buf[ index % INTELXL_ADMIN_NUM_DESC ];
        address = dma ( &admin->map, buf );
        evt->flags = cpu_to_le16 ( INTELXL_ADMIN_FL_BUF );
        evt->len = cpu_to_le16 ( sizeof ( *buf ) );
        evt->params.buffer.high = cpu_to_le32 ( address >> 32 );
        evt->params.buffer.low = cpu_to_le32 ( address & 0xffffffffUL );
}

References address, intelxl_admin::buf, intelxl_admin_params::buffer, cpu_to_le16, cpu_to_le32, intelxl_admin::desc, dma(), intelxl_nic::event, intelxl_admin_descriptor::flags, intelxl_admin_buffer_params::high, index, INTELXL_ADMIN_FL_BUF, INTELXL_ADMIN_NUM_DESC, intelxl_admin_descriptor::len, intelxl_admin_buffer_params::low, intelxl_admin::map, and intelxl_admin_descriptor::params.

Referenced by intelxl_poll_admin(), and intelxl_reopen_admin().

intelxl_admin_command()

int intelxl_admin_command

(

struct intelxl_nic *

intelxl

)

Issue admin queue command.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 278 of file intelxl.c.

                                                          {
        struct intelxl_admin *admin = &intelxl->command;
        const struct intelxl_admin_offsets *regs = admin->regs;
        void *admin_regs = ( intelxl->regs + admin->base );
        struct intelxl_admin_descriptor *cmd;
        union intelxl_admin_buffer *buf;
        uint64_t address;
        uint32_t cookie;
        uint16_t silence;
        unsigned int index;
        unsigned int tail;
        unsigned int i;
        int rc;
 
        /* Get next queue entry */
        index = admin->index++;
        tail = ( admin->index % INTELXL_ADMIN_NUM_DESC );
        cmd = &admin->desc[ index % INTELXL_ADMIN_NUM_DESC ];
        buf = &admin->buf[ index % INTELXL_ADMIN_NUM_DESC ];
        DBGC2 ( intelxl, "INTELXL %p admin command %#x opcode %#04x",
                intelxl, index, le16_to_cpu ( cmd->opcode ) );
        if ( cmd->cookie )
                DBGC2 ( intelxl, "/%#08x", le32_to_cpu ( cmd->cookie ) );
        DBGC2 ( intelxl, ":\n" );
 
        /* Allow expected errors to be silenced */
        silence = cmd->ret;
        cmd->ret = 0;
 
        /* Sanity checks */
        assert ( ! ( cmd->flags & cpu_to_le16 ( INTELXL_ADMIN_FL_DD ) ) );
        assert ( ! ( cmd->flags & cpu_to_le16 ( INTELXL_ADMIN_FL_CMP ) ) );
        assert ( ! ( cmd->flags & cpu_to_le16 ( INTELXL_ADMIN_FL_ERR ) ) );
 
        /* Populate data buffer address if applicable */
        if ( cmd->flags & cpu_to_le16 ( INTELXL_ADMIN_FL_BUF ) ) {
                address = dma ( &admin->map, buf );
                cmd->params.buffer.high = cpu_to_le32 ( address >> 32 );
                cmd->params.buffer.low = cpu_to_le32 ( address & 0xffffffffUL );
        }
 
        /* Populate cookie, if not being (ab)used for VF opcode */
        if ( ! cmd->cookie )
                cmd->cookie = cpu_to_le32 ( index );
 
        /* Record cookie */
        cookie = cmd->cookie;
 
        /* Post command descriptor */
        DBGC2_HDA ( intelxl, virt_to_phys ( cmd ), cmd, sizeof ( *cmd ) );
        if ( cmd->flags & cpu_to_le16 ( INTELXL_ADMIN_FL_RD ) ) {
                DBGC2_HDA ( intelxl, virt_to_phys ( buf ), buf,
                            le16_to_cpu ( cmd->len ) );
        }
        wmb();
        writel ( tail, admin_regs + regs->tail );
 
        /* Wait for completion */
        for ( i = 0 ; i < INTELXL_ADMIN_MAX_WAIT_MS ; i++ ) {
 
                /* If response is not complete, delay 1ms and retry */
                if ( ! ( cmd->flags & INTELXL_ADMIN_FL_DD ) ) {
                        mdelay ( 1 );
                        continue;
                }
                DBGC2 ( intelxl, "INTELXL %p admin command %#x response:\n",
                        intelxl, index );
                DBGC2_HDA ( intelxl, virt_to_phys ( cmd ), cmd,
                            sizeof ( *cmd ) );
                if ( cmd->flags & cpu_to_le16 ( INTELXL_ADMIN_FL_BUF ) ) {
                        DBGC2_HDA ( intelxl, virt_to_phys ( buf ), buf,
                                    le16_to_cpu ( cmd->len ) );
                }
 
                /* Check for cookie mismatch */
                if ( cmd->cookie != cookie ) {
                        DBGC ( intelxl, "INTELXL %p admin command %#x bad "
                               "cookie %#x\n", intelxl, index,
                               le32_to_cpu ( cmd->cookie ) );
                        rc = -EPROTO;
                        goto err;
                }
 
                /* Check for unexpected errors */
                if ( ( cmd->ret != 0 ) && ( cmd->ret != silence ) ) {
                        DBGC ( intelxl, "INTELXL %p admin command %#x error "
                               "%d\n", intelxl, index,
                               le16_to_cpu ( cmd->ret ) );
                        rc = -EIO;
                        goto err;
                }
 
                /* Success */
                return 0;
        }
 
        rc = -ETIMEDOUT;
        DBGC ( intelxl, "INTELXL %p timed out waiting for admin command %#x:\n",
               intelxl, index );
 err:
        DBGC_HDA ( intelxl, virt_to_phys ( cmd ), cmd, sizeof ( *cmd ) );
        return rc;
}

References address, assert, intelxl_admin::base, intelxl_admin::buf, cmd, intelxl_nic::command, cpu_to_le16, cpu_to_le32, DBGC, DBGC2, DBGC2_HDA, DBGC_HDA, intelxl_admin::desc, dma(), EIO, EPROTO, ETIMEDOUT, index, intelxl_admin::index, INTELXL_ADMIN_FL_BUF, INTELXL_ADMIN_FL_CMP, INTELXL_ADMIN_FL_DD, INTELXL_ADMIN_FL_ERR, INTELXL_ADMIN_FL_RD, INTELXL_ADMIN_MAX_WAIT_MS, INTELXL_ADMIN_NUM_DESC, le16_to_cpu, le32_to_cpu, intelxl_admin::map, mdelay(), rc, intelxl_admin::regs, intelxl_nic::regs, regs, wmb, and writel.

Referenced by ice_admin_add_txq(), ice_admin_autoneg(), ice_admin_disable_txq(), ice_admin_link(), ice_admin_mac_read(), ice_admin_mac_write(), ice_admin_rules(), ice_admin_schedule(), ice_admin_switch(), ice_admin_version(), intelxl_admin_autoneg(), intelxl_admin_clear_pxe(), intelxl_admin_driver(), intelxl_admin_link(), intelxl_admin_mac_config(), intelxl_admin_mac_read(), intelxl_admin_mac_write(), intelxl_admin_promisc(), intelxl_admin_shutdown(), intelxl_admin_switch(), intelxl_admin_version(), intelxl_admin_vsi(), intelxlvf_admin_command(), intelxlvf_admin_request_qps(), and intelxlvf_reset_admin().

intelxl_admin_version()

int intelxl_admin_version ( struct intelxl_nic * intelxl )

static

Get firmware version.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 388 of file intelxl.c.

                                                                 {
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_version_params *version;
        unsigned int api;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_VERSION );
        version = &cmd->params.version;
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
        api = le16_to_cpu ( version->api.major );
        DBGC ( intelxl, "INTELXL %p firmware v%d.%d API v%d.%d\n",
               intelxl, le16_to_cpu ( version->firmware.major ),
               le16_to_cpu ( version->firmware.minor ),
               api, le16_to_cpu ( version->api.minor ) );
 
        /* Check for API compatibility */
        if ( api > INTELXL_ADMIN_API_MAJOR ) {
                DBGC ( intelxl, "INTELXL %p unsupported API v%d\n",
                       intelxl, api );
                return -ENOTSUP;
        }
 
        return 0;
}

References api, cmd, cpu_to_le16, DBGC, ENOTSUP, INTELXL_ADMIN_API_MAJOR, intelxl_admin_command(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_VERSION, le16_to_cpu, rc, and version.

intelxl_admin_driver()

int intelxl_admin_driver ( struct intelxl_nic * intelxl )

static

Report driver version.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 424 of file intelxl.c.

                                                                {
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_driver_params *driver;
        union intelxl_admin_buffer *buf;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_DRIVER );
        cmd->flags = cpu_to_le16 ( INTELXL_ADMIN_FL_RD | INTELXL_ADMIN_FL_BUF );
        cmd->len = cpu_to_le16 ( sizeof ( buf->driver ) );
        driver = &cmd->params.driver;
        driver->major = product_major_version;
        driver->minor = product_minor_version;
        buf = intelxl_admin_command_buffer ( intelxl );
        snprintf ( buf->driver.name, sizeof ( buf->driver.name ), "%s",
                   ( product_name[0] ? product_name : product_short_name ) );
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
 
        return 0;
}

References cmd, cpu_to_le16, intelxl_admin_buffer::driver, intelxl_admin_command(), intelxl_admin_command_buffer(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_DRIVER, INTELXL_ADMIN_FL_BUF, INTELXL_ADMIN_FL_RD, intelxl_admin_driver_buffer::name, product_major_version, product_minor_version, product_name, product_short_name, rc, and snprintf().

Referenced by intelxl_probe().

intelxl_admin_shutdown()

int intelxl_admin_shutdown ( struct intelxl_nic * intelxl )

static

Shutdown admin queues.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 455 of file intelxl.c.

                                                                  {
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_shutdown_params *shutdown;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_SHUTDOWN );
        shutdown = &cmd->params.shutdown;
        shutdown->unloading = INTELXL_ADMIN_SHUTDOWN_UNLOADING;
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
 
        return 0;
}

References cmd, cpu_to_le16, intelxl_admin_command(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_SHUTDOWN, INTELXL_ADMIN_SHUTDOWN_UNLOADING, rc, and shutdown().

Referenced by intelxl_close_admin().

intelxl_admin_mac_read()

int intelxl_admin_mac_read ( struct net_device * netdev )

static

Get MAC address.

Parameters

netdev

Network device

Return values

rc	Return status code

Definition at line 479 of file intelxl.c.

                                                                {
        struct intelxl_nic *intelxl = netdev->priv;
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_mac_read_params *read;
        union intelxl_admin_buffer *buf;
        uint8_t *mac;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_MAC_READ );
        cmd->flags = cpu_to_le16 ( INTELXL_ADMIN_FL_BUF );
        cmd->len = cpu_to_le16 ( sizeof ( buf->mac_read ) );
        read = &cmd->params.mac_read;
        buf = intelxl_admin_command_buffer ( intelxl );
        mac = buf->mac_read.pf;
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
 
        /* Check that MAC address is present in response */
        if ( ! ( read->valid & INTELXL_ADMIN_MAC_READ_VALID_LAN ) ) {
                DBGC ( intelxl, "INTELXL %p has no MAC address\n", intelxl );
                return -ENOENT;
        }
 
        /* Check that address is valid */
        if ( ! is_valid_ether_addr ( mac ) ) {
                DBGC ( intelxl, "INTELXL %p has invalid MAC address (%s)\n",
                       intelxl, eth_ntoa ( mac ) );
                return -ENOENT;
        }
 
        /* Copy MAC address */
        DBGC ( intelxl, "INTELXL %p has MAC address %s\n",
               intelxl, eth_ntoa ( mac ) );
        memcpy ( netdev->hw_addr, mac, ETH_ALEN );
 
        return 0;
}

References cmd, cpu_to_le16, DBGC, ENOENT, ETH_ALEN, eth_ntoa(), intelxl_admin_command(), intelxl_admin_command_buffer(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_FL_BUF, INTELXL_ADMIN_MAC_READ, INTELXL_ADMIN_MAC_READ_VALID_LAN, is_valid_ether_addr(), mac, intelxl_admin_buffer::mac_read, memcpy(), netdev, intelxl_admin_mac_read_buffer::pf, rc, and read.

Referenced by intelxl_probe().

intelxl_admin_mac_write()

int intelxl_admin_mac_write ( struct net_device * netdev )

static

Set MAC address.

Parameters

netdev

Network device

Return values

rc	Return status code

Definition at line 527 of file intelxl.c.

                                                                 {
        struct intelxl_nic *intelxl = netdev->priv;
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_mac_write_params *write;
        union {
                uint8_t raw[ETH_ALEN];
                struct {
                        uint16_t high;
                        uint32_t low;
                } __attribute__ (( packed ));
        } mac;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_MAC_WRITE );
        write = &cmd->params.mac_write;
        memcpy ( mac.raw, netdev->ll_addr, ETH_ALEN );
        write->high = bswap_16 ( mac.high );
        write->low = bswap_32 ( mac.low );
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
 
        return 0;
}

References __attribute__, bswap_16, bswap_32, cmd, cpu_to_le16, ETH_ALEN, high, intelxl_admin_command(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_MAC_WRITE, low, mac, memcpy(), netdev, raw, rc, and write.

Referenced by intelxl_open().

intelxl_admin_clear_pxe()

int intelxl_admin_clear_pxe

(

struct intelxl_nic *

intelxl

)

Clear PXE mode.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 561 of file intelxl.c.

                                                            {
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_clear_pxe_params *pxe;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_CLEAR_PXE );
        cmd->ret = cpu_to_le16 ( INTELXL_ADMIN_EEXIST );
        pxe = &cmd->params.pxe;
        pxe->magic = INTELXL_ADMIN_CLEAR_PXE_MAGIC;
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
 
        /* Check for expected errors */
        if ( cmd->ret == cpu_to_le16 ( INTELXL_ADMIN_EEXIST ) ) {
                DBGC ( intelxl, "INTELXL %p already in non-PXE mode\n",
                       intelxl );
                return 0;
        }
 
        return 0;
}

References cmd, cpu_to_le16, DBGC, INTELXL_ADMIN_CLEAR_PXE, INTELXL_ADMIN_CLEAR_PXE_MAGIC, intelxl_admin_command(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_EEXIST, intelxl_admin_clear_pxe_params::magic, and rc.

Referenced by ice_probe(), and intelxl_probe().

intelxl_admin_switch()

int intelxl_admin_switch ( struct intelxl_nic * intelxl )

static

Get switch configuration.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 593 of file intelxl.c.

                                                                {
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_switch_params *sw;
        union intelxl_admin_buffer *buf;
        uint16_t next = 0;
        int rc;
 
        /* Get each configuration in turn */
        do {
                /* Populate descriptor */
                cmd = intelxl_admin_command_descriptor ( intelxl );
                cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_SWITCH );
                cmd->flags = cpu_to_le16 ( INTELXL_ADMIN_FL_BUF );
                cmd->len = cpu_to_le16 ( sizeof ( buf->sw ) );
                sw = &cmd->params.sw;
                sw->next = next;
                buf = intelxl_admin_command_buffer ( intelxl );
 
                /* Issue command */
                if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                        return rc;
 
                /* Dump raw configuration */
                DBGC2 ( intelxl, "INTELXL %p SEID %#04x:\n",
                        intelxl, le16_to_cpu ( buf->sw.cfg.seid ) );
                DBGC2_HDA ( intelxl, 0, &buf->sw.cfg, sizeof ( buf->sw.cfg ) );
 
                /* Parse response */
                if ( buf->sw.cfg.type == INTELXL_ADMIN_SWITCH_TYPE_VSI ) {
                        intelxl->vsi = le16_to_cpu ( buf->sw.cfg.seid );
                        DBGC ( intelxl, "INTELXL %p VSI %#04x uplink %#04x "
                               "downlink %#04x conn %#02x\n", intelxl,
                               intelxl->vsi, le16_to_cpu ( buf->sw.cfg.uplink ),
                               le16_to_cpu ( buf->sw.cfg.downlink ),
                               buf->sw.cfg.connection );
                }
 
        } while ( ( next = sw->next ) );
 
        /* Check that we found a VSI */
        if ( ! intelxl->vsi ) {
                DBGC ( intelxl, "INTELXL %p has no VSI\n", intelxl );
                return -ENOENT;
        }
 
        return 0;
}

References intelxl_admin_switch_buffer::cfg, cmd, intelxl_admin_switch_config::connection, cpu_to_le16, DBGC, DBGC2, DBGC2_HDA, intelxl_admin_switch_config::downlink, ENOENT, intelxl_admin_command(), intelxl_admin_command_buffer(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_FL_BUF, INTELXL_ADMIN_SWITCH, INTELXL_ADMIN_SWITCH_TYPE_VSI, le16_to_cpu, next, rc, intelxl_admin_switch_config::seid, intelxl_admin_buffer::sw, intelxl_admin_switch_config::type, intelxl_admin_switch_config::uplink, and intelxl_nic::vsi.

Referenced by intelxl_probe().

intelxl_admin_vsi()

int intelxl_admin_vsi ( struct intelxl_nic * intelxl )

static

Get VSI parameters.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 647 of file intelxl.c.

                                                             {
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_vsi_params *vsi;
        union intelxl_admin_buffer *buf;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_VSI );
        cmd->flags = cpu_to_le16 ( INTELXL_ADMIN_FL_BUF );
        cmd->len = cpu_to_le16 ( sizeof ( buf->vsi ) );
        vsi = &cmd->params.vsi;
        vsi->vsi = cpu_to_le16 ( intelxl->vsi );
        buf = intelxl_admin_command_buffer ( intelxl );
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
 
        /* Parse response */
        intelxl->queue = le16_to_cpu ( buf->vsi.queue[0] );
        intelxl->qset = le16_to_cpu ( buf->vsi.qset[0] );
        DBGC ( intelxl, "INTELXL %p VSI %#04x queue %#04x qset %#04x\n",
               intelxl, intelxl->vsi, intelxl->queue, intelxl->qset );
 
        return 0;
}

References cmd, cpu_to_le16, DBGC, intelxl_admin_command(), intelxl_admin_command_buffer(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_FL_BUF, INTELXL_ADMIN_VSI, le16_to_cpu, intelxl_admin_vsi_buffer::qset, intelxl_nic::qset, intelxl_admin_vsi_buffer::queue, intelxl_nic::queue, rc, intelxl_admin_buffer::vsi, intelxl_admin_vsi_params::vsi, and intelxl_nic::vsi.

Referenced by intelxl_probe().

intelxl_admin_promisc()

int intelxl_admin_promisc ( struct intelxl_nic * intelxl )

static

Set VSI promiscuous modes.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 681 of file intelxl.c.

                                                                 {
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_promisc_params *promisc;
        uint16_t flags;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_PROMISC );
        flags = ( INTELXL_ADMIN_PROMISC_FL_UNICAST |
                  INTELXL_ADMIN_PROMISC_FL_MULTICAST |
                  INTELXL_ADMIN_PROMISC_FL_BROADCAST |
                  INTELXL_ADMIN_PROMISC_FL_VLAN );
        promisc = &cmd->params.promisc;
        promisc->flags = cpu_to_le16 ( flags );
        promisc->valid = cpu_to_le16 ( flags );
        promisc->vsi = cpu_to_le16 ( intelxl->vsi );
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
 
        return 0;
}

References cmd, cpu_to_le16, flags, intelxl_admin_promisc_params::flags, intelxl_admin_command(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_PROMISC, INTELXL_ADMIN_PROMISC_FL_BROADCAST, INTELXL_ADMIN_PROMISC_FL_MULTICAST, INTELXL_ADMIN_PROMISC_FL_UNICAST, INTELXL_ADMIN_PROMISC_FL_VLAN, rc, intelxl_admin_promisc_params::valid, intelxl_admin_promisc_params::vsi, and intelxl_nic::vsi.

Referenced by intelxl_probe().

intelxl_admin_mac_config()

int intelxl_admin_mac_config

(

struct intelxl_nic *

intelxl

)

Set MAC configuration.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 712 of file intelxl.c.

                                                             {
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_mac_config_params *config;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_MAC_CONFIG );
        config = &cmd->params.mac_config;
        config->mfs = cpu_to_le16 ( intelxl->mfs );
        config->flags = INTELXL_ADMIN_MAC_CONFIG_FL_CRC;
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
 
        return 0;
}

References cmd, cpu_to_le16, intelxl_admin_mac_config_params::flags, intelxl_admin_command(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_MAC_CONFIG, INTELXL_ADMIN_MAC_CONFIG_FL_CRC, intelxl_admin_mac_config_params::mfs, intelxl_nic::mfs, and rc.

Referenced by ice_open(), and intelxl_open().

intelxl_admin_autoneg()

int intelxl_admin_autoneg ( struct intelxl_nic * intelxl )

static

Restart autonegotiation.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 737 of file intelxl.c.

                                                                 {
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_autoneg_params *autoneg;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_AUTONEG );
        autoneg = &cmd->params.autoneg;
        autoneg->flags = ( INTELXL_ADMIN_AUTONEG_FL_RESTART |
                           INTELXL_ADMIN_AUTONEG_FL_ENABLE );
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
 
        return 0;
}

References cmd, cpu_to_le16, intelxl_admin_autoneg_params::flags, INTELXL_ADMIN_AUTONEG, INTELXL_ADMIN_AUTONEG_FL_ENABLE, INTELXL_ADMIN_AUTONEG_FL_RESTART, intelxl_admin_command(), intelxl_admin_command_descriptor(), and rc.

Referenced by intelxl_open().

intelxl_admin_link()

int intelxl_admin_link ( struct net_device * netdev )

static

Get link status.

Parameters

netdev

Network device

Return values

rc	Return status code

Definition at line 762 of file intelxl.c.

                                                            {
        struct intelxl_nic *intelxl = netdev->priv;
        struct intelxl_admin_descriptor *cmd;
        struct intelxl_admin_link_params *link;
        int rc;
 
        /* Populate descriptor */
        cmd = intelxl_admin_command_descriptor ( intelxl );
        cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_LINK );
        link = &cmd->params.link;
        link->notify = INTELXL_ADMIN_LINK_NOTIFY;
 
        /* Issue command */
        if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
                return rc;
        DBGC ( intelxl, "INTELXL %p PHY %#02x speed %#02x status %#02x\n",
               intelxl, link->phy, link->speed, link->status );
 
        /* Update network device */
        if ( link->status & INTELXL_ADMIN_LINK_UP ) {
                netdev_link_up ( netdev );
        } else {
                netdev_link_down ( netdev );
        }
 
        return 0;
}

References cmd, cpu_to_le16, DBGC, intelxl_admin_command(), intelxl_admin_command_descriptor(), INTELXL_ADMIN_LINK, INTELXL_ADMIN_LINK_NOTIFY, INTELXL_ADMIN_LINK_UP, link, netdev, netdev_link_down(), netdev_link_up(), and rc.

Referenced by intelxl_admin_event(), intelxl_open(), and intelxl_probe().

intelxl_admin_event()

void intelxl_admin_event ( struct net_device * netdev, struct intelxl_admin_descriptor * evt, union intelxl_admin_buffer *buf __unused )

static

Handle admin event.

Parameters

netdev	Network device
evt	Event descriptor
buf	Data buffer

Definition at line 797 of file intelxl.c.

                                                                             {
        struct intelxl_nic *intelxl = netdev->priv;
 
        /* Ignore unrecognised events */
        if ( evt->opcode != cpu_to_le16 ( INTELXL_ADMIN_LINK ) ) {
                DBGC ( intelxl, "INTELXL %p unrecognised event opcode "
                       "%#04x\n", intelxl, le16_to_cpu ( evt->opcode ) );
                return;
        }
 
        /* Update link status */
        intelxl_admin_link ( netdev );
}

References __unused, cpu_to_le16, DBGC, INTELXL_ADMIN_LINK, intelxl_admin_link(), le16_to_cpu, netdev, and intelxl_admin_descriptor::opcode.

Referenced by intelxl_probe().

intelxl_refill_admin()

void intelxl_refill_admin ( struct intelxl_nic * intelxl )

static

Refill admin event queue.

Parameters

intelxl

Intel device

Definition at line 818 of file intelxl.c.

                                                                 {
        struct intelxl_admin *admin = &intelxl->event;
        const struct intelxl_admin_offsets *regs = admin->regs;
        void *admin_regs = ( intelxl->regs + admin->base );
        unsigned int tail;
 
        /* Update tail pointer */
        tail = ( ( admin->index + INTELXL_ADMIN_NUM_DESC - 1 ) %
                 INTELXL_ADMIN_NUM_DESC );
        wmb();
        writel ( tail, admin_regs + regs->tail );
}

References intelxl_admin::base, intelxl_nic::event, intelxl_admin::index, INTELXL_ADMIN_NUM_DESC, intelxl_admin::regs, intelxl_nic::regs, regs, intelxl_admin_offsets::tail, wmb, and writel.

Referenced by intelxl_poll_admin(), and intelxl_reopen_admin().

intelxl_poll_admin()

void intelxl_poll_admin

(

struct net_device *

netdev

)

Poll admin event queue.

Parameters

netdev

Network device

Definition at line 836 of file intelxl.c.

                                                      {
        struct intelxl_nic *intelxl = netdev->priv;
        struct intelxl_admin *admin = &intelxl->event;
        struct intelxl_admin_descriptor *evt;
        union intelxl_admin_buffer *buf;
 
        /* Check for events */
        while ( 1 ) {
 
                /* Get next event descriptor and data buffer */
                evt = &admin->desc[ admin->index % INTELXL_ADMIN_NUM_DESC ];
                buf = &admin->buf[ admin->index % INTELXL_ADMIN_NUM_DESC ];
 
                /* Stop if descriptor is not yet completed */
                if ( ! ( evt->flags & INTELXL_ADMIN_FL_DD ) )
                        return;
                DBGC2 ( intelxl, "INTELXL %p admin event %#x:\n",
                        intelxl, admin->index );
                DBGC2_HDA ( intelxl, virt_to_phys ( evt ), evt,
                            sizeof ( *evt ) );
                if ( evt->flags & cpu_to_le16 ( INTELXL_ADMIN_FL_BUF ) ) {
                        DBGC2_HDA ( intelxl, virt_to_phys ( buf ), buf,
                                    le16_to_cpu ( evt->len ) );
                }
 
                /* Handle event */
                intelxl->handle ( netdev, evt, buf );
 
                /* Reset descriptor and refill queue */
                intelxl_admin_event_init ( intelxl, admin->index );
                admin->index++;
                intelxl_refill_admin ( intelxl );
        }
}

References intelxl_admin::buf, cpu_to_le16, DBGC2, DBGC2_HDA, intelxl_admin::desc, intelxl_nic::event, intelxl_admin_descriptor::flags, intelxl_nic::handle, intelxl_admin::index, intelxl_admin_event_init(), INTELXL_ADMIN_FL_BUF, INTELXL_ADMIN_FL_DD, INTELXL_ADMIN_NUM_DESC, intelxl_refill_admin(), le16_to_cpu, intelxl_admin_descriptor::len, and netdev.

Referenced by intelxl_poll(), and intelxlvf_admin_command().

intelxl_open_admin()

int intelxl_open_admin

(

struct intelxl_nic *

intelxl

)

Open admin queues.

Parameters

intelxl

Intel device

Return values

rc	Return status code

Definition at line 877 of file intelxl.c.

                                                       {
        int rc;
 
        /* Allocate admin event queue */
        if ( ( rc = intelxl_alloc_admin ( intelxl, &intelxl->event ) ) != 0 )
                goto err_alloc_event;
 
        /* Allocate admin command queue */
        if ( ( rc = intelxl_alloc_admin ( intelxl, &intelxl->command ) ) != 0 )
                goto err_alloc_command;
 
        /* (Re)open admin queues */
        intelxl_reopen_admin ( intelxl );
 
        return 0;
 
        intelxl_disable_admin ( intelxl, &intelxl->command );
        intelxl_disable_admin ( intelxl, &intelxl->event );
        intelxl_free_admin ( intelxl, &intelxl->command );
 err_alloc_command:
        intelxl_free_admin ( intelxl, &intelxl->event );
 err_alloc_event:
        return rc;
}

References intelxl_nic::command, intelxl_nic::event, intelxl_alloc_admin(), intelxl_disable_admin(), intelxl_free_admin(), intelxl_reopen_admin(), and rc.

Referenced by ice_probe(), intelxl_probe(), and intelxlvf_probe().

intelxl_reopen_admin()

void intelxl_reopen_admin

(

struct intelxl_nic *

intelxl

)

Reopen admin queues (after virtual function reset)

Parameters

intelxl

Intel device

Definition at line 907 of file intelxl.c.

                                                          {
        unsigned int i;
 
        /* Enable admin event queue */
        intelxl_enable_admin ( intelxl, &intelxl->event );
 
        /* Enable admin command queue */
        intelxl_enable_admin ( intelxl, &intelxl->command );
 
        /* Initialise all admin event queue descriptors */
        for ( i = 0 ; i < INTELXL_ADMIN_NUM_DESC ; i++ )
                intelxl_admin_event_init ( intelxl, i );
 
        /* Post all descriptors to event queue */
        intelxl_refill_admin ( intelxl );
}

References intelxl_nic::command, intelxl_nic::event, intelxl_admin_event_init(), INTELXL_ADMIN_NUM_DESC, intelxl_enable_admin(), and intelxl_refill_admin().

Referenced by intelxl_open_admin(), and intelxlvf_reset_wait().

intelxl_close_admin()

void intelxl_close_admin

(

struct intelxl_nic *

intelxl

)

Close admin queues.

Parameters

intelxl

Intel device

Definition at line 929 of file intelxl.c.

                                                         {
 
        /* Shut down admin queues */
        intelxl_admin_shutdown ( intelxl );
 
        /* Disable admin queues */
        intelxl_disable_admin ( intelxl, &intelxl->command );
        intelxl_disable_admin ( intelxl, &intelxl->event );
 
        /* Free admin queues */
        intelxl_free_admin ( intelxl, &intelxl->command );
        intelxl_free_admin ( intelxl, &intelxl->event );
}

References intelxl_nic::command, intelxl_nic::event, intelxl_admin_shutdown(), intelxl_disable_admin(), and intelxl_free_admin().

Referenced by ice_probe(), ice_remove(), intelxl_probe(), intelxl_remove(), intelxlvf_probe(), and intelxlvf_remove().

intelxl_alloc_ring()

int intelxl_alloc_ring	(	struct intelxl_nic *	intelxl,
		struct intelxl_ring *	ring )

Allocate descriptor ring.

Parameters

intelxl	Intel device
ring	Descriptor ring

Return values

rc	Return status code

Definition at line 957 of file intelxl.c.

                                                     {
        int rc;
 
        /* Allocate descriptor ring */
        ring->desc.raw = dma_alloc ( intelxl->dma, &ring->map, ring->len,
                                     INTELXL_ALIGN );
        if ( ! ring->desc.raw ) {
                rc = -ENOMEM;
                goto err_alloc;
        }
 
        /* Initialise descriptor ring */
        memset ( ring->desc.raw, 0, ring->len );
 
        /* Reset tail pointer */
        writel ( 0, ( intelxl->regs + ring->tail ) );
 
        /* Reset counters */
        ring->prod = 0;
        ring->cons = 0;
 
        DBGC ( intelxl, "INTELXL %p ring %06x is at [%08lx,%08lx)\n",
               intelxl, ring->tail, virt_to_phys ( ring->desc.raw ),
               ( virt_to_phys ( ring->desc.raw ) + ring->len ) );
 
        return 0;
 
        dma_free ( &ring->map, ring->desc.raw, ring->len );
 err_alloc:
        return rc;
}

References intelxl_ring::cons, DBGC, intelxl_ring::desc, intelxl_nic::dma, dma_alloc(), dma_free(), ENOMEM, INTELXL_ALIGN, intelxl_ring::len, intelxl_ring::map, memset(), intelxl_ring::prod, intelxl_ring::raw, rc, intelxl_nic::regs, intelxl_ring::tail, and writel.

Referenced by ice_create_tx(), intelxl_create_ring(), and intelxlvf_open().

intelxl_free_ring()

void intelxl_free_ring	(	struct intelxl_nic *intelxl	__unused,
		struct intelxl_ring *	ring )

Free descriptor ring.

Parameters

intelxl	Intel device
ring	Descriptor ring

Definition at line 996 of file intelxl.c.

                                                     {
 
        /* Free descriptor ring */
        dma_free ( &ring->map, ring->desc.raw, ring->len );
        ring->desc.raw = NULL;
}

References __unused, intelxl_ring::desc, dma_free(), intelxl_ring::len, intelxl_ring::map, NULL, and intelxl_ring::raw.

Referenced by ice_create_tx(), ice_destroy_tx(), intelxl_create_ring(), intelxl_destroy_ring(), intelxlvf_close(), and intelxlvf_open().

intelxl_context_dump()

void intelxl_context_dump ( struct intelxl_nic * intelxl, uint32_t op, size_t len )

static

Dump queue context (for debugging)

Parameters

intelxl	Intel device
op	Context operation
len	Size of context

Definition at line 1012 of file intelxl.c.

                                                                              {
        struct intelxl_context_line line;
        uint32_t pfcm_lanctxctl;
        uint32_t pfcm_lanctxstat;
        unsigned int queue;
        unsigned int index;
        unsigned int i;
 
        /* Do nothing unless debug output is enabled */
        if ( ! DBG_EXTRA )
                return;
 
        /* Dump context */
        DBGC2 ( intelxl, "INTELXL %p context %#08x:\n", intelxl, op );
        for ( index = 0 ; ( sizeof ( line ) * index ) < len ; index++ ) {
 
                /* Start context operation */
                queue = ( intelxl->base + intelxl->queue );
                pfcm_lanctxctl =
                        ( INTELXL_PFCM_LANCTXCTL_QUEUE_NUM ( queue ) |
                          INTELXL_PFCM_LANCTXCTL_SUB_LINE ( index ) |
                          INTELXL_PFCM_LANCTXCTL_OP_CODE_READ | op );
                writel ( pfcm_lanctxctl,
                         intelxl->regs + INTELXL_PFCM_LANCTXCTL );
 
                /* Wait for operation to complete */
                for ( i = 0 ; i < INTELXL_CTX_MAX_WAIT_MS ; i++ ) {
 
                        /* Check if operation is complete */
                        pfcm_lanctxstat = readl ( intelxl->regs +
                                                  INTELXL_PFCM_LANCTXSTAT );
                        if ( pfcm_lanctxstat & INTELXL_PFCM_LANCTXSTAT_DONE )
                                break;
 
                        /* Delay */
                        mdelay ( 1 );
                }
 
                /* Read context data */
                for ( i = 0 ; i < ( sizeof ( line ) /
                                    sizeof ( line.raw[0] ) ) ; i++ ) {
                        line.raw[i] = readl ( intelxl->regs +
                                              INTELXL_PFCM_LANCTXDATA ( i ) );
                }
                DBGC2_HDA ( intelxl, ( sizeof ( line ) * index ),
                            &line, sizeof ( line ) );
        }
}

References intelxl_nic::base, DBG_EXTRA, DBGC2, DBGC2_HDA, index, INTELXL_CTX_MAX_WAIT_MS, INTELXL_PFCM_LANCTXCTL, INTELXL_PFCM_LANCTXCTL_OP_CODE_READ, INTELXL_PFCM_LANCTXCTL_QUEUE_NUM, INTELXL_PFCM_LANCTXCTL_SUB_LINE, INTELXL_PFCM_LANCTXDATA, INTELXL_PFCM_LANCTXSTAT, INTELXL_PFCM_LANCTXSTAT_DONE, len, mdelay(), op, intelxl_nic::queue, queue, intelxl_context_line::raw, readl, intelxl_nic::regs, and writel.

Referenced by intelxl_close().

intelxl_context_line()

int intelxl_context_line ( struct intelxl_nic * intelxl, struct intelxl_context_line * line, unsigned int index, uint32_t op )

static

Program queue context line.

Parameters

intelxl	Intel device
line	Queue context line
index	Line number
op	Context operation

Return values

rc	Return status code

Definition at line 1070 of file intelxl.c.

                                                                    {
        uint32_t pfcm_lanctxctl;
        uint32_t pfcm_lanctxstat;
        unsigned int queue;
        unsigned int i;
 
        /* Write context data */
        for ( i = 0; i < ( sizeof ( *line ) / sizeof ( line->raw[0] ) ); i++ ) {
                writel ( le32_to_cpu ( line->raw[i] ),
                         intelxl->regs + INTELXL_PFCM_LANCTXDATA ( i ) );
        }
 
        /* Start context operation */
        queue = ( intelxl->base + intelxl->queue );
        pfcm_lanctxctl = ( INTELXL_PFCM_LANCTXCTL_QUEUE_NUM ( queue ) |
                           INTELXL_PFCM_LANCTXCTL_SUB_LINE ( index ) |
                           INTELXL_PFCM_LANCTXCTL_OP_CODE_WRITE | op );
        writel ( pfcm_lanctxctl, intelxl->regs + INTELXL_PFCM_LANCTXCTL );
 
        /* Wait for operation to complete */
        for ( i = 0 ; i < INTELXL_CTX_MAX_WAIT_MS ; i++ ) {
 
                /* Check if operation is complete */
                pfcm_lanctxstat = readl ( intelxl->regs +
                                          INTELXL_PFCM_LANCTXSTAT );
                if ( pfcm_lanctxstat & INTELXL_PFCM_LANCTXSTAT_DONE )
                        return 0;
 
                /* Delay */
                mdelay ( 1 );
        }
 
        DBGC ( intelxl, "INTELXL %p timed out waiting for context: %#08x\n",
               intelxl, pfcm_lanctxctl );
        return -ETIMEDOUT;
}

References intelxl_nic::base, DBGC, ETIMEDOUT, index, INTELXL_CTX_MAX_WAIT_MS, INTELXL_PFCM_LANCTXCTL, INTELXL_PFCM_LANCTXCTL_OP_CODE_WRITE, INTELXL_PFCM_LANCTXCTL_QUEUE_NUM, INTELXL_PFCM_LANCTXCTL_SUB_LINE, INTELXL_PFCM_LANCTXDATA, INTELXL_PFCM_LANCTXSTAT, INTELXL_PFCM_LANCTXSTAT_DONE, le32_to_cpu, mdelay(), op, intelxl_nic::queue, queue, intelxl_context_line::raw, readl, intelxl_nic::regs, and writel.

intelxl_context()

int intelxl_context ( struct intelxl_nic * intelxl, struct intelxl_context_line * line, size_t len, uint32_t op )

static

Program queue context.

Parameters

intelxl	Intel device
line	Queue context lines
len	Size of context
op	Context operation

Return values

rc	Return status code

Definition at line 1118 of file intelxl.c.

                                                       {
        unsigned int index;
        int rc;
 
        DBGC2 ( intelxl, "INTELXL %p context %#08x len %#zx:\n",
                intelxl, op, len );
        DBGC2_HDA ( intelxl, 0, line, len );
 
        /* Program one line at a time */
        for ( index = 0 ; ( sizeof ( *line ) * index ) < len ; index++ ) {
                if ( ( rc = intelxl_context_line ( intelxl, line++, index,
                                                   op ) ) != 0 )
                        return rc;
        }
 
        return 0;
}

References DBGC2, DBGC2_HDA, index, len, op, and rc.

Referenced by intelxl_context_rx(), and intelxl_context_tx().

intelxl_context_tx()

int intelxl_context_tx ( struct intelxl_nic * intelxl, physaddr_t address )

static

Program transmit queue context.

Parameters

intelxl	Intel device
address	Descriptor ring base address

Return values

rc	Return status code

Definition at line 1145 of file intelxl.c.

                                                     {
        union {
                struct intelxl_context_tx tx;
                struct intelxl_context_line line;
        } ctx;
        int rc;
 
        /* Initialise context */
        memset ( &ctx, 0, sizeof ( ctx ) );
        ctx.tx.flags = cpu_to_le16 ( INTELXL_CTX_TX_FL_NEW );
        ctx.tx.base = cpu_to_le64 ( INTELXL_CTX_TX_BASE ( address ) );
        ctx.tx.count =
                cpu_to_le16 ( INTELXL_CTX_TX_COUNT ( INTELXL_TX_NUM_DESC ) );
        ctx.tx.qset = INTELXL_CTX_TX_QSET ( intelxl->qset );
 
        /* Program context */
        if ( ( rc = intelxl_context ( intelxl, &ctx.line, sizeof ( ctx ),
                                      INTELXL_PFCM_LANCTXCTL_TYPE_TX ) ) != 0 )
                return rc;
 
        return 0;
}

References address, cpu_to_le16, cpu_to_le64, ctx, intelxl_context(), INTELXL_CTX_TX_BASE, INTELXL_CTX_TX_COUNT, INTELXL_CTX_TX_FL_NEW, INTELXL_CTX_TX_QSET, INTELXL_PFCM_LANCTXCTL_TYPE_TX, INTELXL_TX_NUM_DESC, memset(), intelxl_nic::qset, rc, and tx.

intelxl_context_rx()

int intelxl_context_rx ( struct intelxl_nic * intelxl, physaddr_t address )

static

Program receive queue context.

Parameters

intelxl	Intel device
address	Descriptor ring base address

Return values

rc	Return status code

Definition at line 1176 of file intelxl.c.

                                                     {
        union {
                struct intelxl_context_rx rx;
                struct intelxl_context_line line;
        } ctx;
        uint64_t base_count;
        int rc;
 
        /* Initialise context */
        memset ( &ctx, 0, sizeof ( ctx ) );
        base_count = INTELXL_CTX_RX_BASE_COUNT ( address, INTELXL_RX_NUM_DESC );
        ctx.rx.base_count = cpu_to_le64 ( base_count );
        ctx.rx.len = cpu_to_le16 ( INTELXL_CTX_RX_LEN ( intelxl->mfs ) );
        ctx.rx.flags = ( INTELXL_CTX_RX_FL_DSIZE | INTELXL_CTX_RX_FL_CRCSTRIP );
        ctx.rx.mfs = cpu_to_le16 ( INTELXL_CTX_RX_MFS ( intelxl->mfs ) );
 
        /* Program context */
        if ( ( rc = intelxl_context ( intelxl, &ctx.line, sizeof ( ctx ),
                                      INTELXL_PFCM_LANCTXCTL_TYPE_RX ) ) != 0 )
                return rc;
 
        return 0;
}

References address, cpu_to_le16, cpu_to_le64, ctx, intelxl_context(), INTELXL_CTX_RX_BASE_COUNT, INTELXL_CTX_RX_FL_CRCSTRIP, INTELXL_CTX_RX_FL_DSIZE, INTELXL_CTX_RX_LEN, INTELXL_CTX_RX_MFS, INTELXL_PFCM_LANCTXCTL_TYPE_RX, INTELXL_RX_NUM_DESC, memset(), intelxl_nic::mfs, rc, and rx.

intelxl_enable_ring()

int intelxl_enable_ring ( struct intelxl_nic * intelxl, struct intelxl_ring * ring )

static

Enable descriptor ring.

Parameters

intelxl	Intel device
ring	Descriptor ring

Return values

rc	Return status code

Definition at line 1208 of file intelxl.c.

                                                             {
        void *ring_regs = ( intelxl->regs + ring->reg );
        uint32_t qxx_ena;
 
        /* Enable ring */
        writel ( INTELXL_QXX_ENA_REQ, ( ring_regs + INTELXL_QXX_ENA ) );
        udelay ( INTELXL_QUEUE_ENABLE_DELAY_US );
        qxx_ena = readl ( ring_regs + INTELXL_QXX_ENA );
        if ( ! ( qxx_ena & INTELXL_QXX_ENA_STAT ) ) {
                DBGC ( intelxl, "INTELXL %p ring %06x failed to enable: "
                       "%#08x\n", intelxl, ring->tail, qxx_ena );
                return -EIO;
        }
 
        return 0;
}

References DBGC, EIO, INTELXL_QUEUE_ENABLE_DELAY_US, INTELXL_QXX_ENA, INTELXL_QXX_ENA_REQ, INTELXL_QXX_ENA_STAT, readl, intelxl_ring::reg, intelxl_nic::regs, intelxl_ring::tail, udelay(), and writel.

Referenced by intelxl_create_ring().

intelxl_disable_ring()

int intelxl_disable_ring ( struct intelxl_nic * intelxl, struct intelxl_ring * ring )

static

Disable descriptor ring.

Parameters

intelxl	Intel device
ring	Descriptor ring

Return values

rc	Return status code

Definition at line 1233 of file intelxl.c.

                                                              {
        void *ring_regs = ( intelxl->regs + ring->reg );
        uint32_t qxx_ena;
        unsigned int i;
 
        /* Disable ring */
        writel ( 0, ( ring_regs + INTELXL_QXX_ENA ) );
 
        /* Wait for ring to be disabled */
        for ( i = 0 ; i < INTELXL_QUEUE_DISABLE_MAX_WAIT_MS ; i++ ) {
 
                /* Check if ring is disabled */
                qxx_ena = readl ( ring_regs + INTELXL_QXX_ENA );
                if ( ! ( qxx_ena & INTELXL_QXX_ENA_STAT ) )
                        return 0;
 
                /* Delay */
                mdelay ( 1 );
        }
 
        DBGC ( intelxl, "INTELXL %p ring %06x timed out waiting for disable: "
               "%#08x\n", intelxl, ring->tail, qxx_ena );
        return -ETIMEDOUT;
}

References DBGC, ETIMEDOUT, INTELXL_QUEUE_DISABLE_MAX_WAIT_MS, INTELXL_QXX_ENA, INTELXL_QXX_ENA_STAT, mdelay(), readl, intelxl_ring::reg, intelxl_nic::regs, intelxl_ring::tail, and writel.

Referenced by intelxl_create_ring(), and intelxl_destroy_ring().

intelxl_create_ring()

int intelxl_create_ring	(	struct intelxl_nic *	intelxl,
		struct intelxl_ring *	ring )

Create descriptor ring.

Parameters

intelxl	Intel device
ring	Descriptor ring

Return values

rc	Return status code

Definition at line 1266 of file intelxl.c.

                                                      {
        physaddr_t address;
        int rc;
 
        /* Allocate descriptor ring */
        if ( ( rc = intelxl_alloc_ring ( intelxl, ring ) ) != 0 )
                goto err_alloc;
 
        /* Program queue context */
        address = dma ( &ring->map, ring->desc.raw );
        if ( ( rc = ring->context ( intelxl, address ) ) != 0 )
                goto err_context;
 
        /* Enable ring */
        if ( ( rc = intelxl_enable_ring ( intelxl, ring ) ) != 0 )
                goto err_enable;
 
        return 0;
 
        intelxl_disable_ring ( intelxl, ring );
 err_enable:
 err_context:
        intelxl_free_ring ( intelxl, ring );
 err_alloc:
        return rc;
}

References address, intelxl_ring::context, intelxl_ring::desc, dma(), intelxl_alloc_ring(), intelxl_disable_ring(), intelxl_enable_ring(), intelxl_free_ring(), intelxl_ring::map, intelxl_ring::raw, and rc.

Referenced by ice_open(), and intelxl_open().

intelxl_destroy_ring()

void intelxl_destroy_ring	(	struct intelxl_nic *	intelxl,
		struct intelxl_ring *	ring )

Destroy descriptor ring.

Parameters

intelxl	Intel device
ring	Descriptor ring

Definition at line 1300 of file intelxl.c.

                                                        {
        int rc;
 
        /* Disable ring */
        if ( ( rc = intelxl_disable_ring ( intelxl, ring ) ) != 0 ) {
                /* Leak memory; there's nothing else we can do */
                return;
        }
 
        /* Free descriptor ring */
        intelxl_free_ring ( intelxl, ring );
}

References intelxl_disable_ring(), intelxl_free_ring(), and rc.

Referenced by ice_close(), ice_open(), intelxl_close(), and intelxl_open().

intelxl_refill_rx()

void intelxl_refill_rx ( struct intelxl_nic * intelxl )

static

Refill receive descriptor ring.

Parameters

intelxl

Intel device

Definition at line 1319 of file intelxl.c.

                                                              {
        struct intelxl_rx_data_descriptor *rx;
        struct io_buffer *iobuf;
        unsigned int rx_idx;
        unsigned int rx_tail;
        unsigned int refilled = 0;
 
        /* Refill ring */
        while ( ( intelxl->rx.prod - intelxl->rx.cons ) < INTELXL_RX_FILL ) {
 
                /* Allocate I/O buffer */
                iobuf = alloc_rx_iob ( intelxl->mfs, intelxl->dma );
                if ( ! iobuf ) {
                        /* Wait for next refill */
                        break;
                }
 
                /* Get next receive descriptor */
                rx_idx = ( intelxl->rx.prod++ % INTELXL_RX_NUM_DESC );
                rx = &intelxl->rx.desc.rx[rx_idx].data;
 
                /* Populate receive descriptor */
                rx->address = cpu_to_le64 ( iob_dma ( iobuf ) );
                rx->flags = 0;
 
                /* Record I/O buffer */
                assert ( intelxl->rx_iobuf[rx_idx] == NULL );
                intelxl->rx_iobuf[rx_idx] = iobuf;
 
                DBGC2 ( intelxl, "INTELXL %p RX %d is [%08lx,%08lx)\n",
                        intelxl, rx_idx, virt_to_phys ( iobuf->data ),
                        ( virt_to_phys ( iobuf->data ) +  intelxl->mfs ) );
                refilled++;
        }
 
        /* Push descriptors to card, if applicable */
        if ( refilled ) {
                wmb();
                rx_tail = ( intelxl->rx.prod % INTELXL_RX_NUM_DESC );
                writel ( rx_tail, ( intelxl->regs + intelxl->rx.tail ) );
        }
}

References alloc_rx_iob(), assert, intelxl_ring::cons, cpu_to_le64, intelxl_rx_descriptor::data, io_buffer::data, DBGC2, intelxl_ring::desc, intelxl_nic::dma, INTELXL_RX_FILL, INTELXL_RX_NUM_DESC, iob_dma(), intelxl_nic::mfs, NULL, intelxl_ring::prod, intelxl_nic::regs, intelxl_nic::rx, intelxl_ring::rx, rx, intelxl_nic::rx_iobuf, intelxl_ring::tail, wmb, and writel.

Referenced by intelxl_open(), and intelxl_poll().

intelxl_empty_rx()

void intelxl_empty_rx

(

struct intelxl_nic *

intelxl

)

Discard unused receive I/O buffers.

Parameters

intelxl

Intel device

Definition at line 1367 of file intelxl.c.

                                                      {
        unsigned int i;
 
        /* Discard any unused receive buffers */
        for ( i = 0 ; i < INTELXL_RX_NUM_DESC ; i++ ) {
                if ( intelxl->rx_iobuf[i] )
                        free_rx_iob ( intelxl->rx_iobuf[i] );
                intelxl->rx_iobuf[i] = NULL;
        }
}

References free_rx_iob(), INTELXL_RX_NUM_DESC, NULL, and intelxl_nic::rx_iobuf.

Referenced by ice_close(), intelxl_close(), and intelxlvf_close().

intelxl_open()

int intelxl_open ( struct net_device * netdev )

static

Open network device.

Parameters

netdev

Network device

Return values

rc	Return status code

Definition at line 1391 of file intelxl.c.

                                                      {
        struct intelxl_nic *intelxl = netdev->priv;
        unsigned int queue;
        int rc;
 
        /* Calculate maximum frame size */
        intelxl->mfs = ( ( ETH_HLEN + netdev->mtu + 4 /* CRC */ +
                           INTELXL_ALIGN - 1 ) & ~( INTELXL_ALIGN - 1 ) );
 
        /* Set MAC address */
        if ( ( rc = intelxl_admin_mac_write ( netdev ) ) != 0 )
                goto err_mac_write;
 
        /* Set maximum frame size */
        if ( ( rc = intelxl_admin_mac_config ( intelxl ) ) != 0 )
                goto err_mac_config;
 
        /* Associate transmit queue to PF */
        writel ( ( INTELXL_QXX_CTL_PFVF_Q_PF |
                   INTELXL_QXX_CTL_PFVF_PF_INDX ( intelxl->pf ) ),
                 ( intelxl->regs + intelxl->tx.reg + INTELXL_QXX_CTL ) );
 
        /* Clear transmit pre queue disable */
        queue = ( intelxl->base + intelxl->queue );
        writel ( ( INTELXL_GLLAN_TXPRE_QDIS_CLEAR_QDIS |
                   INTELXL_GLLAN_TXPRE_QDIS_QINDX ( queue ) ),
                 ( intelxl->regs + INTELXL_GLLAN_TXPRE_QDIS ( queue ) ) );
 
        /* Reset transmit queue head */
        writel ( 0, ( intelxl->regs + INTELXL_QTX_HEAD ( intelxl->queue ) ) );
 
        /* Create receive descriptor ring */
        if ( ( rc = intelxl_create_ring ( intelxl, &intelxl->rx ) ) != 0 )
                goto err_create_rx;
 
        /* Create transmit descriptor ring */
        if ( ( rc = intelxl_create_ring ( intelxl, &intelxl->tx ) ) != 0 )
                goto err_create_tx;
 
        /* Fill receive ring */
        intelxl_refill_rx ( intelxl );
 
        /* Restart autonegotiation */
        intelxl_admin_autoneg ( intelxl );
 
        /* Update link state */
        intelxl_admin_link ( netdev );
 
        return 0;
 
        writel ( ( INTELXL_GLLAN_TXPRE_QDIS_SET_QDIS |
                   INTELXL_GLLAN_TXPRE_QDIS_QINDX ( queue ) ),
                 ( intelxl->regs + INTELXL_GLLAN_TXPRE_QDIS ( queue ) ) );
        udelay ( INTELXL_QUEUE_PRE_DISABLE_DELAY_US );
        intelxl_destroy_ring ( intelxl, &intelxl->tx );
 err_create_tx:
        intelxl_destroy_ring ( intelxl, &intelxl->rx );
 err_create_rx:
 err_mac_config:
 err_mac_write:
        return rc;
}

References intelxl_nic::base, ETH_HLEN, intelxl_admin_autoneg(), intelxl_admin_link(), intelxl_admin_mac_config(), intelxl_admin_mac_write(), INTELXL_ALIGN, intelxl_create_ring(), intelxl_destroy_ring(), INTELXL_GLLAN_TXPRE_QDIS, INTELXL_GLLAN_TXPRE_QDIS_CLEAR_QDIS, INTELXL_GLLAN_TXPRE_QDIS_QINDX, INTELXL_GLLAN_TXPRE_QDIS_SET_QDIS, INTELXL_QTX_HEAD, INTELXL_QUEUE_PRE_DISABLE_DELAY_US, INTELXL_QXX_CTL, INTELXL_QXX_CTL_PFVF_PF_INDX, INTELXL_QXX_CTL_PFVF_Q_PF, intelxl_refill_rx(), intelxl_nic::mfs, netdev, intelxl_nic::pf, intelxl_nic::queue, queue, rc, intelxl_ring::reg, intelxl_nic::regs, intelxl_nic::rx, intelxl_nic::tx, udelay(), and writel.

intelxl_close()

void intelxl_close ( struct net_device * netdev )

static

Close network device.

Parameters

netdev

Network device

Definition at line 1459 of file intelxl.c.

                                                        {
        struct intelxl_nic *intelxl = netdev->priv;
        unsigned int queue;
 
        /* Dump contexts (for debugging) */
        intelxl_context_dump ( intelxl, INTELXL_PFCM_LANCTXCTL_TYPE_TX,
                               sizeof ( struct intelxl_context_tx ) );
        intelxl_context_dump ( intelxl, INTELXL_PFCM_LANCTXCTL_TYPE_RX,
                               sizeof ( struct intelxl_context_rx ) );
 
        /* Pre-disable transmit queue */
        queue = ( intelxl->base + intelxl->queue );
        writel ( ( INTELXL_GLLAN_TXPRE_QDIS_SET_QDIS |
                   INTELXL_GLLAN_TXPRE_QDIS_QINDX ( queue ) ),
                 ( intelxl->regs + INTELXL_GLLAN_TXPRE_QDIS ( queue ) ) );
        udelay ( INTELXL_QUEUE_PRE_DISABLE_DELAY_US );
 
        /* Destroy transmit descriptor ring */
        intelxl_destroy_ring ( intelxl, &intelxl->tx );
 
        /* Destroy receive descriptor ring */
        intelxl_destroy_ring ( intelxl, &intelxl->rx );
 
        /* Discard any unused receive buffers */
        intelxl_empty_rx ( intelxl );
}

References intelxl_nic::base, intelxl_context_dump(), intelxl_destroy_ring(), intelxl_empty_rx(), INTELXL_GLLAN_TXPRE_QDIS, INTELXL_GLLAN_TXPRE_QDIS_QINDX, INTELXL_GLLAN_TXPRE_QDIS_SET_QDIS, INTELXL_PFCM_LANCTXCTL_TYPE_RX, INTELXL_PFCM_LANCTXCTL_TYPE_TX, INTELXL_QUEUE_PRE_DISABLE_DELAY_US, netdev, intelxl_nic::queue, queue, intelxl_nic::regs, intelxl_nic::rx, intelxl_nic::tx, udelay(), and writel.

intelxl_transmit()

int intelxl_transmit	(	struct net_device *	netdev,
		struct io_buffer *	iobuf )

Transmit packet.

Parameters

netdev	Network device
iobuf	I/O buffer

Return values

rc	Return status code

Definition at line 1493 of file intelxl.c.

                                                                            {
        struct intelxl_nic *intelxl = netdev->priv;
        struct intelxl_tx_data_descriptor *tx;
        unsigned int tx_idx;
        unsigned int tx_tail;
        size_t len;
 
        /* Get next transmit descriptor */
        if ( ( intelxl->tx.prod - intelxl->tx.cons ) >= INTELXL_TX_FILL ) {
                DBGC ( intelxl, "INTELXL %p out of transmit descriptors\n",
                       intelxl );
                return -ENOBUFS;
        }
        tx_idx = ( intelxl->tx.prod++ % INTELXL_TX_NUM_DESC );
        tx_tail = ( intelxl->tx.prod % INTELXL_TX_NUM_DESC );
        tx = &intelxl->tx.desc.tx[tx_idx].data;
 
        /* Populate transmit descriptor */
        len = iob_len ( iobuf );
        tx->address = cpu_to_le64 ( iob_dma ( iobuf ) );
        tx->len = cpu_to_le32 ( INTELXL_TX_DATA_LEN ( len ) );
        tx->flags = cpu_to_le32 ( INTELXL_TX_DATA_DTYP | INTELXL_TX_DATA_EOP |
                                  INTELXL_TX_DATA_RS | INTELXL_TX_DATA_JFDI );
        wmb();
 
        /* Notify card that there are packets ready to transmit */
        writel ( tx_tail, ( intelxl->regs + intelxl->tx.tail ) );
 
        DBGC2 ( intelxl, "INTELXL %p TX %d is [%08lx,%08lx)\n",
                intelxl, tx_idx, virt_to_phys ( iobuf->data ),
                ( virt_to_phys ( iobuf->data ) + len ) );
        return 0;
}

References intelxl_ring::cons, cpu_to_le32, cpu_to_le64, intelxl_tx_descriptor::data, io_buffer::data, DBGC, DBGC2, intelxl_ring::desc, ENOBUFS, INTELXL_TX_DATA_DTYP, INTELXL_TX_DATA_EOP, INTELXL_TX_DATA_JFDI, INTELXL_TX_DATA_LEN, INTELXL_TX_DATA_RS, INTELXL_TX_FILL, INTELXL_TX_NUM_DESC, iob_dma(), iob_len(), len, netdev, intelxl_ring::prod, intelxl_nic::regs, intelxl_ring::tail, intelxl_nic::tx, intelxl_ring::tx, tx, wmb, and writel.

intelxl_poll_tx()

void intelxl_poll_tx ( struct net_device * netdev )

static

Poll for completed packets.

Parameters

netdev

Network device

Definition at line 1532 of file intelxl.c.

                                                          {
        struct intelxl_nic *intelxl = netdev->priv;
        struct intelxl_tx_writeback_descriptor *tx_wb;
        unsigned int tx_idx;
 
        /* Check for completed packets */
        while ( intelxl->tx.cons != intelxl->tx.prod ) {
 
                /* Get next transmit descriptor */
                tx_idx = ( intelxl->tx.cons % INTELXL_TX_NUM_DESC );
                tx_wb = &intelxl->tx.desc.tx[tx_idx].wb;
 
                /* Stop if descriptor is still in use */
                if ( ! ( tx_wb->flags & INTELXL_TX_WB_FL_DD ) )
                        return;
                DBGC2 ( intelxl, "INTELXL %p TX %d complete\n",
                        intelxl, tx_idx );
 
                /* Complete TX descriptor */
                netdev_tx_complete_next ( netdev );
                intelxl->tx.cons++;
        }
}

References intelxl_ring::cons, DBGC2, intelxl_ring::desc, intelxl_tx_writeback_descriptor::flags, INTELXL_TX_NUM_DESC, INTELXL_TX_WB_FL_DD, netdev, netdev_tx_complete_next(), intelxl_ring::prod, intelxl_nic::tx, intelxl_ring::tx, and intelxl_tx_descriptor::wb.

Referenced by intelxl_poll().

intelxl_poll_rx()

void intelxl_poll_rx ( struct net_device * netdev )

static

Poll for received packets.

Parameters

netdev

Network device

Definition at line 1561 of file intelxl.c.

                                                          {
        struct intelxl_nic *intelxl = netdev->priv;
        struct intelxl_rx_writeback_descriptor *rx_wb;
        struct io_buffer *iobuf;
        unsigned int rx_idx;
        unsigned int tag;
        size_t len;
 
        /* Check for received packets */
        while ( intelxl->rx.cons != intelxl->rx.prod ) {
 
                /* Get next receive descriptor */
                rx_idx = ( intelxl->rx.cons % INTELXL_RX_NUM_DESC );
                rx_wb = &intelxl->rx.desc.rx[rx_idx].wb;
 
                /* Stop if descriptor is still in use */
                if ( ! ( rx_wb->flags & cpu_to_le32 ( INTELXL_RX_WB_FL_DD ) ) )
                        return;
 
                /* Populate I/O buffer */
                iobuf = intelxl->rx_iobuf[rx_idx];
                intelxl->rx_iobuf[rx_idx] = NULL;
                len = INTELXL_RX_WB_LEN ( le32_to_cpu ( rx_wb->len ) );
                iob_put ( iobuf, len );
 
                /* Find VLAN device, if applicable */
                if ( rx_wb->flags & cpu_to_le32 ( INTELXL_RX_WB_FL_VLAN ) ) {
                        tag = VLAN_TAG ( le16_to_cpu ( rx_wb->vlan ) );
                } else {
                        tag = 0;
                }
 
                /* Hand off to network stack */
                if ( rx_wb->flags & cpu_to_le32 ( INTELXL_RX_WB_FL_RXE ) ) {
                        DBGC ( intelxl, "INTELXL %p RX %d error (length %zd, "
                               "flags %08x)\n", intelxl, rx_idx, len,
                               le32_to_cpu ( rx_wb->flags ) );
                        vlan_netdev_rx_err ( netdev, tag, iobuf, -EIO );
                } else {
                        DBGC2 ( intelxl, "INTELXL %p RX %d complete (length "
                                "%zd)\n", intelxl, rx_idx, len );
                        vlan_netdev_rx ( netdev, tag, iobuf );
                }
                intelxl->rx.cons++;
        }
}

References intelxl_ring::cons, cpu_to_le32, DBGC, DBGC2, intelxl_ring::desc, EIO, intelxl_rx_writeback_descriptor::flags, INTELXL_RX_NUM_DESC, INTELXL_RX_WB_FL_DD, INTELXL_RX_WB_FL_RXE, INTELXL_RX_WB_FL_VLAN, INTELXL_RX_WB_LEN, iob_put, le16_to_cpu, le32_to_cpu, intelxl_rx_writeback_descriptor::len, len, netdev, NULL, intelxl_ring::prod, intelxl_nic::rx, intelxl_ring::rx, intelxl_nic::rx_iobuf, tag, intelxl_rx_writeback_descriptor::vlan, vlan_netdev_rx(), vlan_netdev_rx_err(), VLAN_TAG, and intelxl_rx_descriptor::wb.

Referenced by intelxl_poll().

intelxl_poll()

void intelxl_poll

(

struct net_device *

netdev

)

Poll for completed and received packets.

Parameters

netdev

Network device

Definition at line 1613 of file intelxl.c.

                                                {
        struct intelxl_nic *intelxl = netdev->priv;
 
        /* Poll for completed packets */
        intelxl_poll_tx ( netdev );
 
        /* Poll for received packets */
        intelxl_poll_rx ( netdev );
 
        /* Poll for admin events */
        intelxl_poll_admin ( netdev );
 
        /* Refill RX ring */
        intelxl_refill_rx ( intelxl );
 
        /* Rearm interrupt, since otherwise receive descriptors will
         * be written back only after a complete cacheline (four
         * packets) have been received.
         *
         * There is unfortunately no efficient way to determine
         * whether or not rearming the interrupt is necessary.  If we
         * are running inside a hypervisor (e.g. using a VF or PF as a
         * passed-through PCI device), then the MSI-X write is
         * redirected by the hypervisor to the real host APIC and the
         * host ISR then raises an interrupt within the guest.  We
         * therefore cannot poll the nominal MSI-X target location to
         * watch for the value being written.  We could read from the
         * INT_DYN_CTL register, but this is even less efficient than
         * just unconditionally rearming the interrupt.
         */
        writel ( INTELXL_INT_DYN_CTL_INTENA, intelxl->regs + intelxl->intr );
}

References INTELXL_INT_DYN_CTL_INTENA, intelxl_poll_admin(), intelxl_poll_rx(), intelxl_poll_tx(), intelxl_refill_rx(), intelxl_nic::intr, netdev, intelxl_nic::regs, and writel.

intelxl_probe()

int intelxl_probe ( struct pci_device * pci )

static

Probe PCI device.

Parameters

pci	PCI device

Return values

rc	Return status code

Definition at line 1667 of file intelxl.c.

                                                    {
        struct net_device *netdev;
        struct intelxl_nic *intelxl;
        uint32_t pffunc_rid;
        uint32_t pfgen_portnum;
        uint32_t pflan_qalloc;
        int rc;
 
        /* Allocate and initialise net device */
        netdev = alloc_etherdev ( sizeof ( *intelxl ) );
        if ( ! netdev ) {
                rc = -ENOMEM;
                goto err_alloc;
        }
        netdev_init ( netdev, &intelxl_operations );
        netdev->max_pkt_len = INTELXL_MAX_PKT_LEN;
        intelxl = netdev->priv;
        pci_set_drvdata ( pci, netdev );
        netdev->dev = &pci->dev;
        memset ( intelxl, 0, sizeof ( *intelxl ) );
        intelxl->intr = INTELXL_PFINT_DYN_CTL0;
        intelxl->handle = intelxl_admin_event;
        intelxl_init_admin ( &intelxl->command, INTELXL_ADMIN_CMD,
                             &intelxl_admin_offsets );
        intelxl_init_admin ( &intelxl->event, INTELXL_ADMIN_EVT,
                             &intelxl_admin_offsets );
        intelxl_init_ring ( &intelxl->tx, INTELXL_TX_NUM_DESC,
                            sizeof ( intelxl->tx.desc.tx[0] ),
                            intelxl_context_tx );
        intelxl_init_ring ( &intelxl->rx, INTELXL_RX_NUM_DESC,
                            sizeof ( intelxl->rx.desc.rx[0] ),
                            intelxl_context_rx );
 
        /* Fix up PCI device */
        adjust_pci_device ( pci );
 
        /* Map registers */
        intelxl->regs = pci_ioremap ( pci, pci->membase, INTELXL_BAR_SIZE );
        if ( ! intelxl->regs ) {
                rc = -ENODEV;
                goto err_ioremap;
        }
 
        /* Configure DMA */
        intelxl->dma = &pci->dma;
        dma_set_mask_64bit ( intelxl->dma );
        netdev->dma = intelxl->dma;
 
        /* Locate PCI Express capability */
        intelxl->exp = pci_find_capability ( pci, PCI_CAP_ID_EXP );
        if ( ! intelxl->exp ) {
                DBGC ( intelxl, "INTELXL %p missing PCIe capability\n",
                       intelxl );
                rc = -ENXIO;
                goto err_exp;
        }
 
        /* Reset the function via PCIe FLR */
        pci_reset ( pci, intelxl->exp );
 
        /* Get function number, port number and base queue number */
        pffunc_rid = readl ( intelxl->regs + INTELXL_PFFUNC_RID );
        intelxl->pf = INTELXL_PFFUNC_RID_FUNC_NUM ( pffunc_rid );
        pfgen_portnum = readl ( intelxl->regs + INTELXL_PFGEN_PORTNUM );
        intelxl->port = INTELXL_PFGEN_PORTNUM_PORT_NUM ( pfgen_portnum );
        pflan_qalloc = readl ( intelxl->regs + INTELXL_PFLAN_QALLOC );
        intelxl->base = INTELXL_PFLAN_QALLOC_FIRSTQ ( pflan_qalloc );
        DBGC ( intelxl, "INTELXL %p PF %d using port %d queues [%#04x-%#04x]\n",
               intelxl, intelxl->pf, intelxl->port, intelxl->base,
               INTELXL_PFLAN_QALLOC_LASTQ ( pflan_qalloc ) );
 
        /* Enable MSI-X dummy interrupt */
        if ( ( rc = intelxl_msix_enable ( intelxl, pci,
                                          INTELXL_MSIX_VECTOR ) ) != 0 )
                goto err_msix;
 
        /* Open admin queues */
        if ( ( rc = intelxl_open_admin ( intelxl ) ) != 0 )
                goto err_open_admin;
 
        /* Get firmware version */
        if ( ( rc = intelxl_admin_version ( intelxl ) ) != 0 )
                goto err_admin_version;
 
        /* Report driver version */
        if ( ( rc = intelxl_admin_driver ( intelxl ) ) != 0 )
                goto err_admin_driver;
 
        /* Clear PXE mode */
        if ( ( rc = intelxl_admin_clear_pxe ( intelxl ) ) != 0 )
                goto err_admin_clear_pxe;
 
        /* Get switch configuration */
        if ( ( rc = intelxl_admin_switch ( intelxl ) ) != 0 )
                goto err_admin_switch;
 
        /* Get VSI configuration */
        if ( ( rc = intelxl_admin_vsi ( intelxl ) ) != 0 )
                goto err_admin_vsi;
 
        /* Configure switch for promiscuous mode */
        if ( ( rc = intelxl_admin_promisc ( intelxl ) ) != 0 )
                goto err_admin_promisc;
 
        /* Get MAC address */
        if ( ( rc = intelxl_admin_mac_read ( netdev ) ) != 0 )
                goto err_admin_mac_read;
 
        /* Configure queue register addresses */
        intelxl->tx.reg = INTELXL_QTX ( intelxl->queue );
        intelxl->tx.tail = ( intelxl->tx.reg + INTELXL_QXX_TAIL );
        intelxl->rx.reg = INTELXL_QRX ( intelxl->queue );
        intelxl->rx.tail = ( intelxl->rx.reg + INTELXL_QXX_TAIL );
 
        /* Configure interrupt causes */
        writel ( ( INTELXL_QINT_TQCTL_NEXTQ_INDX_NONE |
                   INTELXL_QINT_TQCTL_CAUSE_ENA ),
                 intelxl->regs + INTELXL_QINT_TQCTL ( intelxl->queue ) );
        writel ( ( INTELXL_QINT_RQCTL_NEXTQ_INDX ( intelxl->queue ) |
                   INTELXL_QINT_RQCTL_NEXTQ_TYPE_TX |
                   INTELXL_QINT_RQCTL_CAUSE_ENA ),
                 intelxl->regs + INTELXL_QINT_RQCTL ( intelxl->queue ) );
        writel ( ( INTELXL_PFINT_LNKLST0_FIRSTQ_INDX ( intelxl->queue ) |
                   INTELXL_PFINT_LNKLST0_FIRSTQ_TYPE_RX ),
                 intelxl->regs + INTELXL_PFINT_LNKLST0 );
        writel ( INTELXL_PFINT_ICR0_ENA_ADMINQ,
                 intelxl->regs + INTELXL_PFINT_ICR0_ENA );
 
        /* Register network device */
        if ( ( rc = register_netdev ( netdev ) ) != 0 )
                goto err_register_netdev;
 
        /* Set initial link state */
        intelxl_admin_link ( netdev );
 
        return 0;
 
        unregister_netdev ( netdev );
 err_register_netdev:
 err_admin_mac_read:
 err_admin_promisc:
 err_admin_vsi:
 err_admin_switch:
 err_admin_clear_pxe:
 err_admin_driver:
 err_admin_version:
        intelxl_close_admin ( intelxl );
 err_open_admin:
        intelxl_msix_disable ( intelxl, pci, INTELXL_MSIX_VECTOR );
 err_msix:
        pci_reset ( pci, intelxl->exp );
 err_exp:
        iounmap ( intelxl->regs );
 err_ioremap:
        netdev_nullify ( netdev );
        netdev_put ( netdev );
 err_alloc:
        return rc;
}

References adjust_pci_device(), alloc_etherdev(), intelxl_nic::base, intelxl_nic::command, DBGC, intelxl_ring::desc, pci_device::dev, intelxl_nic::dma, pci_device::dma, dma_set_mask_64bit(), ENODEV, ENOMEM, ENXIO, intelxl_nic::event, intelxl_nic::exp, intelxl_nic::handle, intelxl_admin_clear_pxe(), INTELXL_ADMIN_CMD, intelxl_admin_driver(), intelxl_admin_event(), INTELXL_ADMIN_EVT, intelxl_admin_link(), intelxl_admin_mac_read(), intelxl_admin_promisc(), intelxl_admin_switch(), intelxl_admin_vsi(), INTELXL_BAR_SIZE, intelxl_close_admin(), intelxl_init_admin(), intelxl_init_ring(), INTELXL_MAX_PKT_LEN, intelxl_msix_disable(), intelxl_msix_enable(), INTELXL_MSIX_VECTOR, intelxl_open_admin(), intelxl_operations, INTELXL_PFFUNC_RID, INTELXL_PFFUNC_RID_FUNC_NUM, INTELXL_PFGEN_PORTNUM, INTELXL_PFGEN_PORTNUM_PORT_NUM, INTELXL_PFINT_DYN_CTL0, INTELXL_PFINT_ICR0_ENA, INTELXL_PFINT_ICR0_ENA_ADMINQ, INTELXL_PFINT_LNKLST0, INTELXL_PFINT_LNKLST0_FIRSTQ_INDX, INTELXL_PFINT_LNKLST0_FIRSTQ_TYPE_RX, INTELXL_PFLAN_QALLOC, INTELXL_PFLAN_QALLOC_FIRSTQ, INTELXL_PFLAN_QALLOC_LASTQ, INTELXL_QINT_RQCTL, INTELXL_QINT_RQCTL_CAUSE_ENA, INTELXL_QINT_RQCTL_NEXTQ_INDX, INTELXL_QINT_RQCTL_NEXTQ_TYPE_TX, INTELXL_QINT_TQCTL, INTELXL_QINT_TQCTL_CAUSE_ENA, INTELXL_QINT_TQCTL_NEXTQ_INDX_NONE, INTELXL_QRX, INTELXL_QTX, INTELXL_QXX_TAIL, INTELXL_RX_NUM_DESC, INTELXL_TX_NUM_DESC, intelxl_nic::intr, iounmap(), pci_device::membase, memset(), netdev, netdev_init(), netdev_nullify(), netdev_put(), PCI_CAP_ID_EXP, pci_find_capability(), pci_ioremap(), pci_reset(), pci_set_drvdata(), intelxl_nic::pf, intelxl_nic::port, intelxl_nic::queue, rc, readl, intelxl_ring::reg, register_netdev(), intelxl_nic::regs, intelxl_nic::rx, intelxl_ring::rx, intelxl_ring::tail, intelxl_nic::tx, intelxl_ring::tx, unregister_netdev(), and writel.

intelxl_remove()

void intelxl_remove ( struct pci_device * pci )

static

Remove PCI device.

Parameters

pci	PCI device

Definition at line 1832 of file intelxl.c.

                                                      {
        struct net_device *netdev = pci_get_drvdata ( pci );
        struct intelxl_nic *intelxl = netdev->priv;
 
        /* Unregister network device */
        unregister_netdev ( netdev );
 
        /* Close admin queues */
        intelxl_close_admin ( intelxl );
 
        /* Disable MSI-X dummy interrupt */
        intelxl_msix_disable ( intelxl, pci, INTELXL_MSIX_VECTOR );
 
        /* Reset the NIC */
        pci_reset ( pci, intelxl->exp );
 
        /* Free network device */
        iounmap ( intelxl->regs );
        netdev_nullify ( netdev );
        netdev_put ( netdev );
}

References intelxl_nic::exp, intelxl_close_admin(), intelxl_msix_disable(), INTELXL_MSIX_VECTOR, iounmap(), netdev, netdev_nullify(), netdev_put(), pci_get_drvdata(), pci_reset(), intelxl_nic::regs, and unregister_netdev().

Variable Documentation

intelxl_admin_offsets

const struct intelxl_admin_offsets intelxl_admin_offsets

Initial value:

= {
        .bal = INTELXL_ADMIN_BAL,
        .bah = INTELXL_ADMIN_BAH,
        .len = INTELXL_ADMIN_LEN,
        .head = INTELXL_ADMIN_HEAD,
        .tail = INTELXL_ADMIN_TAIL,
}

Admin queue register offsets.

Definition at line 109 of file intelxl.c.

                                                           {
        .bal = INTELXL_ADMIN_BAL,
        .bah = INTELXL_ADMIN_BAH,
        .len = INTELXL_ADMIN_LEN,
        .head = INTELXL_ADMIN_HEAD,
        .tail = INTELXL_ADMIN_TAIL,
};

intelxl_operations

struct net_device_operations intelxl_operations

static

Initial value:

= {
        .open           = intelxl_open,
        .close          = intelxl_close,
        .transmit       = intelxl_transmit,
        .poll           = intelxl_poll,
}

Network device operations.

Definition at line 1647 of file intelxl.c.

                                                         {
        .open           = intelxl_open,
        .close          = intelxl_close,
        .transmit       = intelxl_transmit,
        .poll           = intelxl_poll,
};

Referenced by intelxl_probe().

intelxl_nics

struct pci_device_id intelxl_nics[]

static

Initial value:

= {
        PCI_ROM ( 0x8086, 0x0cf8, "x710-n3000", "X710 FPGA N3000", 0 ),
        PCI_ROM ( 0x8086, 0x0d58, "xxv710-n3000", "XXV710 FPGA N3000", 0 ),
        PCI_ROM ( 0x8086, 0x104e, "x710-sfp-b", "X710 10GbE SFP+", 0 ),
        PCI_ROM ( 0x8086, 0x104f, "x710-kx-b", "X710 10GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1572, "x710-sfp", "X710 10GbE SFP+", 0 ),
        PCI_ROM ( 0x8086, 0x1574, "xl710-qemu", "Virtual XL710", 0 ),
        PCI_ROM ( 0x8086, 0x1580, "xl710-kx-b", "XL710 40GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1581, "xl710-kx-c", "XL710 10GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1583, "xl710-qda2", "XL710 40GbE QSFP+", 0 ),
        PCI_ROM ( 0x8086, 0x1584, "xl710-qda1", "XL710 40GbE QSFP+", 0 ),
        PCI_ROM ( 0x8086, 0x1585, "x710-qsfp", "X710 10GbE QSFP+", 0 ),
        PCI_ROM ( 0x8086, 0x1586, "x710-10gt", "X710 10GBASE-T", 0 ),
        PCI_ROM ( 0x8086, 0x1587, "x710-kr2", "XL710 20GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1588, "x710-kr2-a", "XL710 20GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1589, "x710-10gt4", "X710 10GBASE-T4", 0 ),
        PCI_ROM ( 0x8086, 0x158a, "xxv710", "XXV710 25GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x158b, "xxv710-sfp28", "XXV710 25GbE SFP28", 0 ),
        PCI_ROM ( 0x8086, 0x15ff, "x710-10gt-b", "X710 10GBASE-T", 0 ),
        PCI_ROM ( 0x8086, 0x37ce, "x722-kx", "X722 10GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x37cf, "x722-qsfp", "X722 10GbE QSFP+", 0 ),
        PCI_ROM ( 0x8086, 0x37d0, "x722-sfp", "X722 10GbE SFP+", 0 ),
        PCI_ROM ( 0x8086, 0x37d1, "x722-1gt", "X722 1GBASE-T", 0 ),
        PCI_ROM ( 0x8086, 0x37d2, "x722-10gt", "X722 10GBASE-T", 0 ),
        PCI_ROM ( 0x8086, 0x37d3, "x722-sfp-i", "X722 10GbE SFP+", 0 ),
}

PCI device IDs.

Definition at line 1855 of file intelxl.c.

                                             {
        PCI_ROM ( 0x8086, 0x0cf8, "x710-n3000", "X710 FPGA N3000", 0 ),
        PCI_ROM ( 0x8086, 0x0d58, "xxv710-n3000", "XXV710 FPGA N3000", 0 ),
        PCI_ROM ( 0x8086, 0x104e, "x710-sfp-b", "X710 10GbE SFP+", 0 ),
        PCI_ROM ( 0x8086, 0x104f, "x710-kx-b", "X710 10GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1572, "x710-sfp", "X710 10GbE SFP+", 0 ),
        PCI_ROM ( 0x8086, 0x1574, "xl710-qemu", "Virtual XL710", 0 ),
        PCI_ROM ( 0x8086, 0x1580, "xl710-kx-b", "XL710 40GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1581, "xl710-kx-c", "XL710 10GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1583, "xl710-qda2", "XL710 40GbE QSFP+", 0 ),
        PCI_ROM ( 0x8086, 0x1584, "xl710-qda1", "XL710 40GbE QSFP+", 0 ),
        PCI_ROM ( 0x8086, 0x1585, "x710-qsfp", "X710 10GbE QSFP+", 0 ),
        PCI_ROM ( 0x8086, 0x1586, "x710-10gt", "X710 10GBASE-T", 0 ),
        PCI_ROM ( 0x8086, 0x1587, "x710-kr2", "XL710 20GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1588, "x710-kr2-a", "XL710 20GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x1589, "x710-10gt4", "X710 10GBASE-T4", 0 ),
        PCI_ROM ( 0x8086, 0x158a, "xxv710", "XXV710 25GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x158b, "xxv710-sfp28", "XXV710 25GbE SFP28", 0 ),
        PCI_ROM ( 0x8086, 0x15ff, "x710-10gt-b", "X710 10GBASE-T", 0 ),
        PCI_ROM ( 0x8086, 0x37ce, "x722-kx", "X722 10GbE backplane", 0 ),
        PCI_ROM ( 0x8086, 0x37cf, "x722-qsfp", "X722 10GbE QSFP+", 0 ),
        PCI_ROM ( 0x8086, 0x37d0, "x722-sfp", "X722 10GbE SFP+", 0 ),
        PCI_ROM ( 0x8086, 0x37d1, "x722-1gt", "X722 1GBASE-T", 0 ),
        PCI_ROM ( 0x8086, 0x37d2, "x722-10gt", "X722 10GBASE-T", 0 ),
        PCI_ROM ( 0x8086, 0x37d3, "x722-sfp-i", "X722 10GbE SFP+", 0 ),
};

__pci_driver

struct pci_driver intelxl_driver __pci_driver

Initial value:

= {
        .ids = intelxl_nics,
        .id_count = ( sizeof ( intelxl_nics ) / sizeof ( intelxl_nics[0] ) ),
        .probe = intelxl_probe,
        .remove = intelxl_remove,
}

PCI driver.

Definition at line 1883 of file intelxl.c.

                                                {
        .ids = intelxl_nics,
        .id_count = ( sizeof ( intelxl_nics ) / sizeof ( intelxl_nics[0] ) ),
        .probe = intelxl_probe,
        .remove = intelxl_remove,
};