iPXE
Macros | Functions | Variables
ath5k.c File Reference
#include <stdlib.h>
#include <ipxe/malloc.h>
#include <ipxe/timer.h>
#include <ipxe/netdevice.h>
#include <ipxe/pci.h>
#include <ipxe/pci_io.h>
#include "base.h"
#include "reg.h"

Go to the source code of this file.

Macros

#define ATH5K_CALIB_INTERVAL   10 /* Calibrate PHY every 10 seconds */
 
#define ATH5K_RETRIES   4 /* Number of times to retry packet sends */
 
#define ATH5K_DESC_ALIGN   16 /* Alignment for TX/RX descriptors */
 
#define ATH5K_SPMBL_NO   1
 
#define ATH5K_SPMBL_YES   2
 
#define ATH5K_SPMBL_BOTH   3
 
#define ATH5K_NR_RATES   15
 

Functions

 FILE_LICENCE (BSD3)
 
 FILE_SECBOOT (FORBIDDEN)
 
static int ath5k_probe (struct pci_device *pdev)
 
static void ath5k_remove (struct pci_device *pdev)
 
static int ath5k_tx (struct net80211_device *dev, struct io_buffer *skb)
 
static int ath5k_reset (struct ath5k_softc *sc, struct net80211_channel *chan)
 
static int ath5k_reset_wake (struct ath5k_softc *sc)
 
static int ath5k_start (struct net80211_device *dev)
 
static void ath5k_stop (struct net80211_device *dev)
 
static int ath5k_config (struct net80211_device *dev, int changed)
 
static void ath5k_poll (struct net80211_device *dev)
 
static void ath5k_irq (struct net80211_device *dev, int enable)
 
static int ath5k_attach (struct net80211_device *dev)
 
static void ath5k_detach (struct net80211_device *dev)
 
static unsigned int ath5k_copy_channels (struct ath5k_hw *ah, struct net80211_channel *channels, unsigned int mode, unsigned int max)
 
static int ath5k_setup_bands (struct net80211_device *dev)
 
static int ath5k_chan_set (struct ath5k_softc *sc, struct net80211_channel *chan)
 
static void ath5k_setcurmode (struct ath5k_softc *sc, unsigned int mode)
 
static void ath5k_mode_setup (struct ath5k_softc *sc)
 
static int ath5k_desc_alloc (struct ath5k_softc *sc)
 
static void ath5k_desc_free (struct ath5k_softc *sc)
 
static int ath5k_rxbuf_setup (struct ath5k_softc *sc, struct ath5k_buf *bf)
 
static int ath5k_txbuf_setup (struct ath5k_softc *sc, struct ath5k_buf *bf)
 
static void ath5k_txbuf_free (struct ath5k_softc *sc, struct ath5k_buf *bf)
 
static void ath5k_rxbuf_free (struct ath5k_softc *sc __unused, struct ath5k_buf *bf)
 
static int ath5k_txq_setup (struct ath5k_softc *sc, int qtype, int subtype)
 
static void ath5k_txq_drainq (struct ath5k_softc *sc, struct ath5k_txq *txq)
 
static void ath5k_txq_cleanup (struct ath5k_softc *sc)
 
static void ath5k_txq_release (struct ath5k_softc *sc)
 
static int ath5k_rx_start (struct ath5k_softc *sc)
 
static void ath5k_rx_stop (struct ath5k_softc *sc)
 
static void ath5k_tx_processq (struct ath5k_softc *sc, struct ath5k_txq *txq)
 
static int ath5k_init (struct ath5k_softc *sc)
 
static int ath5k_stop_hw (struct ath5k_softc *sc)
 
static void ath5k_calibrate (struct ath5k_softc *sc)
 
static void ath5k_configure_filter (struct ath5k_softc *sc)
 
static short ath5k_ieee2mhz (short chan)
 
static int ath5k_hw_rix_to_bitrate (int hw_rix)
 
int ath5k_bitrate_to_hw_rix (int bitrate)
 
static struct io_buffer * ath5k_rx_iob_alloc (struct ath5k_softc *sc, u32 *iob_addr)
 
static void ath5k_handle_rx (struct ath5k_softc *sc)
 
static void ath5k_handle_tx (struct ath5k_softc *sc)
 

Variables

static struct pci_device_id ath5k_nics []
 
struct {
   u16   bitrate
 
   u8   short_pmbl
 
   u8   hw_code
 
} ath5k_rates []
 
struct pci_driver ath5k_pci_driver __pci_driver
 
static struct net80211_device_operations ath5k_ops
 

Macro Definition Documentation

◆ ATH5K_CALIB_INTERVAL

#define ATH5K_CALIB_INTERVAL   10 /* Calibrate PHY every 10 seconds */

Definition at line 59 of file ath5k.c.

◆ ATH5K_RETRIES

#define ATH5K_RETRIES   4 /* Number of times to retry packet sends */

Definition at line 60 of file ath5k.c.

◆ ATH5K_DESC_ALIGN

#define ATH5K_DESC_ALIGN   16 /* Alignment for TX/RX descriptors */

Definition at line 61 of file ath5k.c.

◆ ATH5K_SPMBL_NO

#define ATH5K_SPMBL_NO   1

Definition at line 89 of file ath5k.c.

◆ ATH5K_SPMBL_YES

#define ATH5K_SPMBL_YES   2

Definition at line 90 of file ath5k.c.

◆ ATH5K_SPMBL_BOTH

#define ATH5K_SPMBL_BOTH   3

Definition at line 91 of file ath5k.c.

◆ ATH5K_NR_RATES

#define ATH5K_NR_RATES   15

Definition at line 116 of file ath5k.c.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( BSD3  )

◆ FILE_SECBOOT()

FILE_SECBOOT ( FORBIDDEN  )

◆ ath5k_probe()

static int ath5k_probe ( struct pci_device *  pdev)
static

Definition at line 247 of file ath5k.c.

248 {
249  void *mem;
250  struct ath5k_softc *sc;
251  struct net80211_device *dev;
252  int ret;
253  u8 csz;
254 
255  adjust_pci_device(pdev);
256 
257  /*
258  * Cache line size is used to size and align various
259  * structures used to communicate with the hardware.
260  */
261  pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
262  if (csz == 0) {
263  /*
264  * We must have this setup properly for rx buffer
265  * DMA to work so force a reasonable value here if it
266  * comes up zero.
267  */
268  csz = 16;
269  pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
270  }
271  /*
272  * The default setting of latency timer yields poor results,
273  * set it to the value used by other systems. It may be worth
274  * tweaking this setting more.
275  */
276  pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
277 
278  /*
279  * Disable the RETRY_TIMEOUT register (0x41) to keep
280  * PCI Tx retries from interfering with C3 CPU state.
281  */
282  pci_write_config_byte(pdev, 0x41, 0);
283 
284  mem = pci_ioremap(pdev, pdev->membase, 0x10000);
285  if (!mem) {
286  DBG("ath5k: cannot remap PCI memory region\n");
287  ret = -EIO;
288  goto err;
289  }
290 
291  /*
292  * Allocate dev (net80211 main struct)
293  * and dev->priv (driver private data)
294  */
295  dev = net80211_alloc(sizeof(*sc));
296  if (!dev) {
297  DBG("ath5k: cannot allocate 802.11 device\n");
298  ret = -ENOMEM;
299  goto err_map;
300  }
301 
302  /* Initialize driver private data */
303  sc = dev->priv;
304  sc->dev = dev;
305  sc->pdev = pdev;
306 
307  sc->hwinfo = zalloc(sizeof(*sc->hwinfo));
308  if (!sc->hwinfo) {
309  DBG("ath5k: cannot allocate 802.11 hardware info structure\n");
310  ret = -ENOMEM;
311  goto err_free;
312  }
313 
314  sc->hwinfo->flags = NET80211_HW_RX_HAS_FCS;
315  sc->hwinfo->signal_type = NET80211_SIGNAL_DB;
316  sc->hwinfo->signal_max = 40; /* 35dB should give perfect 54Mbps */
317  sc->hwinfo->channel_change_time = 5000;
318 
319  /* Avoid working with the device until setup is complete */
320  sc->status |= ATH_STAT_INVALID;
321 
322  sc->iobase = mem;
323  sc->cachelsz = csz * 4; /* convert to bytes */
324 
325  DBG("ath5k: register base at %p (%08lx)\n", sc->iobase, pdev->membase);
326  DBG("ath5k: cache line size %d\n", sc->cachelsz);
327 
328  /* Set private data */
329  pci_set_drvdata(pdev, dev);
330  dev->netdev->dev = (struct device *)pdev;
331 
332  /* Initialize device */
333  ret = ath5k_hw_attach(sc, pdev->id->driver_data, &sc->ah);
334  if (ret)
335  goto err_free_hwinfo;
336 
337  /* Finish private driver data initialization */
338  ret = ath5k_attach(dev);
339  if (ret)
340  goto err_ah;
341 
342 #if DBGLVL_MAX
343  DBG("Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n",
344  ath5k_chip_name(AR5K_VERSION_MAC, sc->ah->ah_mac_srev),
345  sc->ah->ah_mac_srev, sc->ah->ah_phy_revision);
346 
347  if (!sc->ah->ah_single_chip) {
348  /* Single chip radio (!RF5111) */
349  if (sc->ah->ah_radio_5ghz_revision &&
350  !sc->ah->ah_radio_2ghz_revision) {
351  /* No 5GHz support -> report 2GHz radio */
352  if (!(sc->ah->ah_capabilities.cap_mode & AR5K_MODE_BIT_11A)) {
353  DBG("RF%s 2GHz radio found (0x%x)\n",
354  ath5k_chip_name(AR5K_VERSION_RAD,
355  sc->ah->ah_radio_5ghz_revision),
356  sc->ah->ah_radio_5ghz_revision);
357  /* No 2GHz support (5110 and some
358  * 5Ghz only cards) -> report 5Ghz radio */
359  } else if (!(sc->ah->ah_capabilities.cap_mode & AR5K_MODE_BIT_11B)) {
360  DBG("RF%s 5GHz radio found (0x%x)\n",
361  ath5k_chip_name(AR5K_VERSION_RAD,
362  sc->ah->ah_radio_5ghz_revision),
363  sc->ah->ah_radio_5ghz_revision);
364  /* Multiband radio */
365  } else {
366  DBG("RF%s multiband radio found (0x%x)\n",
367  ath5k_chip_name(AR5K_VERSION_RAD,
368  sc->ah->ah_radio_5ghz_revision),
369  sc->ah->ah_radio_5ghz_revision);
370  }
371  }
372  /* Multi chip radio (RF5111 - RF2111) ->
373  * report both 2GHz/5GHz radios */
374  else if (sc->ah->ah_radio_5ghz_revision &&
375  sc->ah->ah_radio_2ghz_revision) {
376  DBG("RF%s 5GHz radio found (0x%x)\n",
377  ath5k_chip_name(AR5K_VERSION_RAD,
378  sc->ah->ah_radio_5ghz_revision),
379  sc->ah->ah_radio_5ghz_revision);
380  DBG("RF%s 2GHz radio found (0x%x)\n",
381  ath5k_chip_name(AR5K_VERSION_RAD,
382  sc->ah->ah_radio_2ghz_revision),
383  sc->ah->ah_radio_2ghz_revision);
384  }
385  }
386 #endif
387 
388  /* Ready to go */
389  sc->status &= ~ATH_STAT_INVALID;
390 
391  return 0;
392 err_ah:
393  ath5k_hw_detach(sc->ah);
394 err_free_hwinfo:
395  free(sc->hwinfo);
396 err_free:
397  net80211_free(dev);
398 err_map:
399  iounmap(mem);
400 err:
401  return ret;
402 }
ath5k_hw::ah_capabilities
struct ath5k_capabilities ah_capabilities
Definition: ath5k.h:1009
pci_device::membase
unsigned long membase
Memory base.
Definition: pci.h:220
PCI_CACHE_LINE_SIZE
#define PCI_CACHE_LINE_SIZE
PCI cache line size.
Definition: pci.h:48
net80211_free
void net80211_free(struct net80211_device *dev)
Free 802.11 device.
Definition: net80211.c:839
PCI_LATENCY_TIMER
#define PCI_LATENCY_TIMER
PCI latency timer.
Definition: pci.h:51
net80211_hw_info::flags
enum net80211_hw_info::@641 flags
A set of flags indicating peculiarities of this device.
ATH_STAT_INVALID
#define ATH_STAT_INVALID
Definition: base.h:105
pci_device_id::driver_data
unsigned long driver_data
Arbitrary driver data.
Definition: pci.h:183
net80211_hw_info::signal_max
unsigned signal_max
Maximum signal in arbitrary cases.
Definition: net80211.h:495
ath5k_hw::ah_phy_revision
u16 ah_phy_revision
Definition: ath5k.h:972
adjust_pci_device
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:241
ath5k_hw::ah_radio_5ghz_revision
u16 ah_radio_5ghz_revision
Definition: ath5k.h:973
ath5k_softc
Definition: base.h:89
ath5k_capabilities::cap_mode
u16 cap_mode
Definition: ath5k.h:917
pci_set_drvdata
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:366
ENOMEM
#define ENOMEM
Not enough space.
Definition: errno.h:535
device
A hardware device.
Definition: device.h:77
net80211_hw_info::signal_type
enum net80211_hw_info::@642 signal_type
Signal strength information that can be provided by the device.
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
net80211_alloc
struct net80211_device * net80211_alloc(size_t priv_size)
Allocate 802.11 device.
Definition: net80211.c:755
free
static void(* free)(struct refcnt *refcnt))
Definition: refcnt.h:55
pci_write_config_byte
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
zalloc
void * zalloc(size_t size)
Allocate cleared memory.
Definition: malloc.c:662
net80211_device
Structure encapsulating the complete state of an 802.11 device.
Definition: net80211.h:786
ath5k_hw::ah_single_chip
int ah_single_chip
Definition: ath5k.h:966
ath5k_hw::ah_radio_2ghz_revision
u16 ah_radio_2ghz_revision
Definition: ath5k.h:974
net_device::dev
struct device * dev
Underlying hardware device.
Definition: netdevice.h:365
ath5k_hw_attach
int ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version, struct ath5k_hw **ah)
ath5k_hw_attach - Check if hw is supported and init the needed structs
Definition: ath5k_attach.c:113
ath5k_softc::pdev
struct pci_device * pdev
Definition: base.h:90
net80211_device::netdev
struct net_device * netdev
The net_device that wraps us.
Definition: net80211.h:789
ath5k_softc::status
int status
Definition: base.h:104
ath5k_softc::hwinfo
struct net80211_hw_info * hwinfo
Definition: base.h:94
ath5k_softc::cachelsz
u16 cachelsz
Definition: base.h:102
ath5k_softc::iobase
void * iobase
Definition: base.h:91
EIO
#define EIO
Input/output error.
Definition: errno.h:434
pci_device::id
struct pci_device_id * id
Driver device ID.
Definition: pci.h:248
iounmap
void iounmap(volatile const void *io_addr)
Unmap I/O address.
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
ath5k_hw::ah_mac_srev
u32 ah_mac_srev
Definition: ath5k.h:969
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
pci_ioremap
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
net80211_hw_info::channel_change_time
unsigned channel_change_time
Estimate of the time required to change channels, in microseconds.
Definition: net80211.h:518
ath5k_attach
static int ath5k_attach(struct net80211_device *dev)
Definition: ath5k.c:422
ath5k_hw_detach
void ath5k_hw_detach(struct ath5k_hw *ah)
ath5k_hw_detach - Free the ath5k_hw struct
Definition: ath5k_attach.c:336
u8
uint8_t u8
Definition: stdint.h:20
pci_read_config_byte
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References adjust_pci_device(), ath5k_softc::ah, ath5k_hw::ah_capabilities, ath5k_hw::ah_mac_srev, ath5k_hw::ah_phy_revision, ath5k_hw::ah_radio_2ghz_revision, ath5k_hw::ah_radio_5ghz_revision, ath5k_hw::ah_single_chip, AR5K_MODE_BIT_11A, AR5K_MODE_BIT_11B, AR5K_VERSION_MAC, AR5K_VERSION_RAD, ath5k_attach(), ath5k_hw_attach(), ath5k_hw_detach(), ATH_STAT_INVALID, ath5k_softc::cachelsz, ath5k_capabilities::cap_mode, net80211_hw_info::channel_change_time, DBG, ath5k_softc::dev, net_device::dev, pci_device_id::driver_data, EIO, ENOMEM, net80211_hw_info::flags, free, ath5k_softc::hwinfo, pci_device::id, ath5k_softc::iobase, iounmap(), pci_device::membase, net80211_alloc(), net80211_free(), net80211_device::netdev, PCI_CACHE_LINE_SIZE, pci_ioremap(), PCI_LATENCY_TIMER, pci_read_config_byte(), pci_set_drvdata(), pci_write_config_byte(), ath5k_softc::pdev, net80211_device::priv, net80211_hw_info::signal_max, net80211_hw_info::signal_type, ath5k_softc::status, and zalloc().

◆ ath5k_remove()

static void ath5k_remove ( struct pci_device *  pdev)
static

Definition at line 404 of file ath5k.c.

405 {
406  struct net80211_device *dev = pci_get_drvdata(pdev);
407  struct ath5k_softc *sc = dev->priv;
408 
409  ath5k_detach(dev);
410  ath5k_hw_detach(sc->ah);
411  iounmap(sc->iobase);
412  free(sc->hwinfo);
413  net80211_free(dev);
414 }
net80211_free
void net80211_free(struct net80211_device *dev)
Free 802.11 device.
Definition: net80211.c:839
ath5k_detach
static void ath5k_detach(struct net80211_device *dev)
Definition: ath5k.c:493
ath5k_softc
Definition: base.h:89
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
free
static void(* free)(struct refcnt *refcnt))
Definition: refcnt.h:55
net80211_device
Structure encapsulating the complete state of an 802.11 device.
Definition: net80211.h:786
pci_get_drvdata
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:376
ath5k_softc::hwinfo
struct net80211_hw_info * hwinfo
Definition: base.h:94
ath5k_softc::iobase
void * iobase
Definition: base.h:91
iounmap
void iounmap(volatile const void *io_addr)
Unmap I/O address.
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_hw_detach
void ath5k_hw_detach(struct ath5k_hw *ah)
ath5k_hw_detach - Free the ath5k_hw struct
Definition: ath5k_attach.c:336

References ath5k_softc::ah, ath5k_detach(), ath5k_hw_detach(), ath5k_softc::dev, free, ath5k_softc::hwinfo, ath5k_softc::iobase, iounmap(), net80211_free(), pci_get_drvdata(), and net80211_device::priv.

◆ ath5k_tx()

static int ath5k_tx ( struct net80211_device *  dev,
struct io_buffer *  skb 
)
static

Definition at line 1462 of file ath5k.c.

1463 {
1464  struct ath5k_softc *sc = dev->priv;
1465  struct ath5k_buf *bf;
1466  int rc;
1467 
1468  /*
1469  * The hardware expects the header padded to 4 byte boundaries.
1470  * iPXE only ever sends 24-byte headers, so no action necessary.
1471  */
1472 
1473  if (list_empty(&sc->txbuf)) {
1474  DBG("ath5k: dropping packet because no tx bufs available\n");
1475  return -ENOBUFS;
1476  }
1477 
1478  bf = list_entry(sc->txbuf.next, struct ath5k_buf, list);
1479  list_del(&bf->list);
1480  sc->txbuf_len--;
1481 
1482  bf->iob = iob;
1483 
1484  if ((rc = ath5k_txbuf_setup(sc, bf)) != 0) {
1485  bf->iob = NULL;
1486  list_add_tail(&bf->list, &sc->txbuf);
1487  sc->txbuf_len++;
1488  return rc;
1489  }
1490  return 0;
1491 }
rc
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
list_head::next
struct list_head * next
Next list entry.
Definition: list.h:21
ath5k_txbuf_setup
static int ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
Definition: ath5k.c:816
ath5k_softc
Definition: base.h:89
list_empty
#define list_empty(list)
Test whether a list is empty.
Definition: list.h:137
ath5k_softc::txbuf_len
unsigned int txbuf_len
Definition: base.h:124
list_del
#define list_del(list)
Delete an entry from a list.
Definition: list.h:120
ath5k_buf::iob
struct io_buffer * iob
Definition: base.h:61
list_add_tail
#define list_add_tail(new, head)
Add a new entry to the tail of a list.
Definition: list.h:94
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
ath5k_buf::list
struct list_head list
Definition: base.h:57
ath5k_buf
Definition: base.h:56
ENOBUFS
#define ENOBUFS
No buffer space available.
Definition: errno.h:499
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
list_entry
#define list_entry(list, type, member)
Get the container of a list entry.
Definition: list.h:322
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::txbuf
struct list_head txbuf
Definition: base.h:123

References ath5k_txbuf_setup(), DBG, ath5k_softc::dev, ENOBUFS, ath5k_buf::iob, ath5k_buf::list, list_add_tail, list_del, list_empty, list_entry, list_head::next, NULL, net80211_device::priv, rc, ath5k_softc::txbuf, and ath5k_softc::txbuf_len.

◆ ath5k_reset()

static int ath5k_reset ( struct ath5k_softc *  sc,
struct net80211_channel *  chan 
)
static

Definition at line 1498 of file ath5k.c.

1499 {
1500  struct ath5k_hw *ah = sc->ah;
1501  int ret;
1502 
1503  if (chan) {
1504  ath5k_hw_set_imr(ah, 0);
1505  ath5k_txq_cleanup(sc);
1506  ath5k_rx_stop(sc);
1507 
1508  sc->curchan = chan;
1509  sc->curband = chan->band;
1510  }
1511 
1512  ret = ath5k_hw_reset(ah, sc->curchan, 1);
1513  if (ret) {
1514  DBG("ath5k: can't reset hardware: %s\n", strerror(ret));
1515  return ret;
1516  }
1517 
1518  ret = ath5k_rx_start(sc);
1519  if (ret) {
1520  DBG("ath5k: can't start rx logic: %s\n", strerror(ret));
1521  return ret;
1522  }
1523 
1524  /*
1525  * Change channels and update the h/w rate map if we're switching;
1526  * e.g. 11a to 11b/g.
1527  *
1528  * We may be doing a reset in response to an ioctl that changes the
1529  * channel so update any state that might change as a result.
1530  *
1531  * XXX needed?
1532  */
1533 /* ath5k_chan_change(sc, c); */
1534 
1535  /* Reenable interrupts if necessary */
1536  ath5k_irq(sc->dev, sc->irq_ena);
1537 
1538  return 0;
1539 }
ath5k_txq_cleanup
static void ath5k_txq_cleanup(struct ath5k_softc *sc)
Definition: ath5k.c:1012
ath5k_softc::irq_ena
int irq_ena
Definition: base.h:96
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_softc::curband
int curband
Definition: base.h:95
ath5k_rx_start
static int ath5k_rx_start(struct ath5k_softc *sc)
Definition: ath5k.c:1051
ath5k_hw_reset
int ath5k_hw_reset(struct ath5k_hw *ah, struct net80211_channel *channel, int change_channel)
Definition: ath5k_reset.c:691
strerror
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:79
net80211_channel::band
u8 band
The band with which this channel is associated.
Definition: net80211.h:388
ath5k_hw_set_imr
enum ath5k_int ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask)
ath5k_hw_set_imr - Set interrupt mask
Definition: ath5k_dma.c:549
ath5k_softc::curchan
struct net80211_channel * curchan
Definition: base.h:113
ah
uint8_t ah
Definition: registers.h:85
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
ath5k_irq
static void ath5k_irq(struct net80211_device *dev, int enable)
Definition: ath5k.c:1282
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_rx_stop
static void ath5k_rx_stop(struct ath5k_softc *sc)
Definition: ath5k.c:1083

References ah, ath5k_softc::ah, ath5k_hw_reset(), ath5k_hw_set_imr(), ath5k_irq(), ath5k_rx_start(), ath5k_rx_stop(), ath5k_txq_cleanup(), net80211_channel::band, ath5k_softc::curband, ath5k_softc::curchan, DBG, ath5k_softc::dev, ath5k_softc::irq_ena, and strerror().

Referenced by ath5k_chan_set(), ath5k_init(), and ath5k_reset_wake().

◆ ath5k_reset_wake()

static int ath5k_reset_wake ( struct ath5k_softc *  sc)
static

Definition at line 1541 of file ath5k.c.

1542 {
1543  return ath5k_reset(sc, sc->curchan);
1544 }
ath5k_reset
static int ath5k_reset(struct ath5k_softc *sc, struct net80211_channel *chan)
Definition: ath5k.c:1498
ath5k_softc::curchan
struct net80211_channel * curchan
Definition: base.h:113

References ath5k_reset(), and ath5k_softc::curchan.

Referenced by ath5k_calibrate(), and ath5k_poll().

◆ ath5k_start()

static int ath5k_start ( struct net80211_device *  dev)
static

Definition at line 1546 of file ath5k.c.

1547 {
1548  struct ath5k_softc *sc = dev->priv;
1549  int ret;
1550 
1551  if ((ret = ath5k_init(sc)) != 0)
1552  return ret;
1553 
1554  sc->assoc = 0;
1555  ath5k_configure_filter(sc);
1556  ath5k_hw_set_lladdr(sc->ah, dev->netdev->ll_addr);
1557 
1558  return 0;
1559 }
ath5k_hw_set_lladdr
int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac)
ath5k_hw_set_lladdr - Set station id
Definition: ath5k_pcu.c:201
ath5k_softc::assoc
int assoc
Definition: base.h:135
ath5k_softc
Definition: base.h:89
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
net80211_device::netdev
struct net_device * netdev
The net_device that wraps us.
Definition: net80211.h:789
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
ath5k_init
static int ath5k_init(struct ath5k_softc *sc)
Definition: ath5k.c:1295
net_device::ll_addr
uint8_t ll_addr[MAX_LL_ADDR_LEN]
Link-layer address.
Definition: netdevice.h:388
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_configure_filter
static void ath5k_configure_filter(struct ath5k_softc *sc)
Definition: ath5k.c:1637

References ath5k_softc::ah, ath5k_softc::assoc, ath5k_configure_filter(), ath5k_hw_set_lladdr(), ath5k_init(), ath5k_softc::dev, net_device::ll_addr, net80211_device::netdev, and net80211_device::priv.

◆ ath5k_stop()

static void ath5k_stop ( struct net80211_device *  dev)
static

Definition at line 1561 of file ath5k.c.

1562 {
1563  struct ath5k_softc *sc = dev->priv;
1564  u8 mac[ETH_ALEN] = {};
1565 
1566  ath5k_hw_set_lladdr(sc->ah, mac);
1567 
1568  ath5k_stop_hw(sc);
1569 }
ath5k_hw_set_lladdr
int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac)
ath5k_hw_set_lladdr - Set station id
Definition: ath5k_pcu.c:201
mac
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:24
ath5k_softc
Definition: base.h:89
ath5k_stop_hw
static int ath5k_stop_hw(struct ath5k_softc *sc)
Definition: ath5k.c:1341
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
ETH_ALEN
#define ETH_ALEN
Definition: if_ether.h:9
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
u8
uint8_t u8
Definition: stdint.h:20

References ath5k_softc::ah, ath5k_hw_set_lladdr(), ath5k_stop_hw(), ath5k_softc::dev, ETH_ALEN, mac, and net80211_device::priv.

◆ ath5k_config()

static int ath5k_config ( struct net80211_device *  dev,
int  changed 
)
static

Definition at line 1572 of file ath5k.c.

1573 {
1574  struct ath5k_softc *sc = dev->priv;
1575  struct ath5k_hw *ah = sc->ah;
1576  struct net80211_channel *chan = &dev->channels[dev->channel];
1577  int ret;
1578 
1579  if (changed & NET80211_CFG_CHANNEL) {
1580  sc->power_level = chan->maxpower;
1581  if ((ret = ath5k_chan_set(sc, chan)) != 0)
1582  return ret;
1583  }
1584 
1585  if ((changed & NET80211_CFG_RATE) ||
1586  (changed & NET80211_CFG_PHY_PARAMS)) {
1587  int spmbl = ATH5K_SPMBL_NO;
1588  u16 rate = dev->rates[dev->rate];
1589  u16 slowrate = dev->rates[dev->rtscts_rate];
1590  int i;
1591 
1592  if (dev->phy_flags & NET80211_PHY_USE_SHORT_PREAMBLE)
1593  spmbl = ATH5K_SPMBL_YES;
1594 
1595  for (i = 0; i < ATH5K_NR_RATES; i++) {
1596  if (ath5k_rates[i].bitrate == rate &&
1597  (ath5k_rates[i].short_pmbl & spmbl))
1598  sc->hw_rate = ath5k_rates[i].hw_code;
1599 
1600  if (ath5k_rates[i].bitrate == slowrate &&
1601  (ath5k_rates[i].short_pmbl & spmbl))
1602  sc->hw_rtscts_rate = ath5k_rates[i].hw_code;
1603  }
1604  }
1605 
1606  if (changed & NET80211_CFG_ASSOC) {
1607  sc->assoc = !!(dev->state & NET80211_ASSOCIATED);
1608  if (sc->assoc) {
1609  memcpy(ah->ah_bssid, dev->bssid, ETH_ALEN);
1610  } else {
1611  memset(ah->ah_bssid, 0xff, ETH_ALEN);
1612  }
1613  ath5k_hw_set_associd(ah, ah->ah_bssid, 0);
1614  }
1615 
1616  return 0;
1617 }
u16
uint16_t u16
Definition: stdint.h:22
net80211_device::channel
u8 channel
The channel currently in use, as an index into the channels array.
Definition: net80211.h:812
net80211_device::rtscts_rate
u8 rtscts_rate
The rate to use for RTS/CTS transmissions.
Definition: net80211.h:831
ATH5K_NR_RATES
#define ATH5K_NR_RATES
Definition: ath5k.c:116
ath5k_softc::assoc
int assoc
Definition: base.h:135
ath5k_hw_set_associd
void ath5k_hw_set_associd(struct ath5k_hw *ah, const u8 *bssid, u16 assoc_id)
ath5k_hw_set_associd - Set BSSID for association
Definition: ath5k_pcu.c:229
ath5k_softc
Definition: base.h:89
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_chan_set
static int ath5k_chan_set(struct ath5k_softc *sc, struct net80211_channel *chan)
Definition: ath5k.c:656
memcpy
void * memcpy(void *dest, const void *src, size_t len) __nonnull
net80211_channel::maxpower
u8 maxpower
Maximum allowable transmit power, in dBm.
Definition: net80211.h:425
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
NET80211_PHY_USE_SHORT_PREAMBLE
#define NET80211_PHY_USE_SHORT_PREAMBLE
Whether to use 802.11b short preamble operation.
Definition: net80211.h:260
ath5k_rates
static const struct @10 ath5k_rates[]
NET80211_CFG_PHY_PARAMS
#define NET80211_CFG_PHY_PARAMS
Low-level link parameters (short preamble, protection, etc) have changed.
Definition: net80211.h:90
NET80211_ASSOCIATED
#define NET80211_ASSOCIATED
Whether we have successfully associated with the network.
Definition: net80211.h:201
net80211_channel
An 802.11 RF channel.
Definition: net80211.h:385
ATH5K_SPMBL_YES
#define ATH5K_SPMBL_YES
Definition: ath5k.c:90
ATH5K_SPMBL_NO
#define ATH5K_SPMBL_NO
Definition: ath5k.c:89
ETH_ALEN
#define ETH_ALEN
Definition: if_ether.h:9
net80211_device::rates
u16 rates[NET80211_MAX_RATES]
A list of all possible TX rates we might use.
Definition: net80211.h:818
net80211_device::phy_flags
int phy_flags
Physical layer options.
Definition: net80211.h:983
bitrate
u16 bitrate
Definition: ath5k.c:94
net80211_device::channels
struct net80211_channel channels[NET80211_MAX_CHANNELS]
A list of all possible channels we might use.
Definition: net80211.h:806
ath5k_softc::power_level
int power_level
Definition: base.h:134
NET80211_CFG_RATE
#define NET80211_CFG_RATE
Requested transmission rate (dev->rate) has changed.
Definition: net80211.h:84
ah
uint8_t ah
Definition: registers.h:85
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
short_pmbl
u8 short_pmbl
Definition: ath5k.c:95
NET80211_CFG_CHANNEL
#define NET80211_CFG_CHANNEL
Channel choice (dev->channel) or regulatory parameters have changed.
Definition: net80211.h:81
net80211_device::bssid
u8 bssid[ETH_ALEN]
MAC address of the access point most recently associated.
Definition: net80211.h:954
ath5k_softc::hw_rtscts_rate
int hw_rtscts_rate
Definition: base.h:138
net80211_device::state
u16 state
State of our association to the network.
Definition: net80211.h:921
ath5k_softc::hw_rate
int hw_rate
Definition: base.h:137
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
NET80211_CFG_ASSOC
#define NET80211_CFG_ASSOC
Association has been established with a new BSS (dev->bssid)
Definition: net80211.h:87
net80211_device::rate
u8 rate
The rate currently in use, as an index into the rates array.
Definition: net80211.h:824
memset
void * memset(void *dest, int character, size_t len) __nonnull

References ah, ath5k_softc::ah, ath5k_softc::assoc, ath5k_chan_set(), ath5k_hw_set_associd(), ATH5K_NR_RATES, ath5k_rates, ATH5K_SPMBL_NO, ATH5K_SPMBL_YES, bitrate, net80211_device::bssid, net80211_device::channel, net80211_device::channels, ath5k_softc::dev, ETH_ALEN, ath5k_softc::hw_rate, ath5k_softc::hw_rtscts_rate, net80211_channel::maxpower, memcpy(), memset(), NET80211_ASSOCIATED, NET80211_CFG_ASSOC, NET80211_CFG_CHANNEL, NET80211_CFG_PHY_PARAMS, NET80211_CFG_RATE, NET80211_PHY_USE_SHORT_PREAMBLE, net80211_device::phy_flags, ath5k_softc::power_level, net80211_device::priv, net80211_device::rate, net80211_device::rates, net80211_device::rtscts_rate, short_pmbl, and net80211_device::state.

◆ ath5k_poll()

static void ath5k_poll ( struct net80211_device *  dev)
static

Definition at line 1377 of file ath5k.c.

1378 {
1379  struct ath5k_softc *sc = dev->priv;
1380  struct ath5k_hw *ah = sc->ah;
1381  enum ath5k_int status;
1382  unsigned int counter = 1000;
1383 
1384  if (currticks() - sc->last_calib_ticks >
1385  ATH5K_CALIB_INTERVAL * TICKS_PER_SEC) {
1386  ath5k_calibrate(sc);
1387  sc->last_calib_ticks = currticks();
1388  }
1389 
1390  if ((sc->status & ATH_STAT_INVALID) ||
1391  (sc->irq_ena && !ath5k_hw_is_intr_pending(ah)))
1392  return;
1393 
1394  do {
1395  ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */
1396  DBGP("ath5k: status %#x/%#x\n", status, sc->imask);
1397  if (status & AR5K_INT_FATAL) {
1398  /*
1399  * Fatal errors are unrecoverable.
1400  * Typically these are caused by DMA errors.
1401  */
1402  DBG("ath5k: fatal error, resetting\n");
1403  ath5k_reset_wake(sc);
1404  } else if (status & AR5K_INT_RXORN) {
1405  DBG("ath5k: rx overrun, resetting\n");
1406  ath5k_reset_wake(sc);
1407  } else {
1408  if (status & AR5K_INT_RXEOL) {
1409  /*
1410  * NB: the hardware should re-read the link when
1411  * RXE bit is written, but it doesn't work at
1412  * least on older hardware revs.
1413  */
1414  DBG("ath5k: rx EOL\n");
1415  sc->rxlink = NULL;
1416  }
1417  if (status & AR5K_INT_TXURN) {
1418  /* bump tx trigger level */
1419  DBG("ath5k: tx underrun\n");
1420  ath5k_hw_update_tx_triglevel(ah, 1);
1421  }
1422  if (status & (AR5K_INT_RXOK | AR5K_INT_RXERR))
1423  ath5k_handle_rx(sc);
1424  if (status & (AR5K_INT_TXOK | AR5K_INT_TXDESC
1425  | AR5K_INT_TXERR | AR5K_INT_TXEOL))
1426  ath5k_handle_tx(sc);
1427  }
1428  } while (ath5k_hw_is_intr_pending(ah) && counter-- > 0);
1429 
1430  if (!counter)
1431  DBG("ath5k: too many interrupts, giving up for now\n");
1432 }
TICKS_PER_SEC
#define TICKS_PER_SEC
Number of ticks per second.
Definition: timer.h:16
ATH5K_CALIB_INTERVAL
#define ATH5K_CALIB_INTERVAL
Definition: ath5k.c:59
ATH_STAT_INVALID
#define ATH_STAT_INVALID
Definition: base.h:105
ath5k_handle_tx
static void ath5k_handle_tx(struct ath5k_softc *sc)
Definition: ath5k.c:1271
ath5k_reset_wake
static int ath5k_reset_wake(struct ath5k_softc *sc)
Definition: ath5k.c:1541
ath5k_softc::irq_ena
int irq_ena
Definition: base.h:96
ath5k_softc
Definition: base.h:89
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
DBGP
#define DBGP(...)
Definition: compiler.h:532
ath5k_hw_is_intr_pending
int ath5k_hw_is_intr_pending(struct ath5k_hw *ah)
ath5k_hw_is_intr_pending - Check if we have pending interrupts
Definition: ath5k_dma.c:392
ath5k_softc::imask
enum ath5k_int imask
Definition: base.h:115
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
ath5k_handle_rx
static void ath5k_handle_rx(struct ath5k_softc *sc)
Definition: ath5k.c:1095
status
uint8_t status
Status.
Definition: ena.h:16
ath5k_hw_get_isr
int ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask)
Definition: ath5k_dma.c:413
ath5k_softc::status
int status
Definition: base.h:104
ath5k_hw_update_tx_triglevel
int ath5k_hw_update_tx_triglevel(struct ath5k_hw *ah, int increase)
ath5k_hw_update_tx_triglevel - Update tx trigger level
Definition: ath5k_dma.c:340
ah
uint8_t ah
Definition: registers.h:85
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
currticks
unsigned long currticks(void)
Get current system time in ticks.
Definition: timer.c:43
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
ath5k_softc::last_calib_ticks
int last_calib_ticks
Definition: base.h:132
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_softc::rxlink
u32 * rxlink
Definition: base.h:121
ath5k_int
ath5k_int
enum ath5k_int - Hardware interrupt masks helpers
Definition: ath5k.h:806
ath5k_calibrate
static void ath5k_calibrate(struct ath5k_softc *sc)
Definition: ath5k.c:1439

References ah, ath5k_softc::ah, AR5K_INT_FATAL, AR5K_INT_RXEOL, AR5K_INT_RXERR, AR5K_INT_RXOK, AR5K_INT_RXORN, AR5K_INT_TXDESC, AR5K_INT_TXEOL, AR5K_INT_TXERR, AR5K_INT_TXOK, AR5K_INT_TXURN, ATH5K_CALIB_INTERVAL, ath5k_calibrate(), ath5k_handle_rx(), ath5k_handle_tx(), ath5k_hw_get_isr(), ath5k_hw_is_intr_pending(), ath5k_hw_update_tx_triglevel(), ath5k_reset_wake(), ATH_STAT_INVALID, currticks(), DBG, DBGP, ath5k_softc::dev, ath5k_softc::imask, ath5k_softc::irq_ena, ath5k_softc::last_calib_ticks, NULL, net80211_device::priv, ath5k_softc::rxlink, status, ath5k_softc::status, and TICKS_PER_SEC.

◆ ath5k_irq()

static void ath5k_irq ( struct net80211_device *  dev,
int  enable 
)
static

Definition at line 1282 of file ath5k.c.

1283 {
1284  struct ath5k_softc *sc = dev->priv;
1285  struct ath5k_hw *ah = sc->ah;
1286 
1287  sc->irq_ena = enable;
1288  ah->ah_ier = enable ? AR5K_IER_ENABLE : AR5K_IER_DISABLE;
1289 
1290  ath5k_hw_reg_write(ah, ah->ah_ier, AR5K_IER);
1291  ath5k_hw_set_imr(ah, sc->imask);
1292 }
ath5k_softc::irq_ena
int irq_ena
Definition: base.h:96
ath5k_softc
Definition: base.h:89
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_softc::imask
enum ath5k_int imask
Definition: base.h:115
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
ath5k_hw_set_imr
enum ath5k_int ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask)
ath5k_hw_set_imr - Set interrupt mask
Definition: ath5k_dma.c:549
ath5k_hw_reg_write
static void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
Definition: ath5k.h:1224
AR5K_IER_ENABLE
#define AR5K_IER_ENABLE
Definition: reg.h:94
AR5K_IER_DISABLE
#define AR5K_IER_DISABLE
Definition: reg.h:93
ah
uint8_t ah
Definition: registers.h:85
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
AR5K_IER
#define AR5K_IER
Definition: reg.h:92
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93

References ah, ath5k_softc::ah, AR5K_IER, AR5K_IER_DISABLE, AR5K_IER_ENABLE, ath5k_hw_reg_write(), ath5k_hw_set_imr(), ath5k_softc::dev, ath5k_softc::imask, ath5k_softc::irq_ena, and net80211_device::priv.

Referenced by ath5k_reset().

◆ ath5k_attach()

static int ath5k_attach ( struct net80211_device *  dev)
static

Definition at line 422 of file ath5k.c.

423 {
424  struct ath5k_softc *sc = dev->priv;
425  struct ath5k_hw *ah = sc->ah;
426  int ret;
427 
428  /*
429  * Collect the channel list. The 802.11 layer
430  * is resposible for filtering this list based
431  * on settings like the phy mode and regulatory
432  * domain restrictions.
433  */
434  ret = ath5k_setup_bands(dev);
435  if (ret) {
436  DBG("ath5k: can't get channels\n");
437  goto err;
438  }
439 
440  /* NB: setup here so ath5k_rate_update is happy */
441  if (ah->ah_modes & AR5K_MODE_BIT_11A)
442  ath5k_setcurmode(sc, AR5K_MODE_11A);
443  else
444  ath5k_setcurmode(sc, AR5K_MODE_11B);
445 
446  /*
447  * Allocate tx+rx descriptors and populate the lists.
448  */
449  ret = ath5k_desc_alloc(sc);
450  if (ret) {
451  DBG("ath5k: can't allocate descriptors\n");
452  goto err;
453  }
454 
455  /*
456  * Allocate hardware transmit queues. Note that hw functions
457  * handle reseting these queues at the needed time.
458  */
459  ret = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE);
460  if (ret) {
461  DBG("ath5k: can't setup xmit queue\n");
462  goto err_desc;
463  }
464 
465  sc->last_calib_ticks = currticks();
466 
467  ret = ath5k_eeprom_read_mac(ah, sc->hwinfo->hwaddr);
468  if (ret) {
469  DBG("ath5k: unable to read address from EEPROM: 0x%04x\n",
470  sc->pdev->device);
471  goto err_queues;
472  }
473 
474  memset(sc->bssidmask, 0xff, ETH_ALEN);
475  ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask);
476 
477  ret = net80211_register(sc->dev, &ath5k_ops, sc->hwinfo);
478  if (ret) {
479  DBG("ath5k: can't register ieee80211 hw\n");
480  goto err_queues;
481  }
482 
483  return 0;
484 err_queues:
485  ath5k_txq_release(sc);
486 err_desc:
487  ath5k_desc_free(sc);
488 err:
489  return ret;
490 }
ath5k_txq_setup
static int ath5k_txq_setup(struct ath5k_softc *sc, int qtype, int subtype)
Definition: ath5k.c:951
ath5k_softc
Definition: base.h:89
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_ops
static struct net80211_device_operations ath5k_ops
Definition: ath5k.c:145
pci_device::device
uint16_t device
Device ID.
Definition: pci.h:230
net80211_hw_info::hwaddr
u8 hwaddr[ETH_ALEN]
Default hardware MAC address.
Definition: net80211.h:447
ath5k_txq_release
static void ath5k_txq_release(struct ath5k_softc *sc)
Definition: ath5k.c:1032
ath5k_softc::bssidmask
u8 bssidmask[ETH_ALEN]
Definition: base.h:117
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
ath5k_desc_free
static void ath5k_desc_free(struct ath5k_softc *sc)
Definition: ath5k.c:926
ETH_ALEN
#define ETH_ALEN
Definition: if_ether.h:9
ath5k_setcurmode
static void ath5k_setcurmode(struct ath5k_softc *sc, unsigned int mode)
Definition: ath5k.c:675
ath5k_softc::pdev
struct pci_device * pdev
Definition: base.h:90
ath5k_setup_bands
static int ath5k_setup_bands(struct net80211_device *dev)
Definition: ath5k.c:586
ath5k_softc::hwinfo
struct net80211_hw_info * hwinfo
Definition: base.h:94
ath5k_hw_set_bssid_mask
int ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask)
ath5k_hw_set_bssid_mask - filter out bssids we listen
Definition: ath5k_pcu.c:349
ath5k_desc_alloc
static int ath5k_desc_alloc(struct ath5k_softc *sc)
Definition: ath5k.c:871
ath5k_eeprom_read_mac
int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
Definition: ath5k_eeprom.c:1724
ah
uint8_t ah
Definition: registers.h:85
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
currticks
unsigned long currticks(void)
Get current system time in ticks.
Definition: timer.c:43
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
ath5k_softc::last_calib_ticks
int last_calib_ticks
Definition: base.h:132
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
net80211_register
int net80211_register(struct net80211_device *dev, struct net80211_device_operations *ops, struct net80211_hw_info *hw)
Register 802.11 device with network stack.
Definition: net80211.c:792
memset
void * memset(void *dest, int character, size_t len) __nonnull

References ah, ath5k_softc::ah, AR5K_MODE_11A, AR5K_MODE_11B, AR5K_MODE_BIT_11A, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE, ath5k_desc_alloc(), ath5k_desc_free(), ath5k_eeprom_read_mac(), ath5k_hw_set_bssid_mask(), ath5k_ops, ath5k_setcurmode(), ath5k_setup_bands(), ath5k_txq_release(), ath5k_txq_setup(), ath5k_softc::bssidmask, currticks(), DBG, ath5k_softc::dev, pci_device::device, ETH_ALEN, net80211_hw_info::hwaddr, ath5k_softc::hwinfo, ath5k_softc::last_calib_ticks, memset(), net80211_register(), ath5k_softc::pdev, and net80211_device::priv.

Referenced by ath5k_probe().

◆ ath5k_detach()

static void ath5k_detach ( struct net80211_device *  dev)
static

Definition at line 493 of file ath5k.c.

494 {
495  struct ath5k_softc *sc = dev->priv;
496 
497  net80211_unregister(dev);
498  ath5k_desc_free(sc);
499  ath5k_txq_release(sc);
500 }
net80211_unregister
void net80211_unregister(struct net80211_device *dev)
Unregister 802.11 device from network stack.
Definition: net80211.c:825
ath5k_softc
Definition: base.h:89
ath5k_txq_release
static void ath5k_txq_release(struct ath5k_softc *sc)
Definition: ath5k.c:1032
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
ath5k_desc_free
static void ath5k_desc_free(struct ath5k_softc *sc)
Definition: ath5k.c:926
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92

References ath5k_desc_free(), ath5k_txq_release(), ath5k_softc::dev, net80211_unregister(), and net80211_device::priv.

Referenced by ath5k_remove().

◆ ath5k_copy_channels()

static unsigned int ath5k_copy_channels ( struct ath5k_hw *  ah,
struct net80211_channel *  channels,
unsigned int  mode,
unsigned int  max 
)
static

Definition at line 525 of file ath5k.c.

528 {
529  unsigned int i, count, size, chfreq, freq, ch;
530 
531  if (!(ah->ah_modes & (1 << mode)))
532  return 0;
533 
534  switch (mode) {
535  case AR5K_MODE_11A:
536  case AR5K_MODE_11A_TURBO:
537  /* 1..220, but 2GHz frequencies are filtered by check_channel */
538  size = 220;
539  chfreq = CHANNEL_5GHZ;
540  break;
541  case AR5K_MODE_11B:
542  case AR5K_MODE_11G:
543  case AR5K_MODE_11G_TURBO:
544  size = 26;
545  chfreq = CHANNEL_2GHZ;
546  break;
547  default:
548  return 0;
549  }
550 
551  for (i = 0, count = 0; i < size && max > 0; i++) {
552  ch = i + 1 ;
553  freq = ath5k_ieee2mhz(ch);
554 
555  /* Check if channel is supported by the chipset */
556  if (!ath5k_channel_ok(ah, freq, chfreq))
557  continue;
558 
559  /* Write channel info and increment counter */
560  channels[count].center_freq = freq;
561  channels[count].maxpower = 0; /* use regulatory */
562  channels[count].band = (chfreq == CHANNEL_2GHZ) ?
563  NET80211_BAND_2GHZ : NET80211_BAND_5GHZ;
564  switch (mode) {
565  case AR5K_MODE_11A:
566  case AR5K_MODE_11G:
567  channels[count].hw_value = chfreq | CHANNEL_OFDM;
568  break;
569  case AR5K_MODE_11A_TURBO:
570  case AR5K_MODE_11G_TURBO:
571  channels[count].hw_value = chfreq |
572  CHANNEL_OFDM | CHANNEL_TURBO;
573  break;
574  case AR5K_MODE_11B:
575  channels[count].hw_value = CHANNEL_B;
576  }
577 
578  count++;
579  max--;
580  }
581 
582  return count;
583 }
max
#define max(x, y)
Definition: ath.h:41
mode
uint16_t mode
Acceleration mode.
Definition: ena.h:26
size
uint16_t size
Buffer size.
Definition: dwmac.h:14
NET80211_BAND_2GHZ
#define NET80211_BAND_2GHZ
The 2.4 GHz ISM band, unlicensed in most countries.
Definition: net80211.h:45
ch
uint8_t ch
Definition: registers.h:83
ath5k_ieee2mhz
static short ath5k_ieee2mhz(short chan)
Definition: ath5k.c:513
ath5k_channel_ok
int ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags)
Definition: ath5k_phy.c:831
count
static unsigned int count
Number of entries.
Definition: dwmac.h:225
NET80211_BAND_5GHZ
#define NET80211_BAND_5GHZ
The band from 4.9 GHz to 5.7 GHz, which tends to be more restricted.
Definition: net80211.h:47
CHANNEL_TURBO
#define CHANNEL_TURBO
Definition: ath5k.h:631
CHANNEL_OFDM
#define CHANNEL_OFDM
Definition: ath5k.h:633
channels
struct ieee80211_ie_channels_channel_band channels[0]
List of (start, length) channel bands we can use.
Definition: ieee80211.h:18
CHANNEL_5GHZ
#define CHANNEL_5GHZ
Definition: ath5k.h:635
ah
uint8_t ah
Definition: registers.h:85
CHANNEL_B
#define CHANNEL_B
Definition: ath5k.h:641
CHANNEL_2GHZ
#define CHANNEL_2GHZ
Definition: ath5k.h:634

References ah, AR5K_MODE_11A, AR5K_MODE_11A_TURBO, AR5K_MODE_11B, AR5K_MODE_11G, AR5K_MODE_11G_TURBO, ath5k_channel_ok(), ath5k_ieee2mhz(), ch, CHANNEL_2GHZ, CHANNEL_5GHZ, CHANNEL_B, CHANNEL_OFDM, CHANNEL_TURBO, channels, count, max, mode, NET80211_BAND_2GHZ, NET80211_BAND_5GHZ, and size.

Referenced by ath5k_setup_bands().

◆ ath5k_setup_bands()

static int ath5k_setup_bands ( struct net80211_device *  dev)
static

Definition at line 586 of file ath5k.c.

587 {
588  struct ath5k_softc *sc = dev->priv;
589  struct ath5k_hw *ah = sc->ah;
590  int max_c, count_c = 0;
591  int i;
592  int band;
593 
594  max_c = sizeof(sc->hwinfo->channels) / sizeof(sc->hwinfo->channels[0]);
595 
596  /* 2GHz band */
597  if (sc->ah->ah_capabilities.cap_mode & AR5K_MODE_BIT_11G) {
598  /* G mode */
599  band = NET80211_BAND_2GHZ;
600  sc->hwinfo->bands = NET80211_BAND_BIT_2GHZ;
601  sc->hwinfo->modes = (NET80211_MODE_G | NET80211_MODE_B);
602 
603  for (i = 0; i < 12; i++)
604  sc->hwinfo->rates[band][i] = ath5k_rates[i].bitrate;
605  sc->hwinfo->nr_rates[band] = 12;
606 
607  sc->hwinfo->nr_channels =
608  ath5k_copy_channels(ah, sc->hwinfo->channels,
609  AR5K_MODE_11G, max_c);
610  count_c = sc->hwinfo->nr_channels;
611  max_c -= count_c;
612  } else if (sc->ah->ah_capabilities.cap_mode & AR5K_MODE_BIT_11B) {
613  /* B mode */
614  band = NET80211_BAND_2GHZ;
615  sc->hwinfo->bands = NET80211_BAND_BIT_2GHZ;
616  sc->hwinfo->modes = NET80211_MODE_B;
617 
618  for (i = 0; i < 4; i++)
619  sc->hwinfo->rates[band][i] = ath5k_rates[i].bitrate;
620  sc->hwinfo->nr_rates[band] = 4;
621 
622  sc->hwinfo->nr_channels =
623  ath5k_copy_channels(ah, sc->hwinfo->channels,
624  AR5K_MODE_11B, max_c);
625  count_c = sc->hwinfo->nr_channels;
626  max_c -= count_c;
627  }
628 
629  /* 5GHz band, A mode */
630  if (sc->ah->ah_capabilities.cap_mode & AR5K_MODE_BIT_11A) {
631  band = NET80211_BAND_5GHZ;
632  sc->hwinfo->bands |= NET80211_BAND_BIT_5GHZ;
633  sc->hwinfo->modes |= NET80211_MODE_A;
634 
635  for (i = 0; i < 8; i++)
636  sc->hwinfo->rates[band][i] = ath5k_rates[i+4].bitrate;
637  sc->hwinfo->nr_rates[band] = 8;
638 
639  sc->hwinfo->nr_channels =
640  ath5k_copy_channels(ah, sc->hwinfo->channels,
641  AR5K_MODE_11B, max_c);
642  count_c = sc->hwinfo->nr_channels;
643  max_c -= count_c;
644  }
645 
646  return 0;
647 }
ath5k_hw::ah_capabilities
struct ath5k_capabilities ah_capabilities
Definition: ath5k.h:1009
net80211_hw_info::modes
int modes
A bitwise OR of the 802.11x modes supported by this device.
Definition: net80211.h:450
net80211_hw_info::channels
struct net80211_channel channels[NET80211_MAX_CHANNELS]
List of RF channels supported by the card.
Definition: net80211.h:498
ath5k_softc
Definition: base.h:89
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
NET80211_BAND_BIT_5GHZ
#define NET80211_BAND_BIT_5GHZ
Bitmask for the 5GHz band.
Definition: net80211.h:54
ath5k_capabilities::cap_mode
u16 cap_mode
Definition: ath5k.h:917
NET80211_BAND_2GHZ
#define NET80211_BAND_2GHZ
The 2.4 GHz ISM band, unlicensed in most countries.
Definition: net80211.h:45
net80211_hw_info::rates
u16 rates[NET80211_NR_BANDS][NET80211_MAX_RATES]
List of transmission rates supported by the card, indexed by band.
Definition: net80211.h:508
net80211_hw_info::nr_rates
int nr_rates[NET80211_NR_BANDS]
Number of supported rates, indexed by band.
Definition: net80211.h:511
NET80211_BAND_5GHZ
#define NET80211_BAND_5GHZ
The band from 4.9 GHz to 5.7 GHz, which tends to be more restricted.
Definition: net80211.h:47
net80211_device::priv
void * priv
Driver private data.
Definition: net80211.h:798
ath5k_rates
static const struct @10 ath5k_rates[]
NET80211_MODE_B
#define NET80211_MODE_B
802.11b: 1-11 Mbps operation using DSSS/CCK signaling on the 2.4GHz band
Definition: net80211.h:66
ath5k_copy_channels
static unsigned int ath5k_copy_channels(struct ath5k_hw *ah, struct net80211_channel *channels, unsigned int mode, unsigned int max)
Definition: ath5k.c:525
ath5k_softc::hwinfo
struct net80211_hw_info * hwinfo
Definition: base.h:94
NET80211_BAND_BIT_2GHZ
#define NET80211_BAND_BIT_2GHZ
Bitmask for the 2GHz band.
Definition: net80211.h:52
net80211_hw_info::nr_channels
int nr_channels
Number of supported channels.
Definition: net80211.h:501
ah
uint8_t ah
Definition: registers.h:85
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
net80211_hw_info::bands
int bands
A bitwise OR of the bands on which this device can communicate.
Definition: net80211.h:453
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
NET80211_MODE_G
#define NET80211_MODE_G
802.11g: 54 Mbps operation using ERP/OFDM signaling on the 2.4GHz band
Definition: net80211.h:69
NET80211_MODE_A
#define NET80211_MODE_A
802.11a: 54 Mbps operation using OFDM signaling on the 5GHz band
Definition: net80211.h:63

References ah, ath5k_softc::ah, ath5k_hw::ah_capabilities, AR5K_MODE_11B, AR5K_MODE_11G, AR5K_MODE_BIT_11A, AR5K_MODE_BIT_11B, AR5K_MODE_BIT_11G, ath5k_copy_channels(), ath5k_rates, net80211_hw_info::bands, ath5k_capabilities::cap_mode, net80211_hw_info::channels, ath5k_softc::dev, ath5k_softc::hwinfo, net80211_hw_info::modes, NET80211_BAND_2GHZ, NET80211_BAND_5GHZ, NET80211_BAND_BIT_2GHZ, NET80211_BAND_BIT_5GHZ, NET80211_MODE_A, NET80211_MODE_B, NET80211_MODE_G, net80211_hw_info::nr_channels, net80211_hw_info::nr_rates, net80211_device::priv, and net80211_hw_info::rates.

Referenced by ath5k_attach().

◆ ath5k_chan_set()

static int ath5k_chan_set ( struct ath5k_softc *  sc,
struct net80211_channel *  chan 
)
static

Definition at line 656 of file ath5k.c.

657 {
658  if (chan->center_freq != sc->curchan->center_freq ||
659  chan->hw_value != sc->curchan->hw_value) {
660  /*
661  * To switch channels clear any pending DMA operations;
662  * wait long enough for the RX fifo to drain, reset the
663  * hardware at the new frequency, and then re-enable
664  * the relevant bits of the h/w.
665  */
666  DBG2("ath5k: resetting for channel change (%d -> %d MHz)\n",
667  sc->curchan->center_freq, chan->center_freq);
668  return ath5k_reset(sc, chan);
669  }
670 
671  return 0;
672 }
net80211_channel::hw_value
u16 hw_value
Hardware channel value.
Definition: net80211.h:414
net80211_channel::center_freq
u16 center_freq
The center frequency for this channel.
Definition: net80211.h:411
ath5k_reset
static int ath5k_reset(struct ath5k_softc *sc, struct net80211_channel *chan)
Definition: ath5k.c:1498
ath5k_softc::curchan
struct net80211_channel * curchan
Definition: base.h:113
DBG2
#define DBG2(...)
Definition: compiler.h:515

References ath5k_reset(), net80211_channel::center_freq, ath5k_softc::curchan, DBG2, and net80211_channel::hw_value.

Referenced by ath5k_config().

◆ ath5k_setcurmode()

static void ath5k_setcurmode ( struct ath5k_softc *  sc,
unsigned int  mode 
)
static

Definition at line 675 of file ath5k.c.

676 {
677  sc->curmode = mode;
678 
679  if (mode == AR5K_MODE_11A) {
680  sc->curband = NET80211_BAND_5GHZ;
681  } else {
682  sc->curband = NET80211_BAND_2GHZ;
683  }
684 }
ath5k_softc::curmode
unsigned int curmode
Definition: base.h:112
mode
uint16_t mode
Acceleration mode.
Definition: ena.h:26
NET80211_BAND_2GHZ
#define NET80211_BAND_2GHZ
The 2.4 GHz ISM band, unlicensed in most countries.
Definition: net80211.h:45
ath5k_softc::curband
int curband
Definition: base.h:95
NET80211_BAND_5GHZ
#define NET80211_BAND_5GHZ
The band from 4.9 GHz to 5.7 GHz, which tends to be more restricted.
Definition: net80211.h:47

References AR5K_MODE_11A, ath5k_softc::curband, ath5k_softc::curmode, mode, NET80211_BAND_2GHZ, and NET80211_BAND_5GHZ.

Referenced by ath5k_attach().

◆ ath5k_mode_setup()

static void ath5k_mode_setup ( struct ath5k_softc *  sc)
static

Definition at line 687 of file ath5k.c.

688 {
689  struct ath5k_hw *ah = sc->ah;
690  u32 rfilt;
691 
692  /* configure rx filter */
693  rfilt = sc->filter_flags;
694  ath5k_hw_set_rx_filter(ah, rfilt);
695 
696  if (ath5k_hw_hasbssidmask(ah))
697  ath5k_hw_set_bssid_mask(ah, sc->bssidmask);
698 
699  /* configure operational mode */
700  ath5k_hw_set_opmode(ah);
701 
702  ath5k_hw_set_mcast_filter(ah, 0, 0);
703 }
ath5k_hw_hasbssidmask
#define ath5k_hw_hasbssidmask(_ah)
Definition: base.h:141
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_hw_set_rx_filter
void ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter)
ath5k_hw_set_rx_filter - Set rx filter
Definition: ath5k_pcu.c:454
ath5k_softc::bssidmask
u8 bssidmask[ETH_ALEN]
Definition: base.h:117
ath5k_softc::filter_flags
unsigned int filter_flags
Definition: base.h:111
ath5k_hw_set_opmode
int ath5k_hw_set_opmode(struct ath5k_hw *ah)
ath5k_hw_set_opmode - Set PCU operating mode
Definition: ath5k_pcu.c:49
ath5k_hw_set_bssid_mask
int ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask)
ath5k_hw_set_bssid_mask - filter out bssids we listen
Definition: ath5k_pcu.c:349
ath5k_hw_set_mcast_filter
void ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1)
Definition: ath5k_pcu.c:407
ah
uint8_t ah
Definition: registers.h:85
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
u32
uint32_t u32
Definition: stdint.h:24

References ah, ath5k_softc::ah, ath5k_hw_hasbssidmask, ath5k_hw_set_bssid_mask(), ath5k_hw_set_mcast_filter(), ath5k_hw_set_opmode(), ath5k_hw_set_rx_filter(), ath5k_softc::bssidmask, and ath5k_softc::filter_flags.

Referenced by ath5k_rx_start().

◆ ath5k_desc_alloc()

static int ath5k_desc_alloc ( struct ath5k_softc *  sc)
static

Definition at line 871 of file ath5k.c.

872 {
873  struct ath5k_desc *ds;
874  struct ath5k_buf *bf;
875  u32 da;
876  unsigned int i;
877  int ret;
878 
879  /* allocate descriptors */
880  sc->desc_len = sizeof(struct ath5k_desc) * (ATH_TXBUF + ATH_RXBUF + 1);
881  sc->desc = malloc_phys(sc->desc_len, ATH5K_DESC_ALIGN);
882  if (sc->desc == NULL) {
883  DBG("ath5k: can't allocate descriptors\n");
884  ret = -ENOMEM;
885  goto err;
886  }
887  memset(sc->desc, 0, sc->desc_len);
888  sc->desc_daddr = virt_to_bus(sc->desc);
889 
890  ds = sc->desc;
891  da = sc->desc_daddr;
892 
893  bf = calloc(ATH_TXBUF + ATH_RXBUF + 1, sizeof(struct ath5k_buf));
894  if (bf == NULL) {
895  DBG("ath5k: can't allocate buffer pointers\n");
896  ret = -ENOMEM;
897  goto err_free;
898  }
899  sc->bufptr = bf;
900 
901  INIT_LIST_HEAD(&sc->rxbuf);
902  for (i = 0; i < ATH_RXBUF; i++, bf++, ds++, da += sizeof(*ds)) {
903  bf->desc = ds;
904  bf->daddr = da;
905  list_add_tail(&bf->list, &sc->rxbuf);
906  }
907 
908  INIT_LIST_HEAD(&sc->txbuf);
909  sc->txbuf_len = ATH_TXBUF;
910  for (i = 0; i < ATH_TXBUF; i++, bf++, ds++, da += sizeof(*ds)) {
911  bf->desc = ds;
912  bf->daddr = da;
913  list_add_tail(&bf->list, &sc->txbuf);
914  }
915 
916  return 0;
917 
918 err_free:
919  free_phys(sc->desc, sc->desc_len);
920 err:
921  sc->desc = NULL;
922  return ret;
923 }
ATH_TXBUF
#define ATH_TXBUF
Definition: base.h:54
ATH_RXBUF
#define ATH_RXBUF
Definition: base.h:53
ath5k_desc
Definition: desc.h:315
ath5k_softc::rxbuf
struct list_head rxbuf
Definition: base.h:120
ath5k_softc::txbuf_len
unsigned int txbuf_len
Definition: base.h:124
ENOMEM
#define ENOMEM
Not enough space.
Definition: errno.h:535
virt_to_bus
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:184
list_add_tail
#define list_add_tail(new, head)
Add a new entry to the tail of a list.
Definition: list.h:94
ath5k_softc::bufptr
struct ath5k_buf * bufptr
Definition: base.h:98
calloc
static void *__malloc calloc(size_t nmemb, size_t size)
Allocate cleared memory.
Definition: stdlib.h:46
ath5k_softc::desc_daddr
u32 desc_daddr
Definition: base.h:100
ath5k_softc::desc_len
size_t desc_len
Definition: base.h:101
ds
uint32_t ds
Definition: librm.h:140
ath5k_buf
Definition: base.h:56
INIT_LIST_HEAD
#define INIT_LIST_HEAD(list)
Initialise a list head.
Definition: list.h:46
free_phys
void free_phys(void *ptr, size_t size)
Free memory allocated with malloc_phys()
Definition: malloc.c:723
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
ATH5K_DESC_ALIGN
#define ATH5K_DESC_ALIGN
Definition: ath5k.c:61
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::txbuf
struct list_head txbuf
Definition: base.h:123
u32
uint32_t u32
Definition: stdint.h:24
malloc_phys
void * malloc_phys(size_t size, size_t phys_align)
Allocate memory with specified physical alignment.
Definition: malloc.c:707
ath5k_softc::desc
struct ath5k_desc * desc
Definition: base.h:99
memset
void * memset(void *dest, int character, size_t len) __nonnull

References ATH5K_DESC_ALIGN, ATH_RXBUF, ATH_TXBUF, ath5k_softc::bufptr, calloc(), DBG, ath5k_softc::desc, ath5k_softc::desc_daddr, ath5k_softc::desc_len, ds, ENOMEM, free_phys(), INIT_LIST_HEAD, list_add_tail, malloc_phys(), memset(), NULL, ath5k_softc::rxbuf, ath5k_softc::txbuf, ath5k_softc::txbuf_len, and virt_to_bus().

Referenced by ath5k_attach().

◆ ath5k_desc_free()

static void ath5k_desc_free ( struct ath5k_softc *  sc)
static

Definition at line 926 of file ath5k.c.

927 {
928  struct ath5k_buf *bf;
929 
930  list_for_each_entry(bf, &sc->txbuf, list)
931  ath5k_txbuf_free(sc, bf);
932  list_for_each_entry(bf, &sc->rxbuf, list)
933  ath5k_rxbuf_free(sc, bf);
934 
935  /* Free memory associated with all descriptors */
936  free_phys(sc->desc, sc->desc_len);
937 
938  free(sc->bufptr);
939  sc->bufptr = NULL;
940 }
ath5k_rxbuf_free
static void ath5k_rxbuf_free(struct ath5k_softc *sc __unused, struct ath5k_buf *bf)
Definition: ath5k.c:189
ath5k_softc::rxbuf
struct list_head rxbuf
Definition: base.h:120
list_for_each_entry
#define list_for_each_entry(pos, head, member)
Iterate over entries in a list.
Definition: list.h:432
ath5k_softc::bufptr
struct ath5k_buf * bufptr
Definition: base.h:98
ath5k_buf::list
struct list_head list
Definition: base.h:57
free
static void(* free)(struct refcnt *refcnt))
Definition: refcnt.h:55
ath5k_softc::desc_len
size_t desc_len
Definition: base.h:101
ath5k_buf
Definition: base.h:56
free_phys
void free_phys(void *ptr, size_t size)
Free memory allocated with malloc_phys()
Definition: malloc.c:723
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::txbuf
struct list_head txbuf
Definition: base.h:123
ath5k_txbuf_free
static void ath5k_txbuf_free(struct ath5k_softc *sc, struct ath5k_buf *bf)
Definition: ath5k.c:179
ath5k_softc::desc
struct ath5k_desc * desc
Definition: base.h:99

References ath5k_rxbuf_free(), ath5k_txbuf_free(), ath5k_softc::bufptr, ath5k_softc::desc, ath5k_softc::desc_len, free, free_phys(), ath5k_buf::list, list_for_each_entry, NULL, ath5k_softc::rxbuf, and ath5k_softc::txbuf.

Referenced by ath5k_attach(), and ath5k_detach().

◆ ath5k_rxbuf_setup()

static int ath5k_rxbuf_setup ( struct ath5k_softc *  sc,
struct ath5k_buf *  bf 
)
static

Definition at line 771 of file ath5k.c.

772 {
773  struct ath5k_hw *ah = sc->ah;
774  struct io_buffer *iob = bf->iob;
775  struct ath5k_desc *ds;
776 
777  if (!iob) {
778  iob = ath5k_rx_iob_alloc(sc, &bf->iobaddr);
779  if (!iob)
780  return -ENOMEM;
781  bf->iob = iob;
782  }
783 
784  /*
785  * Setup descriptors. For receive we always terminate
786  * the descriptor list with a self-linked entry so we'll
787  * not get overrun under high load (as can happen with a
788  * 5212 when ANI processing enables PHY error frames).
789  *
790  * To insure the last descriptor is self-linked we create
791  * each descriptor as self-linked and add it to the end. As
792  * each additional descriptor is added the previous self-linked
793  * entry is ``fixed'' naturally. This should be safe even
794  * if DMA is happening. When processing RX interrupts we
795  * never remove/process the last, self-linked, entry on the
796  * descriptor list. This insures the hardware always has
797  * someplace to write a new frame.
798  */
799  ds = bf->desc;
800  ds->ds_link = bf->daddr; /* link to self */
801  ds->ds_data = bf->iobaddr;
802  if (ah->ah_setup_rx_desc(ah, ds,
803  iob_tailroom(iob), /* buffer size */
804  0) != 0) {
805  DBG("ath5k: error setting up RX descriptor for %zd bytes\n", iob_tailroom(iob));
806  return -EINVAL;
807  }
808 
809  if (sc->rxlink != NULL)
810  *sc->rxlink = bf->daddr;
811  sc->rxlink = &ds->ds_link;
812  return 0;
813 }
EINVAL
#define EINVAL
Invalid argument.
Definition: errno.h:429
ath5k_rx_iob_alloc
static struct io_buffer * ath5k_rx_iob_alloc(struct ath5k_softc *sc, u32 *iob_addr)
Definition: ath5k.c:737
ath5k_desc
Definition: desc.h:315
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_buf::iob
struct io_buffer * iob
Definition: base.h:61
ENOMEM
#define ENOMEM
Not enough space.
Definition: errno.h:535
iob_tailroom
static size_t iob_tailroom(struct io_buffer *iobuf)
Calculate available space at end of an I/O buffer.
Definition: iobuf.h:180
ds
uint32_t ds
Definition: librm.h:140
ath5k_buf::daddr
u32 daddr
Definition: base.h:60
ath5k_buf::desc
struct ath5k_desc * desc
Definition: base.h:59
ah
uint8_t ah
Definition: registers.h:85
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_softc::rxlink
u32 * rxlink
Definition: base.h:121
ath5k_buf::iobaddr
u32 iobaddr
Definition: base.h:62
io_buffer
A persistent I/O buffer.
Definition: iobuf.h:38

References ah, ath5k_softc::ah, ath5k_rx_iob_alloc(), ath5k_buf::daddr, DBG, ath5k_buf::desc, ds, EINVAL, ENOMEM, ath5k_buf::iob, iob_tailroom(), ath5k_buf::iobaddr, NULL, and ath5k_softc::rxlink.

Referenced by ath5k_handle_rx(), and ath5k_rx_start().

◆ ath5k_txbuf_setup()

static int ath5k_txbuf_setup ( struct ath5k_softc *  sc,
struct ath5k_buf *  bf 
)
static

Definition at line 816 of file ath5k.c.

817 {
818  struct ath5k_hw *ah = sc->ah;
819  struct ath5k_txq *txq = &sc->txq;
820  struct ath5k_desc *ds = bf->desc;
821  struct io_buffer *iob = bf->iob;
822  unsigned int pktlen, flags;
823  int ret;
824  u16 duration = 0;
825  u16 cts_rate = 0;
826 
827  flags = AR5K_TXDESC_INTREQ | AR5K_TXDESC_CLRDMASK;
828  bf->iobaddr = virt_to_bus(iob->data);
829  pktlen = iob_len(iob);
830 
831  /* FIXME: If we are in g mode and rate is a CCK rate
832  * subtract ah->ah_txpower.txp_cck_ofdm_pwr_delta
833  * from tx power (value is in dB units already) */
834  if (sc->dev->phy_flags & NET80211_PHY_USE_PROTECTION) {
835  struct net80211_device *dev = sc->dev;
836 
837  flags |= AR5K_TXDESC_CTSENA;
838  cts_rate = sc->hw_rtscts_rate;
839  duration = net80211_cts_duration(dev, pktlen);
840  }
841  ret = ah->ah_setup_tx_desc(ah, ds, pktlen,
842  IEEE80211_TYP_FRAME_HEADER_LEN,
843  AR5K_PKT_TYPE_NORMAL, sc->power_level * 2,
844  sc->hw_rate, ATH5K_RETRIES,
845  AR5K_TXKEYIX_INVALID, 0, flags,
846  cts_rate, duration);
847  if (ret)
848  return ret;
849 
850  ds->ds_link = 0;
851  ds->ds_data = bf->iobaddr;
852 
853  list_add_tail(&bf->list, &txq->q);
854  if (txq->link == NULL) /* is this first packet? */
855  ath5k_hw_set_txdp(ah, txq->qnum, bf->daddr);
856  else /* no, so only link it */
857  *txq->link = bf->daddr;
858 
859  txq->link = &ds->ds_link;
860  ath5k_hw_start_tx_dma(ah, txq->qnum);
861  mb();
862 
863  return 0;
864 }
ath5k_softc::txq
struct ath5k_txq txq
Definition: base.h:125
u16
uint16_t u16
Definition: stdint.h:22
ath5k_desc
Definition: desc.h:315
ath5k_hw_set_txdp
int ath5k_hw_set_txdp(struct ath5k_hw *ah, unsigned int queue, u32 phys_addr)
ath5k_hw_set_txdp - Set TX Descriptor's address for a specific queue
Definition: ath5k_dma.c:293
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_buf::iob
struct io_buffer * iob
Definition: base.h:61
ath5k_hw_start_tx_dma
int ath5k_hw_start_tx_dma(struct ath5k_hw *ah, unsigned int queue)
ath5k_hw_start_tx_dma - Start DMA transmit for a specific queue
Definition: ath5k_dma.c:128
virt_to_bus
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:184
AR5K_TXDESC_INTREQ
#define AR5K_TXDESC_INTREQ
Definition: desc.h:332
IEEE80211_TYP_FRAME_HEADER_LEN
#define IEEE80211_TYP_FRAME_HEADER_LEN
Frame header length for frames we might work with.
Definition: ieee80211.h:60
ath5k_txq::link
u32 * link
Definition: base.h:76
list_add_tail
#define list_add_tail(new, head)
Add a new entry to the tail of a list.
Definition: list.h:94
ath5k_txq::q
struct list_head q
Definition: base.h:77
ath5k_buf::list
struct list_head list
Definition: base.h:57
NET80211_PHY_USE_PROTECTION
#define NET80211_PHY_USE_PROTECTION
Whether to use RTS/CTS or CTS-to-self protection for transmissions.
Definition: net80211.h:251
ath5k_txq
Definition: base.h:74
flags
uint8_t flags
Flags.
Definition: ena.h:18
duration
u16 duration
Microseconds to reserve link.
Definition: ieee80211.h:15
iob_len
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:160
ATH5K_RETRIES
#define ATH5K_RETRIES
Definition: ath5k.c:60
net80211_device
Structure encapsulating the complete state of an 802.11 device.
Definition: net80211.h:786
AR5K_TXKEYIX_INVALID
#define AR5K_TXKEYIX_INVALID
Definition: ath5k.h:587
ds
uint32_t ds
Definition: librm.h:140
net80211_device::phy_flags
int phy_flags
Physical layer options.
Definition: net80211.h:983
AR5K_TXDESC_CLRDMASK
#define AR5K_TXDESC_CLRDMASK
Definition: desc.h:328
ath5k_buf::daddr
u32 daddr
Definition: base.h:60
ath5k_buf::desc
struct ath5k_desc * desc
Definition: base.h:59
ath5k_txq::qnum
unsigned int qnum
Definition: base.h:75
AR5K_TXDESC_CTSENA
#define AR5K_TXDESC_CTSENA
Definition: desc.h:331
io_buffer::data
void * data
Start of data.
Definition: iobuf.h:53
ath5k_softc::power_level
int power_level
Definition: base.h:134
ah
uint8_t ah
Definition: registers.h:85
mb
void mb(void)
Memory barrier.
net80211_cts_duration
static u16 net80211_cts_duration(struct net80211_device *dev, int size)
Calculate duration field for a CTS control frame.
Definition: net80211.h:1179
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
ath5k_softc::hw_rtscts_rate
int hw_rtscts_rate
Definition: base.h:138
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::hw_rate
int hw_rate
Definition: base.h:137
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_buf::iobaddr
u32 iobaddr
Definition: base.h:62
io_buffer
A persistent I/O buffer.
Definition: iobuf.h:38

References ah, ath5k_softc::ah, AR5K_PKT_TYPE_NORMAL, AR5K_TXDESC_CLRDMASK, AR5K_TXDESC_CTSENA, AR5K_TXDESC_INTREQ, AR5K_TXKEYIX_INVALID, ath5k_hw_set_txdp(), ath5k_hw_start_tx_dma(), ATH5K_RETRIES, ath5k_buf::daddr, io_buffer::data, ath5k_buf::desc, ath5k_softc::dev, ds, duration, flags, ath5k_softc::hw_rate, ath5k_softc::hw_rtscts_rate, IEEE80211_TYP_FRAME_HEADER_LEN, ath5k_buf::iob, iob_len(), ath5k_buf::iobaddr, ath5k_txq::link, ath5k_buf::list, list_add_tail, mb(), net80211_cts_duration(), NET80211_PHY_USE_PROTECTION, NULL, net80211_device::phy_flags, ath5k_softc::power_level, ath5k_txq::q, ath5k_txq::qnum, ath5k_softc::txq, and virt_to_bus().

Referenced by ath5k_tx().

◆ ath5k_txbuf_free()

static void ath5k_txbuf_free ( struct ath5k_softc *  sc,
struct ath5k_buf *  bf 
)
inlinestatic

Definition at line 179 of file ath5k.c.

181 {
182  if (!bf->iob)
183  return;
184 
185  net80211_tx_complete(sc->dev, bf->iob, 0, ECANCELED);
186  bf->iob = NULL;
187 }
ECANCELED
#define ECANCELED
Operation canceled.
Definition: errno.h:344
ath5k_buf::iob
struct io_buffer * iob
Definition: base.h:61
net80211_tx_complete
void net80211_tx_complete(struct net80211_device *dev, struct io_buffer *iob, int retries, int rc)
Indicate the completed transmission of a packet.
Definition: net80211.c:2809
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322

References ath5k_softc::dev, ECANCELED, ath5k_buf::iob, net80211_tx_complete(), and NULL.

Referenced by ath5k_desc_free(), and ath5k_txq_drainq().

◆ ath5k_rxbuf_free()

static void ath5k_rxbuf_free ( struct ath5k_softc *sc  __unused,
struct ath5k_buf *  bf 
)
inlinestatic

Definition at line 189 of file ath5k.c.

191 {
192  free_iob(bf->iob);
193  bf->iob = NULL;
194 }
free_iob
void free_iob(struct io_buffer *iobuf)
Free I/O buffer.
Definition: iobuf.c:153
ath5k_buf::iob
struct io_buffer * iob
Definition: base.h:61
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322

References free_iob(), ath5k_buf::iob, and NULL.

Referenced by ath5k_desc_free().

◆ ath5k_txq_setup()

static int ath5k_txq_setup ( struct ath5k_softc *  sc,
int  qtype,
int  subtype 
)
static

Definition at line 951 of file ath5k.c.

952 {
953  struct ath5k_hw *ah = sc->ah;
954  struct ath5k_txq *txq;
955  struct ath5k_txq_info qi = {
956  .tqi_subtype = subtype,
957  .tqi_aifs = AR5K_TXQ_USEDEFAULT,
958  .tqi_cw_min = AR5K_TXQ_USEDEFAULT,
959  .tqi_cw_max = AR5K_TXQ_USEDEFAULT
960  };
961  int qnum;
962 
963  /*
964  * Enable interrupts only for EOL and DESC conditions.
965  * We mark tx descriptors to receive a DESC interrupt
966  * when a tx queue gets deep; otherwise waiting for the
967  * EOL to reap descriptors. Note that this is done to
968  * reduce interrupt load and this only defers reaping
969  * descriptors, never transmitting frames. Aside from
970  * reducing interrupts this also permits more concurrency.
971  * The only potential downside is if the tx queue backs
972  * up in which case the top half of the kernel may backup
973  * due to a lack of tx descriptors.
974  */
975  qi.tqi_flags = AR5K_TXQ_FLAG_TXEOLINT_ENABLE |
976  AR5K_TXQ_FLAG_TXDESCINT_ENABLE;
977  qnum = ath5k_hw_setup_tx_queue(ah, qtype, &qi);
978  if (qnum < 0) {
979  DBG("ath5k: can't set up a TX queue\n");
980  return -EIO;
981  }
982 
983  txq = &sc->txq;
984  if (!txq->setup) {
985  txq->qnum = qnum;
986  txq->link = NULL;
987  INIT_LIST_HEAD(&txq->q);
988  txq->setup = 1;
989  }
990  return 0;
991 }
ath5k_softc::txq
struct ath5k_txq txq
Definition: base.h:125
ath5k_txq_info
Definition: ath5k.h:508
AR5K_TXQ_USEDEFAULT
#define AR5K_TXQ_USEDEFAULT
Definition: ath5k.h:250
ath5k_txq::setup
int setup
Definition: base.h:78
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_txq::link
u32 * link
Definition: base.h:76
ath5k_txq::q
struct list_head q
Definition: base.h:77
ath5k_txq_info::tqi_subtype
enum ath5k_tx_queue_subtype tqi_subtype
Definition: ath5k.h:510
ath5k_txq
Definition: base.h:74
subtype
uint8_t subtype
Slow protocols subtype.
Definition: eth_slow.h:13
AR5K_TXQ_FLAG_TXEOLINT_ENABLE
#define AR5K_TXQ_FLAG_TXEOLINT_ENABLE
Definition: ath5k.h:492
ath5k_txq::qnum
unsigned int qnum
Definition: base.h:75
INIT_LIST_HEAD
#define INIT_LIST_HEAD(list)
Initialise a list head.
Definition: list.h:46
EIO
#define EIO
Input/output error.
Definition: errno.h:434
ath5k_txq_info::tqi_flags
u16 tqi_flags
Definition: ath5k.h:511
AR5K_TXQ_FLAG_TXDESCINT_ENABLE
#define AR5K_TXQ_FLAG_TXDESCINT_ENABLE
Definition: ath5k.h:493
ah
uint8_t ah
Definition: registers.h:85
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_hw_setup_tx_queue
int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type, struct ath5k_txq_info *queue_info)
Definition: ath5k_qcu.c:56

References ah, ath5k_softc::ah, AR5K_TXQ_FLAG_TXDESCINT_ENABLE, AR5K_TXQ_FLAG_TXEOLINT_ENABLE, AR5K_TXQ_USEDEFAULT, ath5k_hw_setup_tx_queue(), DBG, EIO, INIT_LIST_HEAD, ath5k_txq::link, NULL, ath5k_txq::q, ath5k_txq::qnum, ath5k_txq::setup, subtype, ath5k_txq_info::tqi_flags, ath5k_txq_info::tqi_subtype, and ath5k_softc::txq.

Referenced by ath5k_attach().

◆ ath5k_txq_drainq()

static void ath5k_txq_drainq ( struct ath5k_softc *  sc,
struct ath5k_txq *  txq 
)
static

Definition at line 994 of file ath5k.c.

995 {
996  struct ath5k_buf *bf, *bf0;
997 
998  list_for_each_entry_safe(bf, bf0, &txq->q, list) {
999  ath5k_txbuf_free(sc, bf);
1000 
1001  list_del(&bf->list);
1002  list_add_tail(&bf->list, &sc->txbuf);
1003  sc->txbuf_len++;
1004  }
1005  txq->link = NULL;
1006 }
ath5k_softc::txbuf_len
unsigned int txbuf_len
Definition: base.h:124
list_del
#define list_del(list)
Delete an entry from a list.
Definition: list.h:120
ath5k_txq::link
u32 * link
Definition: base.h:76
list_add_tail
#define list_add_tail(new, head)
Add a new entry to the tail of a list.
Definition: list.h:94
ath5k_txq::q
struct list_head q
Definition: base.h:77
list_for_each_entry_safe
#define list_for_each_entry_safe(pos, tmp, head, member)
Iterate over entries in a list, safe against deletion of the current entry.
Definition: list.h:459
ath5k_buf::list
struct list_head list
Definition: base.h:57
ath5k_buf
Definition: base.h:56
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::txbuf
struct list_head txbuf
Definition: base.h:123
ath5k_txbuf_free
static void ath5k_txbuf_free(struct ath5k_softc *sc, struct ath5k_buf *bf)
Definition: ath5k.c:179

References ath5k_txbuf_free(), ath5k_txq::link, ath5k_buf::list, list_add_tail, list_del, list_for_each_entry_safe, NULL, ath5k_txq::q, ath5k_softc::txbuf, and ath5k_softc::txbuf_len.

Referenced by ath5k_txq_cleanup().

◆ ath5k_txq_cleanup()

static void ath5k_txq_cleanup ( struct ath5k_softc *  sc)
static

Definition at line 1012 of file ath5k.c.

1013 {
1014  struct ath5k_hw *ah = sc->ah;
1015 
1016  if (!(sc->status & ATH_STAT_INVALID)) {
1017  /* don't touch the hardware if marked invalid */
1018  if (sc->txq.setup) {
1019  ath5k_hw_stop_tx_dma(ah, sc->txq.qnum);
1020  DBG("ath5k: txq [%d] %x, link %p\n",
1021  sc->txq.qnum,
1022  ath5k_hw_get_txdp(ah, sc->txq.qnum),
1023  sc->txq.link);
1024  }
1025  }
1026 
1027  if (sc->txq.setup)
1028  ath5k_txq_drainq(sc, &sc->txq);
1029 }
ath5k_softc::txq
struct ath5k_txq txq
Definition: base.h:125
ATH_STAT_INVALID
#define ATH_STAT_INVALID
Definition: base.h:105
ath5k_txq::setup
int setup
Definition: base.h:78
ath5k_hw_get_txdp
u32 ath5k_hw_get_txdp(struct ath5k_hw *ah, unsigned int queue)
ath5k_hw_get_txdp - Get TX Descriptor's address for a specific queue
Definition: ath5k_dma.c:262
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_txq::link
u32 * link
Definition: base.h:76
ath5k_txq_drainq
static void ath5k_txq_drainq(struct ath5k_softc *sc, struct ath5k_txq *txq)
Definition: ath5k.c:994
ath5k_txq::qnum
unsigned int qnum
Definition: base.h:75
ath5k_softc::status
int status
Definition: base.h:104
ah
uint8_t ah
Definition: registers.h:85
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
ath5k_hw_stop_tx_dma
int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
ath5k_hw_stop_tx_dma - Stop DMA transmit on a specific queue
Definition: ath5k_dma.c:168
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93

References ah, ath5k_softc::ah, ath5k_hw_get_txdp(), ath5k_hw_stop_tx_dma(), ath5k_txq_drainq(), ATH_STAT_INVALID, DBG, ath5k_txq::link, ath5k_txq::qnum, ath5k_txq::setup, ath5k_softc::status, and ath5k_softc::txq.

Referenced by ath5k_reset(), and ath5k_stop_hw().

◆ ath5k_txq_release()

static void ath5k_txq_release ( struct ath5k_softc *  sc)
static

Definition at line 1032 of file ath5k.c.

1033 {
1034  if (sc->txq.setup) {
1035  ath5k_hw_release_tx_queue(sc->ah);
1036  sc->txq.setup = 0;
1037  }
1038 }
ath5k_softc::txq
struct ath5k_txq txq
Definition: base.h:125
ath5k_txq::setup
int setup
Definition: base.h:78
ath5k_hw_release_tx_queue
void ath5k_hw_release_tx_queue(struct ath5k_hw *ah)
Definition: ath5k_qcu.c:87
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93

References ath5k_softc::ah, ath5k_hw_release_tx_queue(), ath5k_txq::setup, and ath5k_softc::txq.

Referenced by ath5k_attach(), and ath5k_detach().

◆ ath5k_rx_start()

static int ath5k_rx_start ( struct ath5k_softc *  sc)
static

Definition at line 1051 of file ath5k.c.

1052 {
1053  struct ath5k_hw *ah = sc->ah;
1054  struct ath5k_buf *bf;
1055  int ret;
1056 
1057  sc->rxbufsize = IEEE80211_MAX_LEN;
1058  if (sc->rxbufsize % sc->cachelsz != 0)
1059  sc->rxbufsize += sc->cachelsz - (sc->rxbufsize % sc->cachelsz);
1060 
1061  sc->rxlink = NULL;
1062 
1063  list_for_each_entry(bf, &sc->rxbuf, list) {
1064  ret = ath5k_rxbuf_setup(sc, bf);
1065  if (ret != 0)
1066  return ret;
1067  }
1068 
1069  bf = list_entry(sc->rxbuf.next, struct ath5k_buf, list);
1070 
1071  ath5k_hw_set_rxdp(ah, bf->daddr);
1072  ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */
1073  ath5k_mode_setup(sc); /* set filters, etc. */
1074  ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */
1075 
1076  return 0;
1077 }
list_head::next
struct list_head * next
Next list entry.
Definition: list.h:21
ath5k_softc::rxbuf
struct list_head rxbuf
Definition: base.h:120
ath5k_hw_start_rx_dma
void ath5k_hw_start_rx_dma(struct ath5k_hw *ah)
ath5k_hw_start_rx_dma - Start DMA receive
Definition: ath5k_dma.c:55
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
list_for_each_entry
#define list_for_each_entry(pos, head, member)
Iterate over entries in a list.
Definition: list.h:432
ath5k_hw_set_rxdp
void ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr)
ath5k_hw_set_rxdp - Set RX Descriptor's address
Definition: ath5k_dma.c:103
ath5k_hw_start_rx_pcu
void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah)
ath5k_hw_start_rx_pcu - Start RX engine
Definition: ath5k_pcu.c:385
ath5k_buf::list
struct list_head list
Definition: base.h:57
ath5k_softc::rxbufsize
unsigned int rxbufsize
Definition: base.h:119
ath5k_buf
Definition: base.h:56
ath5k_buf::daddr
u32 daddr
Definition: base.h:60
ath5k_rxbuf_setup
static int ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
Definition: ath5k.c:771
ath5k_softc::cachelsz
u16 cachelsz
Definition: base.h:102
ah
uint8_t ah
Definition: registers.h:85
list_entry
#define list_entry(list, type, member)
Get the container of a list entry.
Definition: list.h:322
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_softc::rxlink
u32 * rxlink
Definition: base.h:121
ath5k_mode_setup
static void ath5k_mode_setup(struct ath5k_softc *sc)
Definition: ath5k.c:687
IEEE80211_MAX_LEN
#define IEEE80211_MAX_LEN
Definition: ath5k.h:160

References ah, ath5k_softc::ah, ath5k_hw_set_rxdp(), ath5k_hw_start_rx_dma(), ath5k_hw_start_rx_pcu(), ath5k_mode_setup(), ath5k_rxbuf_setup(), ath5k_softc::cachelsz, ath5k_buf::daddr, IEEE80211_MAX_LEN, ath5k_buf::list, list_entry, list_for_each_entry, list_head::next, NULL, ath5k_softc::rxbuf, ath5k_softc::rxbufsize, and ath5k_softc::rxlink.

Referenced by ath5k_reset().

◆ ath5k_rx_stop()

static void ath5k_rx_stop ( struct ath5k_softc *  sc)
static

Definition at line 1083 of file ath5k.c.

1084 {
1085  struct ath5k_hw *ah = sc->ah;
1086 
1087  ath5k_hw_stop_rx_pcu(ah); /* disable PCU */
1088  ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */
1089  ath5k_hw_stop_rx_dma(ah); /* disable DMA engine */
1090 
1091  sc->rxlink = NULL; /* just in case */
1092 }
ath5k_hw_stop_rx_dma
int ath5k_hw_stop_rx_dma(struct ath5k_hw *ah)
ath5k_hw_stop_rx_dma - Stop DMA receive
Definition: ath5k_dma.c:66
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_hw_set_rx_filter
void ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter)
ath5k_hw_set_rx_filter - Set rx filter
Definition: ath5k_pcu.c:454
ath5k_hw_stop_rx_pcu
void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah)
at5k_hw_stop_rx_pcu - Stop RX engine
Definition: ath5k_pcu.c:399
ah
uint8_t ah
Definition: registers.h:85
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_softc::rxlink
u32 * rxlink
Definition: base.h:121

References ah, ath5k_softc::ah, ath5k_hw_set_rx_filter(), ath5k_hw_stop_rx_dma(), ath5k_hw_stop_rx_pcu(), NULL, and ath5k_softc::rxlink.

Referenced by ath5k_reset(), and ath5k_stop_hw().

◆ ath5k_tx_processq()

static void ath5k_tx_processq ( struct ath5k_softc *  sc,
struct ath5k_txq *  txq 
)
static

Definition at line 1228 of file ath5k.c.

1229 {
1230  struct ath5k_tx_status ts;
1231  struct ath5k_buf *bf, *bf0;
1232  struct ath5k_desc *ds;
1233  struct io_buffer *iob;
1234  int ret;
1235 
1236  memset(&ts, 0, sizeof(ts));
1237 
1238  list_for_each_entry_safe(bf, bf0, &txq->q, list) {
1239  ds = bf->desc;
1240 
1241  ret = sc->ah->ah_proc_tx_desc(sc->ah, ds, &ts);
1242  if (ret) {
1243  if (ret != -EINPROGRESS) {
1244  DBG("ath5k: error in processing tx desc: %s\n",
1245  strerror(ret));
1246  } else {
1247  /* normal return, reached end of tx completions */
1248  }
1249  break;
1250  }
1251 
1252  iob = bf->iob;
1253  bf->iob = NULL;
1254 
1255  DBG2("ath5k: tx %zd bytes complete, %d retries\n",
1256  iob_len(iob), ts.ts_retry[0]);
1257 
1258  net80211_tx_complete(sc->dev, iob, ts.ts_retry[0],
1259  ts.ts_status ? EIO : 0);
1260 
1261  list_del(&bf->list);
1262  list_add_tail(&bf->list, &sc->txbuf);
1263  sc->txbuf_len++;
1264  }
1265 
1266  if (list_empty(&txq->q))
1267  txq->link = NULL;
1268 }
ath5k_hw::ah_proc_tx_desc
int(* ah_proc_tx_desc)(struct ath5k_hw *, struct ath5k_desc *, struct ath5k_tx_status *)
Definition: ath5k.h:1062
ath5k_desc
Definition: desc.h:315
list_empty
#define list_empty(list)
Test whether a list is empty.
Definition: list.h:137
ath5k_softc::txbuf_len
unsigned int txbuf_len
Definition: base.h:124
list_del
#define list_del(list)
Delete an entry from a list.
Definition: list.h:120
ath5k_buf::iob
struct io_buffer * iob
Definition: base.h:61
ath5k_txq::link
u32 * link
Definition: base.h:76
list_add_tail
#define list_add_tail(new, head)
Add a new entry to the tail of a list.
Definition: list.h:94
ath5k_txq::q
struct list_head q
Definition: base.h:77
list_for_each_entry_safe
#define list_for_each_entry_safe(pos, tmp, head, member)
Iterate over entries in a list, safe against deletion of the current entry.
Definition: list.h:459
EINPROGRESS
#define EINPROGRESS
Operation in progress.
Definition: errno.h:419
ath5k_buf::list
struct list_head list
Definition: base.h:57
strerror
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:79
iob_len
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:160
ath5k_tx_status
Definition: ath5k.h:418
net80211_tx_complete
void net80211_tx_complete(struct net80211_device *dev, struct io_buffer *iob, int retries, int rc)
Indicate the completed transmission of a packet.
Definition: net80211.c:2809
ds
uint32_t ds
Definition: librm.h:140
ath5k_buf
Definition: base.h:56
ath5k_buf::desc
struct ath5k_desc * desc
Definition: base.h:59
io_buffer::list
struct list_head list
List of which this buffer is a member.
Definition: iobuf.h:45
EIO
#define EIO
Input/output error.
Definition: errno.h:434
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_softc::txbuf
struct list_head txbuf
Definition: base.h:123
DBG2
#define DBG2(...)
Definition: compiler.h:515
memset
void * memset(void *dest, int character, size_t len) __nonnull
io_buffer
A persistent I/O buffer.
Definition: iobuf.h:38

References ath5k_softc::ah, ath5k_hw::ah_proc_tx_desc, DBG, DBG2, ath5k_buf::desc, ath5k_softc::dev, ds, EINPROGRESS, EIO, ath5k_buf::iob, iob_len(), ath5k_txq::link, ath5k_buf::list, io_buffer::list, list_add_tail, list_del, list_empty, list_for_each_entry_safe, memset(), net80211_tx_complete(), NULL, ath5k_txq::q, strerror(), ath5k_tx_status::ts_retry, ath5k_tx_status::ts_status, ath5k_softc::txbuf, and ath5k_softc::txbuf_len.

Referenced by ath5k_handle_tx().

◆ ath5k_init()

static int ath5k_init ( struct ath5k_softc *  sc)
static

Definition at line 1295 of file ath5k.c.

1296 {
1297  struct ath5k_hw *ah = sc->ah;
1298  int ret, i;
1299 
1300  /*
1301  * Stop anything previously setup. This is safe
1302  * no matter this is the first time through or not.
1303  */
1304  ath5k_stop_hw(sc);
1305 
1306  /*
1307  * The basic interface to setting the hardware in a good
1308  * state is ``reset''. On return the hardware is known to
1309  * be powered up and with interrupts disabled. This must
1310  * be followed by initialization of the appropriate bits
1311  * and then setup of the interrupt mask.
1312  */
1313  sc->curchan = sc->dev->channels + sc->dev->channel;
1314  sc->curband = sc->curchan->band;
1315  sc->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL |
1316  AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL |
1317  AR5K_INT_FATAL | AR5K_INT_GLOBAL;
1318  ret = ath5k_reset(sc, NULL);
1319  if (ret)
1320  goto done;
1321 
1322  ath5k_rfkill_hw_start(ah);
1323 
1324  /*
1325  * Reset the key cache since some parts do not reset the
1326  * contents on initial power up or resume from suspend.
1327  */
1328  for (i = 0; i < AR5K_KEYTABLE_SIZE; i++)
1329  ath5k_hw_reset_key(ah, i);
1330 
1331  /* Set ack to be sent at low bit-rates */
1332  ath5k_hw_set_ack_bitrate_high(ah, 0);
1333 
1334  ret = 0;
1335 done:
1336  mb();
1337  return ret;
1338 }
ath5k_hw_reset_key
int ath5k_hw_reset_key(struct ath5k_hw *ah, u16 entry)
Definition: ath5k_pcu.c:497
net80211_device::channel
u8 channel
The channel currently in use, as an index into the channels array.
Definition: net80211.h:812
AR5K_KEYTABLE_SIZE
#define AR5K_KEYTABLE_SIZE
Definition: reg.h:1853
ath5k_hw_set_ack_bitrate_high
void ath5k_hw_set_ack_bitrate_high(struct ath5k_hw *ah, int high)
ath5k_hw_set_ack_bitrate - set bitrate for ACKs
Definition: ath5k_pcu.c:96
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_rfkill_hw_start
void ath5k_rfkill_hw_start(struct ath5k_hw *ah)
Definition: ath5k_rfkill.c:81
ath5k_softc::curband
int curband
Definition: base.h:95
ath5k_softc::imask
enum ath5k_int imask
Definition: base.h:115
ath5k_stop_hw
static int ath5k_stop_hw(struct ath5k_softc *sc)
Definition: ath5k.c:1341
net80211_channel::band
u8 band
The band with which this channel is associated.
Definition: net80211.h:388
ath5k_reset
static int ath5k_reset(struct ath5k_softc *sc, struct net80211_channel *chan)
Definition: ath5k.c:1498
ath5k_softc::curchan
struct net80211_channel * curchan
Definition: base.h:113
net80211_device::channels
struct net80211_channel channels[NET80211_MAX_CHANNELS]
A list of all possible channels we might use.
Definition: net80211.h:806
ah
uint8_t ah
Definition: registers.h:85
mb
void mb(void)
Memory barrier.
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
done
struct bofm_section_header done
Definition: bofm_test.c:46

References ah, ath5k_softc::ah, AR5K_INT_FATAL, AR5K_INT_GLOBAL, AR5K_INT_RXEOL, AR5K_INT_RXERR, AR5K_INT_RXOK, AR5K_INT_RXORN, AR5K_INT_TXDESC, AR5K_INT_TXEOL, AR5K_KEYTABLE_SIZE, ath5k_hw_reset_key(), ath5k_hw_set_ack_bitrate_high(), ath5k_reset(), ath5k_rfkill_hw_start(), ath5k_stop_hw(), net80211_channel::band, net80211_device::channel, net80211_device::channels, ath5k_softc::curband, ath5k_softc::curchan, ath5k_softc::dev, done, ath5k_softc::imask, mb(), and NULL.

Referenced by ath5k_start().

◆ ath5k_stop_hw()

static int ath5k_stop_hw ( struct ath5k_softc *  sc)
static

Definition at line 1341 of file ath5k.c.

1342 {
1343  struct ath5k_hw *ah = sc->ah;
1344 
1345  /*
1346  * Shutdown the hardware and driver:
1347  * stop output from above
1348  * disable interrupts
1349  * turn off timers
1350  * turn off the radio
1351  * clear transmit machinery
1352  * clear receive machinery
1353  * drain and release tx queues
1354  * reclaim beacon resources
1355  * power down hardware
1356  *
1357  * Note that some of this work is not possible if the
1358  * hardware is gone (invalid).
1359  */
1360 
1361  if (!(sc->status & ATH_STAT_INVALID)) {
1362  ath5k_hw_set_imr(ah, 0);
1363  }
1364  ath5k_txq_cleanup(sc);
1365  if (!(sc->status & ATH_STAT_INVALID)) {
1366  ath5k_rx_stop(sc);
1367  ath5k_hw_phy_disable(ah);
1368  } else
1369  sc->rxlink = NULL;
1370 
1371  ath5k_rfkill_hw_stop(sc->ah);
1372 
1373  return 0;
1374 }
ath5k_txq_cleanup
static void ath5k_txq_cleanup(struct ath5k_softc *sc)
Definition: ath5k.c:1012
ATH_STAT_INVALID
#define ATH_STAT_INVALID
Definition: base.h:105
ath5k_hw_phy_disable
int ath5k_hw_phy_disable(struct ath5k_hw *ah)
Definition: ath5k_phy.c:1359
ath5k_rfkill_hw_stop
void ath5k_rfkill_hw_stop(struct ath5k_hw *ah)
Definition: ath5k_rfkill.c:98
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_hw_set_imr
enum ath5k_int ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask)
ath5k_hw_set_imr - Set interrupt mask
Definition: ath5k_dma.c:549
ath5k_softc::status
int status
Definition: base.h:104
ah
uint8_t ah
Definition: registers.h:85
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_softc::rxlink
u32 * rxlink
Definition: base.h:121
ath5k_rx_stop
static void ath5k_rx_stop(struct ath5k_softc *sc)
Definition: ath5k.c:1083

References ah, ath5k_softc::ah, ath5k_hw_phy_disable(), ath5k_hw_set_imr(), ath5k_rfkill_hw_stop(), ath5k_rx_stop(), ath5k_txq_cleanup(), ATH_STAT_INVALID, NULL, ath5k_softc::rxlink, and ath5k_softc::status.

Referenced by ath5k_init(), and ath5k_stop().

◆ ath5k_calibrate()

static void ath5k_calibrate ( struct ath5k_softc *  sc)
static

Definition at line 1439 of file ath5k.c.

1440 {
1441  struct ath5k_hw *ah = sc->ah;
1442 
1443  if (ath5k_hw_gainf_calibrate(ah) == AR5K_RFGAIN_NEED_CHANGE) {
1444  /*
1445  * Rfgain is out of bounds, reset the chip
1446  * to load new gain values.
1447  */
1448  DBG("ath5k: resetting for calibration\n");
1449  ath5k_reset_wake(sc);
1450  }
1451  if (ath5k_hw_phy_calibrate(ah, sc->curchan))
1452  DBG("ath5k: calibration of channel %d failed\n",
1453  sc->curchan->channel_nr);
1454 }
ath5k_reset_wake
static int ath5k_reset_wake(struct ath5k_softc *sc)
Definition: ath5k.c:1541
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_softc::curchan
struct net80211_channel * curchan
Definition: base.h:113
ath5k_hw_gainf_calibrate
enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah)
Definition: ath5k_phy.c:390
ah
uint8_t ah
Definition: registers.h:85
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
net80211_channel::channel_nr
u8 channel_nr
A channel number interpreted according to the band.
Definition: net80211.h:405
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
ath5k_hw_phy_calibrate
int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, struct net80211_channel *channel)
Definition: ath5k_phy.c:1346

References ah, ath5k_softc::ah, AR5K_RFGAIN_NEED_CHANGE, ath5k_hw_gainf_calibrate(), ath5k_hw_phy_calibrate(), ath5k_reset_wake(), net80211_channel::channel_nr, ath5k_softc::curchan, and DBG.

Referenced by ath5k_poll().

◆ ath5k_configure_filter()

static void ath5k_configure_filter ( struct ath5k_softc *  sc)
static

Definition at line 1637 of file ath5k.c.

1638 {
1639  struct ath5k_hw *ah = sc->ah;
1640  u32 mfilt[2], rfilt;
1641 
1642  /* Enable all multicast */
1643  mfilt[0] = ~0;
1644  mfilt[1] = ~0;
1645 
1646  /* Enable data frames and beacons */
1647  rfilt = (AR5K_RX_FILTER_UCAST | AR5K_RX_FILTER_BCAST |
1648  AR5K_RX_FILTER_MCAST | AR5K_RX_FILTER_BEACON);
1649 
1650  /* Set filters */
1651  ath5k_hw_set_rx_filter(ah, rfilt);
1652 
1653  /* Set multicast bits */
1654  ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]);
1655 
1656  /* Set the cached hw filter flags, this will alter actually
1657  * be set in HW */
1658  sc->filter_flags = rfilt;
1659 }
ath5k_hw
ath5k_hw_get_isr - Get interrupt status
Definition: ath5k.h:955
ath5k_hw_set_rx_filter
void ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter)
ath5k_hw_set_rx_filter - Set rx filter
Definition: ath5k_pcu.c:454
AR5K_RX_FILTER_BEACON
#define AR5K_RX_FILTER_BEACON
Definition: reg.h:1333
ath5k_softc::filter_flags
unsigned int filter_flags
Definition: base.h:111
AR5K_RX_FILTER_BCAST
#define AR5K_RX_FILTER_BCAST
Definition: reg.h:1331
ath5k_hw_set_mcast_filter
void ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1)
Definition: ath5k_pcu.c:407
AR5K_RX_FILTER_UCAST
#define AR5K_RX_FILTER_UCAST
Definition: reg.h:1329
ah
uint8_t ah
Definition: registers.h:85
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
u32
uint32_t u32
Definition: stdint.h:24
AR5K_RX_FILTER_MCAST
#define AR5K_RX_FILTER_MCAST
Definition: reg.h:1330

References ah, ath5k_softc::ah, AR5K_RX_FILTER_BCAST, AR5K_RX_FILTER_BEACON, AR5K_RX_FILTER_MCAST, AR5K_RX_FILTER_UCAST, ath5k_hw_set_mcast_filter(), ath5k_hw_set_rx_filter(), and ath5k_softc::filter_flags.

Referenced by ath5k_start().

◆ ath5k_ieee2mhz()

static short ath5k_ieee2mhz ( short  chan)
inlinestatic

Definition at line 513 of file ath5k.c.

514 {
515  if (chan < 14)
516  return 2407 + 5 * chan;
517  if (chan == 14)
518  return 2484;
519  if (chan < 27)
520  return 2212 + 20 * chan;
521  return 5000 + 5 * chan;
522 }

Referenced by ath5k_copy_channels().

◆ ath5k_hw_rix_to_bitrate()

static int ath5k_hw_rix_to_bitrate ( int  hw_rix)
inlinestatic

Definition at line 706 of file ath5k.c.

707 {
708  int i;
709 
710  for (i = 0; i < ATH5K_NR_RATES; i++) {
711  if (ath5k_rates[i].hw_code == hw_rix)
712  return ath5k_rates[i].bitrate;
713  }
714 
715  DBG("ath5k: invalid rix %02x\n", hw_rix);
716  return 10; /* use lowest rate */
717 }
ATH5K_NR_RATES
#define ATH5K_NR_RATES
Definition: ath5k.c:116
hw_code
u8 hw_code
Definition: ath5k.c:96
ath5k_rates
static const struct @10 ath5k_rates[]
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498

References ATH5K_NR_RATES, ath5k_rates, DBG, and hw_code.

Referenced by ath5k_handle_rx().

◆ ath5k_bitrate_to_hw_rix()

int ath5k_bitrate_to_hw_rix ( int  bitrate)

Definition at line 719 of file ath5k.c.

720 {
721  int i;
722 
723  for (i = 0; i < ATH5K_NR_RATES; i++) {
724  if (ath5k_rates[i].bitrate == bitrate)
725  return ath5k_rates[i].hw_code;
726  }
727 
728  DBG("ath5k: invalid bitrate %d\n", bitrate);
729  return ATH5K_RATE_CODE_1M; /* use lowest rate */
730 }
ATH5K_NR_RATES
#define ATH5K_NR_RATES
Definition: ath5k.c:116
ath5k_rates
static const struct @10 ath5k_rates[]
bitrate
u16 bitrate
Definition: ath5k.c:94
ATH5K_RATE_CODE_1M
#define ATH5K_RATE_CODE_1M
Definition: ath5k.h:708
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498

References ATH5K_NR_RATES, ATH5K_RATE_CODE_1M, ath5k_rates, bitrate, and DBG.

Referenced by ath5k_hw_write_rate_duration().

◆ ath5k_rx_iob_alloc()

static struct io_buffer* ath5k_rx_iob_alloc ( struct ath5k_softc *  sc,
u32 *  iob_addr 
)
static

Definition at line 737 of file ath5k.c.

738 {
739  struct io_buffer *iob;
740  unsigned int off;
741 
742  /*
743  * Allocate buffer with headroom_needed space for the
744  * fake physical layer header at the start.
745  */
746  iob = alloc_iob(sc->rxbufsize + sc->cachelsz - 1);
747 
748  if (!iob) {
749  DBG("ath5k: can't alloc iobuf of size %d\n",
750  sc->rxbufsize + sc->cachelsz - 1);
751  return NULL;
752  }
753 
754  *iob_addr = virt_to_bus(iob->data);
755 
756  /*
757  * Cache-line-align. This is important (for the
758  * 5210 at least) as not doing so causes bogus data
759  * in rx'd frames.
760  */
761  off = *iob_addr % sc->cachelsz;
762  if (off != 0) {
763  iob_reserve(iob, sc->cachelsz - off);
764  *iob_addr += sc->cachelsz - off;
765  }
766 
767  return iob;
768 }
alloc_iob
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:131
virt_to_bus
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:184
ath5k_softc::rxbufsize
unsigned int rxbufsize
Definition: base.h:119
iob_reserve
#define iob_reserve(iobuf, len)
Definition: iobuf.h:72
ath5k_softc::cachelsz
u16 cachelsz
Definition: base.h:102
io_buffer::data
void * data
Start of data.
Definition: iobuf.h:53
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
io_buffer
A persistent I/O buffer.
Definition: iobuf.h:38

References alloc_iob(), ath5k_softc::cachelsz, io_buffer::data, DBG, iob_reserve, NULL, ath5k_softc::rxbufsize, and virt_to_bus().

Referenced by ath5k_handle_rx(), and ath5k_rxbuf_setup().

◆ ath5k_handle_rx()

static void ath5k_handle_rx ( struct ath5k_softc *  sc)
static

Definition at line 1095 of file ath5k.c.

1096 {
1097  struct ath5k_rx_status rs;
1098  struct io_buffer *iob, *next_iob;
1099  u32 next_iob_addr;
1100  struct ath5k_buf *bf, *bf_last;
1101  struct ath5k_desc *ds;
1102  int ret;
1103 
1104  memset(&rs, 0, sizeof(rs));
1105 
1106  if (list_empty(&sc->rxbuf)) {
1107  DBG("ath5k: empty rx buf pool\n");
1108  return;
1109  }
1110 
1111  bf_last = list_entry(sc->rxbuf.prev, struct ath5k_buf, list);
1112 
1113  do {
1114  bf = list_entry(sc->rxbuf.next, struct ath5k_buf, list);
1115  assert(bf->iob != NULL);
1116  iob = bf->iob;
1117  ds = bf->desc;
1118 
1119  /*
1120  * last buffer must not be freed to ensure proper hardware
1121  * function. When the hardware finishes also a packet next to
1122  * it, we are sure, it doesn't use it anymore and we can go on.
1123  */
1124  if (bf_last == bf)
1125  bf->flags |= 1;
1126  if (bf->flags) {
1127  struct ath5k_buf *bf_next = list_entry(bf->list.next,
1128  struct ath5k_buf, list);
1129  ret = sc->ah->ah_proc_rx_desc(sc->ah, bf_next->desc,
1130  &rs);
1131  if (ret)
1132  break;
1133  bf->flags &= ~1;
1134  /* skip the overwritten one (even status is martian) */
1135  goto next;
1136  }
1137 
1138  ret = sc->ah->ah_proc_rx_desc(sc->ah, ds, &rs);
1139  if (ret) {
1140  if (ret != -EINPROGRESS) {
1141  DBG("ath5k: error in processing rx desc: %s\n",
1142  strerror(ret));
1143  net80211_rx_err(sc->dev, NULL, -ret);
1144  } else {
1145  /* normal return, reached end of
1146  available descriptors */
1147  }
1148  return;
1149  }
1150 
1151  if (rs.rs_more) {
1152  DBG("ath5k: unsupported fragmented rx\n");
1153  goto next;
1154  }
1155 
1156  if (rs.rs_status) {
1157  if (rs.rs_status & AR5K_RXERR_PHY) {
1158  /* These are uncommon, and may indicate a real problem. */
1159  net80211_rx_err(sc->dev, NULL, EIO);
1160  goto next;
1161  }
1162  if (rs.rs_status & AR5K_RXERR_CRC) {
1163  /* These occur *all the time*. */
1164  goto next;
1165  }
1166  if (rs.rs_status & AR5K_RXERR_DECRYPT) {
1167  /*
1168  * Decrypt error. If the error occurred
1169  * because there was no hardware key, then
1170  * let the frame through so the upper layers
1171  * can process it. This is necessary for 5210
1172  * parts which have no way to setup a ``clear''
1173  * key cache entry.
1174  *
1175  * XXX do key cache faulting
1176  */
1177  if (rs.rs_keyix == AR5K_RXKEYIX_INVALID &&
1178  !(rs.rs_status & AR5K_RXERR_CRC))
1179  goto accept;
1180  }
1181 
1182  /* any other error, unhandled */
1183  DBG("ath5k: packet rx status %x\n", rs.rs_status);
1184  goto next;
1185  }
1186 accept:
1187  next_iob = ath5k_rx_iob_alloc(sc, &next_iob_addr);
1188 
1189  /*
1190  * If we can't replace bf->iob with a new iob under memory
1191  * pressure, just skip this packet
1192  */
1193  if (!next_iob) {
1194  DBG("ath5k: dropping packet under memory pressure\n");
1195  goto next;
1196  }
1197 
1198  iob_put(iob, rs.rs_datalen);
1199 
1200  /* The MAC header is padded to have 32-bit boundary if the
1201  * packet payload is non-zero. However, iPXE only
1202  * supports standard 802.11 packets with 24-byte
1203  * header, so no padding correction should be needed.
1204  */
1205 
1206  DBG2("ath5k: rx %d bytes, signal %d\n", rs.rs_datalen,
1207  rs.rs_rssi);
1208 
1209  net80211_rx(sc->dev, iob, rs.rs_rssi,
1210  ath5k_hw_rix_to_bitrate(rs.rs_rate));
1211 
1212  bf->iob = next_iob;
1213  bf->iobaddr = next_iob_addr;
1214 next:
1215  list_del(&bf->list);
1216  list_add_tail(&bf->list, &sc->rxbuf);
1217  } while (ath5k_rxbuf_setup(sc, bf) == 0);
1218 }
AR5K_RXERR_PHY
#define AR5K_RXERR_PHY
Definition: ath5k.h:582
iob_put
#define iob_put(iobuf, len)
Definition: iobuf.h:125
ath5k_rx_iob_alloc
static struct io_buffer * ath5k_rx_iob_alloc(struct ath5k_softc *sc, u32 *iob_addr)
Definition: ath5k.c:737
ath5k_desc
Definition: desc.h:315
list_head::next
struct list_head * next
Next list entry.
Definition: list.h:21
ath5k_hw_rix_to_bitrate
static int ath5k_hw_rix_to_bitrate(int hw_rix)
Definition: ath5k.c:706
net80211_rx_err
void net80211_rx_err(struct net80211_device *dev, struct io_buffer *iob, int rc)
Indicate an error in receiving a packet.
Definition: net80211.c:2789
ath5k_softc::rxbuf
struct list_head rxbuf
Definition: base.h:120
net80211_rx
void net80211_rx(struct net80211_device *dev, struct io_buffer *iob, int signal, u16 rate)
Handle receipt of 802.11 frame.
Definition: net80211.c:2690
AR5K_RXERR_CRC
#define AR5K_RXERR_CRC
Definition: ath5k.h:581
AR5K_RXERR_DECRYPT
#define AR5K_RXERR_DECRYPT
Definition: ath5k.h:584
list_empty
#define list_empty(list)
Test whether a list is empty.
Definition: list.h:137
AR5K_RXKEYIX_INVALID
#define AR5K_RXKEYIX_INVALID
Definition: ath5k.h:586
list_del
#define list_del(list)
Delete an entry from a list.
Definition: list.h:120
ath5k_buf::iob
struct io_buffer * iob
Definition: base.h:61
assert
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
list_add_tail
#define list_add_tail(new, head)
Add a new entry to the tail of a list.
Definition: list.h:94
EINPROGRESS
#define EINPROGRESS
Operation in progress.
Definition: errno.h:419
ath5k_buf::list
struct list_head list
Definition: base.h:57
strerror
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:79
next
uint32_t next
Next descriptor address.
Definition: dwmac.h:22
ds
uint32_t ds
Definition: librm.h:140
ath5k_rx_status
Definition: ath5k.h:569
ath5k_buf
Definition: base.h:56
ath5k_hw::ah_proc_rx_desc
int(* ah_proc_rx_desc)(struct ath5k_hw *, struct ath5k_desc *, struct ath5k_rx_status *)
Definition: ath5k.h:1064
ath5k_rxbuf_setup
static int ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
Definition: ath5k.c:771
ath5k_buf::desc
struct ath5k_desc * desc
Definition: base.h:59
list_head::prev
struct list_head * prev
Previous list entry.
Definition: list.h:23
EIO
#define EIO
Input/output error.
Definition: errno.h:434
ath5k_softc::dev
struct net80211_device * dev
Definition: base.h:92
DBG
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
list_entry
#define list_entry(list, type, member)
Get the container of a list entry.
Definition: list.h:322
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:322
ath5k_buf::flags
unsigned int flags
Definition: base.h:58
ath5k_softc::ah
struct ath5k_hw * ah
Definition: base.h:93
u32
uint32_t u32
Definition: stdint.h:24
DBG2
#define DBG2(...)
Definition: compiler.h:515
memset
void * memset(void *dest, int character, size_t len) __nonnull
ath5k_buf::iobaddr
u32 iobaddr
Definition: base.h:62
io_buffer
A persistent I/O buffer.
Definition: iobuf.h:38

References ath5k_softc::ah, ath5k_hw::ah_proc_rx_desc, AR5K_RXERR_CRC, AR5K_RXERR_DECRYPT, AR5K_RXERR_PHY, AR5K_RXKEYIX_INVALID, assert(), ath5k_hw_rix_to_bitrate(), ath5k_rx_iob_alloc(), ath5k_rxbuf_setup(), DBG, DBG2, ath5k_buf::desc, ath5k_softc::dev, ds, EINPROGRESS, EIO, ath5k_buf::flags, ath5k_buf::iob, iob_put, ath5k_buf::iobaddr, ath5k_buf::list, list_add_tail, list_del, list_empty, list_entry, memset(), net80211_rx(), net80211_rx_err(), list_head::next, next, NULL, list_head::prev, ath5k_rx_status::rs_datalen, ath5k_rx_status::rs_keyix, ath5k_rx_status::rs_more, ath5k_rx_status::rs_rate, ath5k_rx_status::rs_rssi, ath5k_rx_status::rs_status, ath5k_softc::rxbuf, and strerror().

Referenced by ath5k_poll().

◆ ath5k_handle_tx()

static void ath5k_handle_tx ( struct ath5k_softc *  sc)
static

Definition at line 1271 of file ath5k.c.

1272 {
1273  ath5k_tx_processq(sc, &sc->txq);
1274 }
ath5k_softc::txq
struct ath5k_txq txq
Definition: base.h:125
ath5k_tx_processq
static void ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
Definition: ath5k.c:1228

References ath5k_tx_processq(), and ath5k_softc::txq.

Referenced by ath5k_poll().

Variable Documentation

◆ ath5k_nics

struct pci_device_id ath5k_nics[]
static
Initial value:
= {
PCI_ROM(0x10b7, 0x0013, "rdag675", "3com 3CRDAG675", AR5K_AR5212),
PCI_ROM(0x168c, 0x0007, "ath5210", "Atheros 5210", AR5K_AR5210),
PCI_ROM(0x168c, 0x0011, "ath5311", "Atheros 5311 (AHB)", AR5K_AR5211),
PCI_ROM(0x168c, 0x0012, "ath5211", "Atheros 5211", AR5K_AR5211),
PCI_ROM(0x168c, 0x0013, "ath5212", "Atheros 5212", AR5K_AR5212),
PCI_ROM(0x168c, 0x0014, "ath5212x14", "Atheros 5212 x14", AR5K_AR5212),
PCI_ROM(0x168c, 0x0015, "ath5212x15", "Atheros 5212 x15", AR5K_AR5212),
PCI_ROM(0x168c, 0x0016, "ath5212x16", "Atheros 5212 x16", AR5K_AR5212),
PCI_ROM(0x168c, 0x0017, "ath5212x17", "Atheros 5212 x17", AR5K_AR5212),
PCI_ROM(0x168c, 0x0018, "ath5212x18", "Atheros 5212 x18", AR5K_AR5212),
PCI_ROM(0x168c, 0x0019, "ath5212x19", "Atheros 5212 x19", AR5K_AR5212),
PCI_ROM(0x168c, 0x001a, "ath2413", "Atheros 2413 Griffin", AR5K_AR5212),
PCI_ROM(0x168c, 0x001b, "ath5413", "Atheros 5413 Eagle", AR5K_AR5212),
PCI_ROM(0x168c, 0x001c, "ath5212e", "Atheros 5212 PCI-E", AR5K_AR5212),
PCI_ROM(0x168c, 0x001d, "ath2417", "Atheros 2417 Nala", AR5K_AR5212),
PCI_ROM(0x168c, 0x0207, "ath5210e", "Atheros 5210 early", AR5K_AR5210),
PCI_ROM(0x168c, 0x1014, "ath5212m", "Ath 5212 miniPCI", AR5K_AR5212),
PCI_ROM(0xa727, 0x0013, "ath5212c","3com Ath 5212", AR5K_AR5212),
}
PCI_ROM
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:308

Definition at line 68 of file ath5k.c.

◆ bitrate

u16 bitrate

Definition at line 94 of file ath5k.c.

Referenced by ath5k_bitrate_to_hw_rix(), and ath5k_config().

◆ short_pmbl

u8 short_pmbl

Definition at line 95 of file ath5k.c.

Referenced by ath5k_config().

◆ hw_code

u8 hw_code

Definition at line 96 of file ath5k.c.

Referenced by ath5k_hw_rix_to_bitrate().

◆ ath5k_rates

const { ... } ath5k_rates[]
Initial value:
= {
{ 10, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_1M },
{ 20, ATH5K_SPMBL_NO, ATH5K_RATE_CODE_2M },
{ 55, ATH5K_SPMBL_NO, ATH5K_RATE_CODE_5_5M },
{ 110, ATH5K_SPMBL_NO, ATH5K_RATE_CODE_11M },
{ 60, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_6M },
{ 90, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_9M },
{ 120, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_12M },
{ 180, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_18M },
{ 240, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_24M },
{ 360, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_36M },
{ 480, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_48M },
{ 540, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_54M },
{ 20, ATH5K_SPMBL_YES, ATH5K_RATE_CODE_2M | AR5K_SET_SHORT_PREAMBLE },
{ 55, ATH5K_SPMBL_YES, ATH5K_RATE_CODE_5_5M | AR5K_SET_SHORT_PREAMBLE },
{ 110, ATH5K_SPMBL_YES, ATH5K_RATE_CODE_11M | AR5K_SET_SHORT_PREAMBLE },
{ 0, 0, 0 },
}
ATH5K_SPMBL_BOTH
#define ATH5K_SPMBL_BOTH
Definition: ath5k.c:91
ATH5K_RATE_CODE_12M
#define ATH5K_RATE_CODE_12M
Definition: ath5k.h:715
ATH5K_RATE_CODE_36M
#define ATH5K_RATE_CODE_36M
Definition: ath5k.h:718
ATH5K_RATE_CODE_11M
#define ATH5K_RATE_CODE_11M
Definition: ath5k.h:711
ATH5K_RATE_CODE_2M
#define ATH5K_RATE_CODE_2M
Definition: ath5k.h:709
ATH5K_RATE_CODE_6M
#define ATH5K_RATE_CODE_6M
Definition: ath5k.h:713
ATH5K_RATE_CODE_18M
#define ATH5K_RATE_CODE_18M
Definition: ath5k.h:716
AR5K_SET_SHORT_PREAMBLE
#define AR5K_SET_SHORT_PREAMBLE
Definition: ath5k.h:728
ATH5K_RATE_CODE_48M
#define ATH5K_RATE_CODE_48M
Definition: ath5k.h:719
ATH5K_SPMBL_YES
#define ATH5K_SPMBL_YES
Definition: ath5k.c:90
ATH5K_SPMBL_NO
#define ATH5K_SPMBL_NO
Definition: ath5k.c:89
ATH5K_RATE_CODE_5_5M
#define ATH5K_RATE_CODE_5_5M
Definition: ath5k.h:710
ATH5K_RATE_CODE_24M
#define ATH5K_RATE_CODE_24M
Definition: ath5k.h:717
ATH5K_RATE_CODE_1M
#define ATH5K_RATE_CODE_1M
Definition: ath5k.h:708
ATH5K_RATE_CODE_54M
#define ATH5K_RATE_CODE_54M
Definition: ath5k.h:720
ATH5K_RATE_CODE_9M
#define ATH5K_RATE_CODE_9M
Definition: ath5k.h:714

Referenced by ath5k_bitrate_to_hw_rix(), ath5k_config(), ath5k_hw_rix_to_bitrate(), and ath5k_setup_bands().

◆ __pci_driver

struct pci_driver ath5k_pci_driver __pci_driver
Initial value:
= {
.ids = ath5k_nics,
.id_count = sizeof(ath5k_nics) / sizeof(ath5k_nics[0]),
.probe = ath5k_probe,
.remove = ath5k_remove,
}
ath5k_remove
static void ath5k_remove(struct pci_device *pdev)
Definition: ath5k.c:404
ath5k_nics
static struct pci_device_id ath5k_nics[]
Definition: ath5k.c:68
ath5k_probe
static int ath5k_probe(struct pci_device *pdev)
Definition: ath5k.c:247

Definition at line 124 of file ath5k.c.

◆ ath5k_ops

struct net80211_device_operations ath5k_ops
static
Initial value:
= {
.open = ath5k_start,
.close = ath5k_stop,
.transmit = ath5k_tx,
.poll = ath5k_poll,
.irq = ath5k_irq,
.config = ath5k_config,
}
ath5k_config
static int ath5k_config(struct net80211_device *dev, int changed)
Definition: ath5k.c:1572
ath5k_poll
static void ath5k_poll(struct net80211_device *dev)
Definition: ath5k.c:1377
ath5k_start
static int ath5k_start(struct net80211_device *dev)
Definition: ath5k.c:1546
ath5k_irq
static void ath5k_irq(struct net80211_device *dev, int enable)
Definition: ath5k.c:1282
ath5k_stop
static void ath5k_stop(struct net80211_device *dev)
Definition: ath5k.c:1561
ath5k_tx
static int ath5k_tx(struct net80211_device *dev, struct io_buffer *skb)
Definition: ath5k.c:1462

Definition at line 145 of file ath5k.c.

Referenced by ath5k_attach().

Generated by   doxygen 1.8.15