iPXE
ath9k.c
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1 /*
2  * Copyright (c) 2008-2011 Atheros Communications Inc.
3  *
4  * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
5  * Original from Linux kernel 3.0.1
6  *
7  * Permission to use, copy, modify, and/or distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #include <ipxe/pci.h>
21 
22 #include "ath9k.h"
23 
24 static struct pci_device_id ath_pci_id_table[] = {
25  PCI_ROM(0x168c, 0x0023, "ar5416", "Atheros 5416 PCI", 0), /* PCI */
26  PCI_ROM(0x168c, 0x0024, "ar5416", "Atheros 5416 PCI-E", 0), /* PCI-E */
27  PCI_ROM(0x168c, 0x0027, "ar9160", "Atheros 9160 PCI", 0), /* PCI */
28  PCI_ROM(0x168c, 0x0029, "ar9280", "Atheros 9280 PCI", 0), /* PCI */
29  PCI_ROM(0x168c, 0x002A, "ar9280", "Atheros 9280 PCI-E", 0), /* PCI-E */
30  PCI_ROM(0x168c, 0x002B, "ar9285", "Atheros 9285 PCI-E", 0), /* PCI-E */
31  PCI_ROM(0x168c, 0x002C, "ar2427", "Atheros 2427 PCI-E", 0), /* PCI-E 802.11n bonded out */
32  PCI_ROM(0x168c, 0x002D, "ar9287", "Atheros 9287 PCI", 0), /* PCI */
33  PCI_ROM(0x168c, 0x002E, "ar9287", "Atheros 9287 PCI-E", 0), /* PCI-E */
34  PCI_ROM(0x168c, 0x0030, "ar9300", "Atheros 9300 PCI-E", 0), /* PCI-E AR9300 */
35  PCI_ROM(0x168c, 0x0032, "ar9485", "Atheros 9485 PCI-E", 0), /* PCI-E AR9485 */
36 };
37 
38 
39 /* return bus cachesize in 4B word units */
40 static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
41 {
42  struct ath_softc *sc = (struct ath_softc *) common->priv;
43  u8 u8tmp;
44 
46  *csz = (int)u8tmp;
47 
48  /*
49  * This check was put in to avoid "unpleasant" consequences if
50  * the bootrom has not fully initialized all PCI devices.
51  * Sometimes the cache line size register is not set
52  */
53 
54  if (*csz == 0)
55  *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
56 }
57 
58 static int ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
59 {
60  struct ath_hw *ah = (struct ath_hw *) common->ah;
61 
62  common->ops->read(ah, AR5416_EEPROM_OFFSET +
63  (off << AR5416_EEPROM_S));
64 
65  if (!ath9k_hw_wait(ah,
69  AH_WAIT_TIMEOUT)) {
70  return 0;
71  }
72 
73  *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
75 
76  return 1;
77 }
78 
80 {
81  struct ath_softc *sc = (struct ath_softc *) common->priv;
82  struct pci_device *pdev = sc->pdev;
83  u8 lnkctl;
84 
86  lnkctl |= 0x0080;
88 }
89 
90 static const struct ath_bus_ops ath_pci_bus_ops = {
92  .read_cachesize = ath_pci_read_cachesize,
93  .eeprom_read = ath_pci_eeprom_read,
94  .extn_synch_en = ath_pci_extn_synch_enable,
95 };
96 
97 static int ath_pci_probe(struct pci_device *pdev)
98 {
99  void *mem;
100  struct ath_softc *sc;
101  struct net80211_device *dev;
102  u8 csz;
103  u16 subsysid;
104  u32 val;
105  int ret = 0;
106  char hw_name[64];
107 
108  adjust_pci_device(pdev);
109 
110  /*
111  * Cache line size is used to size and align various
112  * structures used to communicate with the hardware.
113  */
115  if (csz == 0) {
116  /*
117  * Linux 2.4.18 (at least) writes the cache line size
118  * register as a 16-bit wide register which is wrong.
119  * We must have this setup properly for rx buffer
120  * DMA to work so force a reasonable value here if it
121  * comes up zero.
122  */
123  csz =16;
125  }
126  /*
127  * The default setting of latency timer yields poor results,
128  * set it to the value used by other systems. It may be worth
129  * tweaking this setting more.
130  */
132 
133  /*
134  * Disable the RETRY_TIMEOUT register (0x41) to keep
135  * PCI Tx retries from interfering with C3 CPU state.
136  */
137  pci_read_config_dword(pdev, 0x40, &val);
138  if ((val & 0x0000ff00) != 0)
139  pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
140 
141  mem = ioremap(pdev->membase, 0x10000);
142  if (!mem) {
143  DBG("ath9K: PCI memory map error\n") ;
144  ret = -EIO;
145  goto err_iomap;
146  }
147 
148  dev = net80211_alloc(sizeof(struct ath_softc));
149  if (!dev) {
150  DBG("ath9k: No memory for net80211_device\n");
151  ret = -ENOMEM;
152  goto err_alloc_hw;
153  }
154 
155  pci_set_drvdata(pdev, dev);
156  dev->netdev->dev = (struct device *)pdev;
157 
158  sc = dev->priv;
159  sc->dev = dev;
160  sc->pdev = pdev;
161  sc->mem = mem;
162 
163  /* Will be cleared in ath9k_start() */
164  sc->sc_flags |= SC_OP_INVALID;
165 
166  sc->irq = pdev->irq;
167 
168  pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsysid);
169  ret = ath9k_init_device(pdev->device, sc, subsysid, &ath_pci_bus_ops);
170  if (ret) {
171  DBG("ath9k: Failed to initialize device\n");
172  goto err_init;
173  }
174 
175  ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
176  DBG("ath9k: %s mem=0x%lx, irq=%d\n",
177  hw_name, (unsigned long)mem, pdev->irq);
178 
179  return 0;
180 
181 err_init:
182  net80211_free(dev);
183 err_alloc_hw:
184  iounmap(mem);
185 err_iomap:
186  return ret;
187 }
188 
189 static void ath_pci_remove(struct pci_device *pdev)
190 {
191  struct net80211_device *dev = pci_get_drvdata(pdev);
192  struct ath_softc *sc = dev->priv;
193  void *mem = sc->mem;
194 
195  if (!is_ath9k_unloaded)
196  sc->sc_ah->ah_flags |= AH_UNPLUGGED;
198  net80211_free(sc->dev);
199 
200  iounmap(mem);
201 }
202 
203 struct pci_driver ath_pci_driver __pci_driver = {
205  .ids = ath_pci_id_table,
206  .probe = ath_pci_probe,
207  .remove = ath_pci_remove,
208 };
uint16_t u16
Definition: stdint.h:21
unsigned long membase
Memory base.
Definition: pci.h:194
uint8_t irq
Interrupt number.
Definition: pci.h:208
#define PCI_CACHE_LINE_SIZE
PCI cache line size.
Definition: pci.h:46
Definition: hw.h:656
void net80211_free(struct net80211_device *dev)
Free 802.11 device.
Definition: net80211.c:838
static struct pci_device_id ath_pci_id_table[]
Definition: ath9k.c:24
A PCI driver.
Definition: pci.h:224
struct pci_driver ath_pci_driver __pci_driver
Definition: ath9k.c:203
int irq
Definition: ath9k.h:456
#define PCI_LATENCY_TIMER
PCI latency timer.
Definition: pci.h:49
#define AH_UNPLUGGED
Definition: hw.h:654
unsigned int id_count
Number of entries in PCI ID table.
Definition: pci.h:228
#define MS(_v, _f)
Definition: hw.h:102
static void ath_pci_extn_synch_enable(struct ath_common *common)
Definition: ath9k.c:79
Definition: ath.h:125
int is_ath9k_unloaded
Definition: ath9k_init.c:29
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
Definition: ath9k.c:40
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
#define PCI_SUBSYSTEM_ID
PCI subsystem ID.
Definition: pci.h:77
struct net80211_device * dev
Definition: ath9k.h:445
#define AR_EEPROM_STATUS_DATA_VAL
Definition: reg.h:1087
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:338
#define ENOMEM
Not enough space.
Definition: errno.h:534
A hardware device.
Definition: device.h:73
#define AR_EEPROM_STATUS_DATA_PROT_ACCESS
Definition: reg.h:1091
#define AR_EEPROM_STATUS_DATA_BUSY
Definition: reg.h:1089
uint16_t device
Device ID.
Definition: pci.h:204
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
struct ath_hw * sc_ah
Definition: ath9k.h:454
static int ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
Definition: ath9k.c:58
#define DEFAULT_CACHELINE
Definition: ath9k.h:353
void * priv
Driver private data.
Definition: net80211.h:798
struct net80211_device * net80211_alloc(size_t priv_size)
Allocate 802.11 device.
Definition: net80211.c:754
static const struct ath_bus_ops ath_pci_bus_ops
Definition: ath9k.c:90
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
PCI bus.
A PCI device.
Definition: pci.h:187
Structure encapsulating the complete state of an 802.11 device.
Definition: net80211.h:786
#define ARRAY_SIZE(x)
Definition: efx_common.h:43
static void ath_pci_remove(struct pci_device *pdev)
Definition: ath9k.c:189
A PCI device ID list entry.
Definition: pci.h:151
struct ib_cm_common common
Definition: ib_mad.h:11
u32 sc_flags
Definition: ath9k.h:465
#define SC_OP_INVALID
Definition: ath9k.h:362
struct pci_device * pdev
Definition: ath9k.h:446
void __asmcall int val
Definition: setjmp.h:28
struct device * dev
Underlying hardware device.
Definition: netdevice.h:360
enum ath_bus_type ath_bus_type
Definition: hw.h:862
void ath9k_deinit_device(struct ath_softc *sc)
Definition: ath9k_init.c:577
u32 ah_flags
Definition: hw.h:687
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:348
struct net_device * netdev
The net_device that wraps us.
Definition: net80211.h:789
int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid, const struct ath_bus_ops *bus_ops)
Definition: ath9k_init.c:486
#define AR_EEPROM_STATUS_DATA
Definition: reg.h:1085
int ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
Definition: ath9k_hw.c:93
struct ath9k_hw_capabilities caps
Definition: hw.h:663
u16 pcie_lcr_offset
Definition: hw.h:211
#define EIO
Input/output error.
Definition: errno.h:433
#define AH_WAIT_TIMEOUT
Definition: hw.h:145
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
void iounmap(volatile const void *io_addr)
Unmap I/O address.
void * mem
Definition: ath9k.h:455
uint8_t ah
Definition: registers.h:85
#define AR5416_EEPROM_S
Definition: eeprom.h:60
struct arbelprm_port_state_change_st data
Message.
Definition: arbel.h:12
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
void * ioremap(unsigned long bus_addr, size_t len)
Map bus address as an I/O address.
static int ath_pci_probe(struct pci_device *pdev)
Definition: ath9k.c:97
void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len)
Definition: ath9k_hw.c:2045
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:283
uint8_t u8
Definition: stdint.h:19
uint32_t u32
Definition: stdint.h:23
#define AR5416_EEPROM_OFFSET
Definition: eeprom.h:61
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.
static unsigned int unsigned int mem
Definition: intel.h:271