iPXE
ath9k_eeprom.c File Reference
#include <ipxe/io.h>
#include "hw.h"

Go to the source code of this file.

Functions

 FILE_SECBOOT (FORBIDDEN)
static u16 ath9k_hw_fbin2freq (u8 fbin, int is2GHz)
void ath9k_hw_analog_shift_regwrite (struct ath_hw *ah, u32 reg, u32 val)
void ath9k_hw_analog_shift_rmw (struct ath_hw *ah, u32 reg, u32 mask, u32 shift, u32 val)
int16_t ath9k_hw_interpolate (u16 target, u16 srcLeft, u16 srcRight, int16_t targetLeft, int16_t targetRight)
int ath9k_hw_get_lower_upper_index (u8 target, u8 *pList, u16 listSize, u16 *indexL, u16 *indexR)
void ath9k_hw_usb_gen_fill_eeprom (struct ath_hw *ah, u16 *eep_data, int eep_start_loc, int size)
int ath9k_hw_nvram_read (struct ath_common *common, u32 off, u16 *data)
void ath9k_hw_fill_vpd_table (u8 pwrMin, u8 pwrMax, u8 *pPwrList, u8 *pVpdList, u16 numIntercepts, u8 *pRetVpdList)
void ath9k_hw_get_legacy_target_powers (struct ath_hw *ah, struct ath9k_channel *chan, struct cal_target_power_leg *powInfo, u16 numChannels, struct cal_target_power_leg *pNewPower, u16 numRates, int isExtTarget)
void ath9k_hw_get_target_powers (struct ath_hw *ah, struct ath9k_channel *chan, struct cal_target_power_ht *powInfo, u16 numChannels, struct cal_target_power_ht *pNewPower, u16 numRates, int isHt40Target)
u16 ath9k_hw_get_max_edge_power (u16 freq, struct cal_ctl_edges *pRdEdgesPower, int is2GHz, int num_band_edges)
void ath9k_hw_update_regulatory_maxpower (struct ath_hw *ah)
void ath9k_hw_get_gain_boundaries_pdadcs (struct ath_hw *ah, struct ath9k_channel *chan, void *pRawDataSet, u8 *bChans, u16 availPiers, u16 tPdGainOverlap, u16 *pPdGainBoundaries, u8 *pPDADCValues, u16 numXpdGains)
int ath9k_hw_eeprom_init (struct ath_hw *ah)

Function Documentation

◆ FILE_SECBOOT()

FILE_SECBOOT ( FORBIDDEN )

◆ ath9k_hw_fbin2freq()

u16 ath9k_hw_fbin2freq ( u8 fbin,
int is2GHz )
inlinestatic

Definition at line 26 of file ath9k_eeprom.c.

27{
28 if (fbin == AR5416_BCHAN_UNUSED)
29 return fbin;
30
31 return (u16) ((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));
32}
#define AR5416_BCHAN_UNUSED
Definition eeprom.h:158
#define u16
Definition vga.h:20

References AR5416_BCHAN_UNUSED, u16, and u8.

Referenced by ath9k_hw_get_legacy_target_powers(), ath9k_hw_get_max_edge_power(), and ath9k_hw_get_target_powers().

◆ ath9k_hw_analog_shift_regwrite()

void ath9k_hw_analog_shift_regwrite ( struct ath_hw * ah,
u32 reg,
u32 val )

Definition at line 34 of file ath9k_eeprom.c.

35{
37
38 if (ah->config.analog_shiftreg)
39 udelay(100);
40}
#define REG_WRITE(_ah, _reg, _val)
Definition hw.h:78
void __asmcall int val
Definition setjmp.h:12
static unsigned int unsigned int reg
Definition myson.h:162
uint8_t ah
Definition registers.h:1
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition timer.c:61

References ah, reg, REG_WRITE, u32, udelay(), and val.

Referenced by ath9k_hw_ar9287_set_board_values().

◆ ath9k_hw_analog_shift_rmw()

void ath9k_hw_analog_shift_rmw ( struct ath_hw * ah,
u32 reg,
u32 mask,
u32 shift,
u32 val )

Definition at line 42 of file ath9k_eeprom.c.

44{
45 u32 regVal;
46
47 regVal = REG_READ(ah, reg) & ~mask;
48 regVal |= (val << shift) & mask;
49
50 REG_WRITE(ah, reg, regVal);
51
52 if (ah->config.analog_shiftreg)
53 udelay(100);
54}
#define REG_READ(_ah, _reg)
Definition hw.h:81
#define u32
Definition vga.h:21

References ah, reg, REG_READ, REG_WRITE, u32, udelay(), and val.

Referenced by ar9002_olc_init(), ath9k_hw_4k_set_board_values(), ath9k_hw_ar9287_set_board_values(), and ath9k_hw_def_set_board_values().

◆ ath9k_hw_interpolate()

int16_t ath9k_hw_interpolate ( u16 target,
u16 srcLeft,
u16 srcRight,
int16_t targetLeft,
int16_t targetRight )

Definition at line 56 of file ath9k_eeprom.c.

58{
59 int16_t rv;
60
61 if (srcRight == srcLeft) {
62 rv = targetLeft;
63 } else {
64 rv = (int16_t) (((target - srcLeft) * targetRight +
65 (srcRight - target) * targetLeft) /
66 (srcRight - srcLeft));
67 }
68 return rv;
69}
signed short int16_t
Definition stdint.h:16

References u16.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs(), ath9k_hw_get_legacy_target_powers(), and ath9k_hw_get_target_powers().

◆ ath9k_hw_get_lower_upper_index()

int ath9k_hw_get_lower_upper_index ( u8 target,
u8 * pList,
u16 listSize,
u16 * indexL,
u16 * indexR )

Definition at line 71 of file ath9k_eeprom.c.

73{
74 u16 i;
75
76 if (target <= pList[0]) {
77 *indexL = *indexR = 0;
78 return 1;
79 }
80 if (target >= pList[listSize - 1]) {
81 *indexL = *indexR = (u16) (listSize - 1);
82 return 1;
83 }
84
85 for (i = 0; i < listSize - 1; i++) {
86 if (pList[i] == target) {
87 *indexL = *indexR = i;
88 return 1;
89 }
90 if (target < pList[i + 1]) {
91 *indexL = i;
92 *indexR = (u16) (i + 1);
93 return 0;
94 }
95 }
96 return 0;
97}

References u16, and u8.

Referenced by ar9287_eeprom_get_tx_gain_index(), ath9k_get_txgain_index(), ath9k_hw_fill_vpd_table(), and ath9k_hw_get_gain_boundaries_pdadcs().

◆ ath9k_hw_usb_gen_fill_eeprom()

void ath9k_hw_usb_gen_fill_eeprom ( struct ath_hw * ah,
u16 * eep_data,
int eep_start_loc,
int size )

Definition at line 99 of file ath9k_eeprom.c.

101{
102 int i = 0, j, addr;
103 u32 addrdata[8];
104 u32 data[8];
105
106 for (addr = 0; addr < size; addr++) {
107 addrdata[i] = AR5416_EEPROM_OFFSET +
108 ((addr + eep_start_loc) << AR5416_EEPROM_S);
109 i++;
110 if (i == 8) {
111 REG_READ_MULTI(ah, addrdata, data, i);
112
113 for (j = 0; j < i; j++) {
114 *eep_data = data[j];
115 eep_data++;
116 }
117 i = 0;
118 }
119 }
120
121 if (i != 0) {
122 REG_READ_MULTI(ah, addrdata, data, i);
123
124 for (j = 0; j < i; j++) {
125 *eep_data = data[j];
126 eep_data++;
127 }
128 }
129}
#define AR5416_EEPROM_OFFSET
Definition eeprom.h:62
#define AR5416_EEPROM_S
Definition eeprom.h:61
uint32_t addr
Buffer address.
Definition dwmac.h:9
uint8_t data[48]
Additional event data.
Definition ena.h:11
uint16_t size
Buffer size.
Definition dwmac.h:3
#define REG_READ_MULTI(_ah, _addr, _val, _cnt)
Definition hw.h:84

References addr, ah, AR5416_EEPROM_OFFSET, AR5416_EEPROM_S, data, REG_READ_MULTI, size, u16, and u32.

Referenced by __ath9k_hw_usb_4k_fill_eeprom(), __ath9k_hw_usb_ar9287_fill_eeprom(), and __ath9k_hw_usb_def_fill_eeprom().

◆ ath9k_hw_nvram_read()

int ath9k_hw_nvram_read ( struct ath_common * common,
u32 off,
u16 * data )

◆ ath9k_hw_fill_vpd_table()

void ath9k_hw_fill_vpd_table ( u8 pwrMin,
u8 pwrMax,
u8 * pPwrList,
u8 * pVpdList,
u16 numIntercepts,
u8 * pRetVpdList )

Definition at line 136 of file ath9k_eeprom.c.

139{
140 u16 i, k;
141 u8 currPwr = pwrMin;
142 u16 idxL = 0, idxR = 0;
143
144 for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) {
145 ath9k_hw_get_lower_upper_index(currPwr, pPwrList,
146 numIntercepts, &(idxL),
147 &(idxR));
148 if (idxR < 1)
149 idxR = 1;
150 if (idxL == numIntercepts - 1)
151 idxL = (u16) (numIntercepts - 2);
152 if (pPwrList[idxL] == pPwrList[idxR])
153 k = pVpdList[idxL];
154 else
155 k = (u16)(((currPwr - pPwrList[idxL]) * pVpdList[idxR] +
156 (pPwrList[idxR] - currPwr) * pVpdList[idxL]) /
157 (pPwrList[idxR] - pPwrList[idxL]));
158 pRetVpdList[i] = (u8) k;
159 currPwr += 2;
160 }
161}
int ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize, u16 *indexL, u16 *indexR)
#define u8
Definition igbvf_osdep.h:40
static const uint32_t k[64]
MD5 constants.
Definition md5.c:54

References ath9k_hw_get_lower_upper_index(), k, u16, and u8.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs().

◆ ath9k_hw_get_legacy_target_powers()

void ath9k_hw_get_legacy_target_powers ( struct ath_hw * ah,
struct ath9k_channel * chan,
struct cal_target_power_leg * powInfo,
u16 numChannels,
struct cal_target_power_leg * pNewPower,
u16 numRates,
int isExtTarget )

Definition at line 163 of file ath9k_eeprom.c.

169{
170 struct chan_centers centers;
171 u16 clo, chi;
172 int i;
173 int matchIndex = -1, lowIndex = -1;
174 u16 freq;
175
176 ath9k_hw_get_channel_centers(ah, chan, &centers);
177 freq = (isExtTarget) ? centers.ext_center : centers.ctl_center;
178
179 if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel,
180 IS_CHAN_2GHZ(chan))) {
181 matchIndex = 0;
182 } else {
183 for (i = 0; (i < numChannels) &&
184 (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
185 if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
186 IS_CHAN_2GHZ(chan))) {
187 matchIndex = i;
188 break;
189 } else if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
190 IS_CHAN_2GHZ(chan)) && i > 0 &&
191 freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
192 IS_CHAN_2GHZ(chan))) {
193 lowIndex = i - 1;
194 break;
195 }
196 }
197 if ((matchIndex == -1) && (lowIndex == -1))
198 matchIndex = i - 1;
199 }
200
201 if (matchIndex != -1) {
202 *pNewPower = powInfo[matchIndex];
203 } else {
204 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
205 IS_CHAN_2GHZ(chan));
206 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
207 IS_CHAN_2GHZ(chan));
208
209 for (i = 0; i < numRates; i++) {
210 pNewPower->tPow2x[i] =
211 (u8)ath9k_hw_interpolate(freq, clo, chi,
212 powInfo[lowIndex].tPow2x[i],
213 powInfo[lowIndex + 1].tPow2x[i]);
214 }
215 }
216}
u8 tPow2x[4]
static u16 ath9k_hw_fbin2freq(u8 fbin, int is2GHz)
int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight, int16_t targetLeft, int16_t targetRight)
void ath9k_hw_get_channel_centers(struct ath_hw *ah __unused, struct ath9k_channel *chan, struct chan_centers *centers)
Definition ath9k_hw.c:191
#define IS_CHAN_2GHZ(_c)
Definition hw.h:362
u16 ctl_center
Definition hw.h:424

References ah, AR5416_BCHAN_UNUSED, ath9k_hw_fbin2freq(), ath9k_hw_get_channel_centers(), ath9k_hw_interpolate(), cal_target_power_leg::bChannel, chan_centers::ctl_center, chan_centers::ext_center, IS_CHAN_2GHZ, cal_target_power_leg::tPow2x, tPow2x, u16, and u8.

Referenced by ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ ath9k_hw_get_target_powers()

void ath9k_hw_get_target_powers ( struct ath_hw * ah,
struct ath9k_channel * chan,
struct cal_target_power_ht * powInfo,
u16 numChannels,
struct cal_target_power_ht * pNewPower,
u16 numRates,
int isHt40Target )

Definition at line 218 of file ath9k_eeprom.c.

224{
225 struct chan_centers centers;
226 u16 clo, chi;
227 int i;
228 int matchIndex = -1, lowIndex = -1;
229 u16 freq;
230
231 ath9k_hw_get_channel_centers(ah, chan, &centers);
232 freq = isHt40Target ? centers.synth_center : centers.ctl_center;
233
234 if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {
235 matchIndex = 0;
236 } else {
237 for (i = 0; (i < numChannels) &&
238 (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
239 if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
240 IS_CHAN_2GHZ(chan))) {
241 matchIndex = i;
242 break;
243 } else
244 if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
245 IS_CHAN_2GHZ(chan)) && i > 0 &&
246 freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
247 IS_CHAN_2GHZ(chan))) {
248 lowIndex = i - 1;
249 break;
250 }
251 }
252 if ((matchIndex == -1) && (lowIndex == -1))
253 matchIndex = i - 1;
254 }
255
256 if (matchIndex != -1) {
257 *pNewPower = powInfo[matchIndex];
258 } else {
259 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
260 IS_CHAN_2GHZ(chan));
261 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
262 IS_CHAN_2GHZ(chan));
263
264 for (i = 0; i < numRates; i++) {
265 pNewPower->tPow2x[i] = (u8)ath9k_hw_interpolate(freq,
266 clo, chi,
267 powInfo[lowIndex].tPow2x[i],
268 powInfo[lowIndex + 1].tPow2x[i]);
269 }
270 }
271}

References ah, AR5416_BCHAN_UNUSED, ath9k_hw_fbin2freq(), ath9k_hw_get_channel_centers(), ath9k_hw_interpolate(), cal_target_power_ht::bChannel, chan_centers::ctl_center, IS_CHAN_2GHZ, chan_centers::synth_center, cal_target_power_ht::tPow2x, tPow2x, u16, and u8.

Referenced by ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ ath9k_hw_get_max_edge_power()

u16 ath9k_hw_get_max_edge_power ( u16 freq,
struct cal_ctl_edges * pRdEdgesPower,
int is2GHz,
int num_band_edges )

Definition at line 273 of file ath9k_eeprom.c.

275{
276 u16 twiceMaxEdgePower = MAX_RATE_POWER;
277 int i;
278
279 for (i = 0; (i < num_band_edges) &&
280 (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
281 if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
282 twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
283 break;
284 } else if ((i > 0) &&
285 (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
286 is2GHz))) {
287 if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
288 is2GHz) < freq &&
289 CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
290 twiceMaxEdgePower =
291 CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
292 }
293 break;
294 }
295 }
296
297 return twiceMaxEdgePower;
298}
#define CTL_EDGE_TPOWER(_ctl)
Definition eeprom.h:214
#define CTL_EDGE_FLAGS(_ctl)
Definition eeprom.h:215
#define MAX_RATE_POWER
Definition hw.h:145

References AR5416_BCHAN_UNUSED, ath9k_hw_fbin2freq(), cal_ctl_edges::bChannel, CTL_EDGE_FLAGS, CTL_EDGE_TPOWER, MAX_RATE_POWER, and u16.

Referenced by ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ ath9k_hw_update_regulatory_maxpower()

void ath9k_hw_update_regulatory_maxpower ( struct ath_hw * ah)

Definition at line 300 of file ath9k_eeprom.c.

301{
302 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
303
304 switch (ar5416_get_ntxchains(ah->txchainmask)) {
305 case 1:
306 break;
307 case 2:
309 break;
310 case 3:
312 break;
313 default:
314 DBG2("ath9k: "
315 "Invalid chainmask configuration\n");
316 break;
317 }
318}
#define ar5416_get_ntxchains(_txchainmask)
Definition eeprom.h:707
#define INCREASE_MAXPOW_BY_THREE_CHAIN
Definition eeprom.h:88
#define INCREASE_MAXPOW_BY_TWO_CHAIN
Definition eeprom.h:87
#define DBG2(...)
Definition compiler.h:515
static struct ath_regulatory * ath9k_hw_regulatory(struct ath_hw *ah)
Definition hw.h:875
u16 max_power_level
Definition ath.h:141

References ah, ar5416_get_ntxchains, ath9k_hw_regulatory(), DBG2, INCREASE_MAXPOW_BY_THREE_CHAIN, INCREASE_MAXPOW_BY_TWO_CHAIN, and ath_regulatory::max_power_level.

◆ ath9k_hw_get_gain_boundaries_pdadcs()

void ath9k_hw_get_gain_boundaries_pdadcs ( struct ath_hw * ah,
struct ath9k_channel * chan,
void * pRawDataSet,
u8 * bChans,
u16 availPiers,
u16 tPdGainOverlap,
u16 * pPdGainBoundaries,
u8 * pPDADCValues,
u16 numXpdGains )

Definition at line 320 of file ath9k_eeprom.c.

327{
328 int i, j, k;
329 int16_t ss;
330 u16 idxL = 0, idxR = 0, numPiers;
331 static u8 vpdTableL[AR5416_NUM_PD_GAINS]
333 static u8 vpdTableR[AR5416_NUM_PD_GAINS]
335 static u8 vpdTableI[AR5416_NUM_PD_GAINS]
337
338 u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
339 u8 minPwrT4[AR5416_NUM_PD_GAINS];
340 u8 maxPwrT4[AR5416_NUM_PD_GAINS];
341 int16_t vpdStep;
342 int16_t tmpVal;
343 u16 sizeCurrVpdTable, maxIndex, tgtIndex;
344 int match;
345 int16_t minDelta = 0;
346 struct chan_centers centers;
347 int pdgain_boundary_default;
348 struct cal_data_per_freq *data_def = pRawDataSet;
349 struct cal_data_per_freq_4k *data_4k = pRawDataSet;
350 struct cal_data_per_freq_ar9287 *data_9287 = pRawDataSet;
351 int eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah);
352 int intercepts;
353
354 if (AR_SREV_9287(ah))
355 intercepts = AR9287_PD_GAIN_ICEPTS;
356 else
357 intercepts = AR5416_PD_GAIN_ICEPTS;
358
359 memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS);
360 ath9k_hw_get_channel_centers(ah, chan, &centers);
361
362 for (numPiers = 0; numPiers < availPiers; numPiers++) {
363 if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
364 break;
365 }
366
367 match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center,
368 IS_CHAN_2GHZ(chan)),
369 bChans, numPiers, &idxL, &idxR);
370
371 if (match) {
372 if (AR_SREV_9287(ah)) {
373 for (i = 0; i < numXpdGains; i++) {
374 minPwrT4[i] = data_9287[idxL].pwrPdg[i][0];
375 maxPwrT4[i] = data_9287[idxL].pwrPdg[i][intercepts - 1];
376 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
377 data_9287[idxL].pwrPdg[i],
378 data_9287[idxL].vpdPdg[i],
379 intercepts,
380 vpdTableI[i]);
381 }
382 } else if (eeprom_4k) {
383 for (i = 0; i < numXpdGains; i++) {
384 minPwrT4[i] = data_4k[idxL].pwrPdg[i][0];
385 maxPwrT4[i] = data_4k[idxL].pwrPdg[i][intercepts - 1];
386 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
387 data_4k[idxL].pwrPdg[i],
388 data_4k[idxL].vpdPdg[i],
389 intercepts,
390 vpdTableI[i]);
391 }
392 } else {
393 for (i = 0; i < numXpdGains; i++) {
394 minPwrT4[i] = data_def[idxL].pwrPdg[i][0];
395 maxPwrT4[i] = data_def[idxL].pwrPdg[i][intercepts - 1];
396 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
397 data_def[idxL].pwrPdg[i],
398 data_def[idxL].vpdPdg[i],
399 intercepts,
400 vpdTableI[i]);
401 }
402 }
403 } else {
404 for (i = 0; i < numXpdGains; i++) {
405 if (AR_SREV_9287(ah)) {
406 pVpdL = data_9287[idxL].vpdPdg[i];
407 pPwrL = data_9287[idxL].pwrPdg[i];
408 pVpdR = data_9287[idxR].vpdPdg[i];
409 pPwrR = data_9287[idxR].pwrPdg[i];
410 } else if (eeprom_4k) {
411 pVpdL = data_4k[idxL].vpdPdg[i];
412 pPwrL = data_4k[idxL].pwrPdg[i];
413 pVpdR = data_4k[idxR].vpdPdg[i];
414 pPwrR = data_4k[idxR].pwrPdg[i];
415 } else {
416 pVpdL = data_def[idxL].vpdPdg[i];
417 pPwrL = data_def[idxL].pwrPdg[i];
418 pVpdR = data_def[idxR].vpdPdg[i];
419 pPwrR = data_def[idxR].pwrPdg[i];
420 }
421
422 minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
423
424 maxPwrT4[i] =
425 min(pPwrL[intercepts - 1],
426 pPwrR[intercepts - 1]);
427
428
429 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
430 pPwrL, pVpdL,
431 intercepts,
432 vpdTableL[i]);
433 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
434 pPwrR, pVpdR,
435 intercepts,
436 vpdTableR[i]);
437
438 for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
439 vpdTableI[i][j] =
441 FREQ2FBIN(centers.
442 synth_center,
444 (chan)),
445 bChans[idxL], bChans[idxR],
446 vpdTableL[i][j], vpdTableR[i][j]));
447 }
448 }
449 }
450
451 k = 0;
452
453 for (i = 0; i < numXpdGains; i++) {
454 if (i == (numXpdGains - 1))
455 pPdGainBoundaries[i] =
456 (u16)(maxPwrT4[i] / 2);
457 else
458 pPdGainBoundaries[i] =
459 (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4);
460
461 pPdGainBoundaries[i] =
462 min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
463
464 if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
465 minDelta = pPdGainBoundaries[0] - 23;
466 pPdGainBoundaries[0] = 23;
467 } else {
468 minDelta = 0;
469 }
470
471 if (i == 0) {
473 ss = (int16_t)(0 - (minPwrT4[i] / 2));
474 else
475 ss = 0;
476 } else {
477 ss = (int16_t)((pPdGainBoundaries[i - 1] -
478 (minPwrT4[i] / 2)) -
479 tPdGainOverlap + 1 + minDelta);
480 }
481 vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
482 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
483
484 while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
485 tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
486 pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
487 ss++;
488 }
489
490 sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
491 tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap -
492 (minPwrT4[i] / 2));
493 maxIndex = (tgtIndex < sizeCurrVpdTable) ?
494 tgtIndex : sizeCurrVpdTable;
495
496 while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
497 pPDADCValues[k++] = vpdTableI[i][ss++];
498 }
499
500 vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
501 vpdTableI[i][sizeCurrVpdTable - 2]);
502 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
503
504 if (tgtIndex >= maxIndex) {
505 while ((ss <= tgtIndex) &&
506 (k < (AR5416_NUM_PDADC_VALUES - 1))) {
507 tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] +
508 (ss - maxIndex + 1) * vpdStep));
509 pPDADCValues[k++] = (u8)((tmpVal > 255) ?
510 255 : tmpVal);
511 ss++;
512 }
513 }
514 }
515
516 if (eeprom_4k)
517 pdgain_boundary_default = 58;
518 else
519 pdgain_boundary_default = pPdGainBoundaries[i - 1];
520
521 while (i < AR5416_PD_GAINS_IN_MASK) {
522 pPdGainBoundaries[i] = pdgain_boundary_default;
523 i++;
524 }
525
526 while (k < AR5416_NUM_PDADC_VALUES) {
527 pPDADCValues[k] = pPDADCValues[k - 1];
528 k++;
529 }
530}
#define AR5416_PD_GAIN_ICEPTS
Definition eeprom.h:156
#define AR5416_NUM_PDADC_VALUES
Definition eeprom.h:157
#define FREQ2FBIN(x, y)
Definition eeprom.h:103
#define AR9287_PD_GAIN_ICEPTS
Definition eeprom.h:202
#define AR5416_NUM_PD_GAINS
Definition eeprom.h:154
#define AR5416_MAX_PWR_RANGE_IN_HALF_DB
Definition eeprom.h:159
#define AR5416_PD_GAINS_IN_MASK
Definition eeprom.h:155
#define AR_SREV_9287(_ah)
Definition reg.h:835
#define AR_SREV_9285(_ah)
Definition reg.h:830
#define AR_SREV_9280_20_OR_LATER(_ah)
Definition reg.h:825
#define AR_SREV_5416_20_OR_LATER(_ah)
Definition reg.h:802
#define AR_SREV_9271(_ah)
Definition reg.h:854
void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList, u8 *pVpdList, u16 numIntercepts, u8 *pRetVpdList)
#define min(x, y)
Definition ath.h:36
#define max(x, y)
Definition ath.h:41
void * memset(void *dest, int character, size_t len) __nonnull
uint32_t ss
Definition librm.h:1
u8 pwrPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]
Definition eeprom.h:516
u8 vpdPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]
Definition eeprom.h:517
u8 pwrPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS]
Definition eeprom.h:543
u8 vpdPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS]
Definition eeprom.h:544
u8 vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]
Definition eeprom.h:512
u8 pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]
Definition eeprom.h:511

References ah, AR5416_BCHAN_UNUSED, AR5416_MAX_PWR_RANGE_IN_HALF_DB, AR5416_NUM_PD_GAINS, AR5416_NUM_PDADC_VALUES, AR5416_PD_GAIN_ICEPTS, AR5416_PD_GAINS_IN_MASK, AR9287_PD_GAIN_ICEPTS, AR_SREV_5416_20_OR_LATER, AR_SREV_9271, AR_SREV_9280_20_OR_LATER, AR_SREV_9285, AR_SREV_9287, ath9k_hw_fill_vpd_table(), ath9k_hw_get_channel_centers(), ath9k_hw_get_lower_upper_index(), ath9k_hw_interpolate(), FREQ2FBIN, IS_CHAN_2GHZ, k, max, MAX_RATE_POWER, memset(), min, cal_data_per_freq::pwrPdg, cal_data_per_freq_4k::pwrPdg, cal_data_per_freq_ar9287::pwrPdg, ss, chan_centers::synth_center, u16, u8, cal_data_per_freq::vpdPdg, cal_data_per_freq_4k::vpdPdg, and cal_data_per_freq_ar9287::vpdPdg.

Referenced by ath9k_hw_set_4k_power_cal_table(), ath9k_hw_set_ar9287_power_cal_table(), and ath9k_hw_set_def_power_cal_table().

◆ ath9k_hw_eeprom_init()

int ath9k_hw_eeprom_init ( struct ath_hw * ah)

Definition at line 532 of file ath9k_eeprom.c.

533{
534 int status;
535
537 ah->eep_ops = &eep_ar9300_ops;
538 else if (AR_SREV_9287(ah)) {
539 ah->eep_ops = &eep_ar9287_ops;
540 } else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
541 ah->eep_ops = &eep_4k_ops;
542 } else {
543 ah->eep_ops = &eep_def_ops;
544 }
545
546 if (!ah->eep_ops->fill_eeprom(ah))
547 return -EIO;
548
549 status = ah->eep_ops->check_eeprom(ah);
550
551 return status;
552}
#define AR_SREV_9300_20_OR_LATER(_ah)
Definition reg.h:865
const struct eeprom_ops eep_ar9300_ops
const struct eeprom_ops eep_4k_ops
const struct eeprom_ops eep_ar9287_ops
const struct eeprom_ops eep_def_ops
uint8_t status
Status.
Definition ena.h:5
#define EIO
Input/output error.
Definition errno.h:434

References ah, AR_SREV_9271, AR_SREV_9285, AR_SREV_9287, AR_SREV_9300_20_OR_LATER, eep_4k_ops, eep_ar9287_ops, eep_ar9300_ops, eep_def_ops, EIO, and status.

Referenced by ath9k_hw_post_init().