iPXE
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#include <errno.h>
#include "mac.h"
#include "ani.h"
#include "eeprom.h"
#include "calib.h"
#include "reg.h"
#include "phy.h"
#include "../regd.h"
Go to the source code of this file.
Data Structures | |
struct | ath9k_hw_capabilities |
struct | ath9k_ops_config |
struct | ath9k_hw_cal_data |
struct | ath9k_channel |
struct | ath9k_beacon_state |
struct | chan_centers |
struct | ath9k_hw_version |
struct | ath_gen_timer_configuration |
struct | ath_gen_timer |
struct | ath_gen_timer_table |
struct | ath_hw_antcomb_conf |
struct | ath_hw_radar_conf |
struct ath_hw_radar_conf - radar detection initialization parameters More... | |
struct | ath_hw_private_ops |
struct ath_hw_private_ops - callbacks used internally by hardware code More... | |
struct | ath_hw_ops |
struct ath_hw_ops - callbacks used by hardware code and driver code More... | |
struct | ath_nf_limits |
struct | ath_hw |
struct | ath_bus_ops |
Variables | |
int | modparam_force_new_ani |
#define ERRFILE ERRFILE_ath9k |
#define REG_WRITE | ( | _ah, | |
_reg, | |||
_val | |||
) | (_ah)->reg_ops.write((_ah), (_val), (_reg)) |
#define REG_READ | ( | _ah, | |
_reg | |||
) | (_ah)->reg_ops.read((_ah), (_reg)) |
#define REG_READ_MULTI | ( | _ah, | |
_addr, | |||
_val, | |||
_cnt | |||
) | (_ah)->reg_ops.multi_read((_ah), (_addr), (_val), (_cnt)) |
#define REG_RMW | ( | _ah, | |
_reg, | |||
_set, | |||
_clr | |||
) | (_ah)->reg_ops.rmw((_ah), (_reg), (_set), (_clr)) |
#define ENABLE_REGWRITE_BUFFER | ( | _ah | ) |
#define REGWRITE_BUFFER_FLUSH | ( | _ah | ) |
#define REG_RMW_FIELD | ( | _a, | |
_r, | |||
_f, | |||
_v | |||
) | REG_RMW(_a, _r, (((_v) << _f##_S) & _f), (_f)) |
#define REG_READ_FIELD | ( | _a, | |
_r, | |||
_f | |||
) | (((REG_READ(_a, _r) & _f) >> _f##_S)) |
#define DO_DELAY | ( | x | ) |
#define REG_WRITE_ARRAY | ( | iniarray, | |
column, | |||
regWr | |||
) | ath9k_hw_write_array(ah, iniarray, column, &(regWr)) |
#define RTC_PLL_SETTLE_DELAY (AR_SREV_9340(ah) ? 1000 : 100) |
#define CHANNEL_A (CHANNEL_5GHZ|CHANNEL_OFDM) |
#define CHANNEL_B (CHANNEL_2GHZ|CHANNEL_CCK) |
#define CHANNEL_G (CHANNEL_2GHZ|CHANNEL_OFDM) |
#define CHANNEL_G_HT20 (CHANNEL_2GHZ|CHANNEL_HT20) |
#define CHANNEL_A_HT20 (CHANNEL_5GHZ|CHANNEL_HT20) |
#define CHANNEL_G_HT40PLUS (CHANNEL_2GHZ|CHANNEL_HT40PLUS) |
#define CHANNEL_G_HT40MINUS (CHANNEL_2GHZ|CHANNEL_HT40MINUS) |
#define CHANNEL_A_HT40PLUS (CHANNEL_5GHZ|CHANNEL_HT40PLUS) |
#define CHANNEL_A_HT40MINUS (CHANNEL_5GHZ|CHANNEL_HT40MINUS) |
#define CHANNEL_ALL |
#define IS_CHAN_G | ( | _c | ) |
#define IS_CHAN_OFDM | ( | _c | ) | (((_c)->channelFlags & CHANNEL_OFDM) != 0) |
#define IS_CHAN_5GHZ | ( | _c | ) | (((_c)->channelFlags & CHANNEL_5GHZ) != 0) |
#define IS_CHAN_2GHZ | ( | _c | ) | (((_c)->channelFlags & CHANNEL_2GHZ) != 0) |
#define IS_CHAN_HALF_RATE | ( | _c | ) | (((_c)->channelFlags & CHANNEL_HALF) != 0) |
#define IS_CHAN_QUARTER_RATE | ( | _c | ) | (((_c)->channelFlags & CHANNEL_QUARTER) != 0) |
#define IS_CHAN_A_FAST_CLOCK | ( | _ah, | |
_c | |||
) |
#define IS_CHAN_HT20 | ( | _c | ) |
#define IS_CHAN_HT40 | ( | _c | ) |
#define IS_CHAN_HT | ( | _c | ) | (IS_CHAN_HT20((_c)) || IS_CHAN_HT40((_c))) |
#define AH_UNPLUGGED 0x2 /* The card has been physically removed. */ |
enum ath_hw_txq_subtype |
enum ath_ini_subsys |
enum ath9k_hw_caps |
Definition at line 180 of file hw.h.
enum ath9k_int |
Definition at line 251 of file hw.h.
enum ath9k_power_mode |
enum ath9k_tp_scale |
enum ser_reg_mode |
enum ath9k_rx_qtype |
anonymous enum |
FILE_LICENCE | ( | BSD2 | ) |
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inlinestatic |
Definition at line 869 of file hw.h.
References ah.
Referenced by __ath9k_hw_4k_fill_eeprom(), __ath9k_hw_ar9287_fill_eeprom(), __ath9k_hw_def_fill_eeprom(), __ath9k_hw_init(), ar5008_hw_process_ini(), ar9300_eeprom_restore_flash(), ar9300_read_eeprom(), ath9k_bss_info_changed(), ath9k_bss_iter(), ath9k_config_bss(), ath9k_hw_4k_check_eeprom(), ath9k_hw_4k_fill_eeprom(), ath9k_hw_ani_read_counters(), ath9k_hw_ar9287_check_eeprom(), ath9k_hw_ar9287_fill_eeprom(), ath9k_hw_def_check_eeprom(), ath9k_hw_def_fill_eeprom(), ath9k_hw_deinit(), ath9k_hw_fill_cap_info(), ath9k_hw_init(), ath9k_hw_init_macaddr(), ath9k_hw_mac_to_clks(), ath9k_hw_post_init(), ath9k_hw_regulatory(), ath9k_hw_reset(), ath9k_hw_set_clockrate(), ath9k_hw_set_dma(), ath9k_hw_write_associd(), ath9k_init_crypto(), ath9k_init_misc(), ath9k_init_softc(), ath9k_ioread32(), ath9k_iowrite32(), ath9k_reg_rmw(), ath9k_start(), ath_ani_calibrate(), ath_buf_set_rate(), ath_isr(), ath_opmode_init(), ath_reset(), ath_rx_buf_link(), ath_rx_init(), ath_rx_tasklet(), ath_set_channel(), and ath_update_survey_stats().
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inlinestatic |
Definition at line 874 of file hw.h.
References ah, ath9k_hw_common(), and ath_common::regulatory.
Referenced by ar5008_hw_process_ini(), ar9003_hw_process_ini(), ar9003_hw_set_power_per_rate_table(), ath9k_cmn_update_txpow(), ath9k_hw_4k_set_txpower(), ath9k_hw_ar9287_set_txpower(), ath9k_hw_ar9300_set_txpower(), ath9k_hw_channel_change(), ath9k_hw_def_set_txpower(), ath9k_hw_fill_cap_info(), ath9k_hw_init_defaults(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), ath9k_hw_set_def_power_per_rate_table(), ath9k_hw_set_txpowerlimit(), ath9k_hw_update_regulatory_maxpower(), and ath9k_init_band_txpower().
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inlinestatic |
Definition at line 879 of file hw.h.
References ah.
Referenced by ar5008_hw_attach_phy_ops(), ar9002_hw_attach_calib_ops(), ar9002_hw_attach_ops(), ar9002_hw_attach_phy_ops(), ar9003_hw_attach_calib_ops(), ar9003_hw_attach_ops(), ar9003_hw_attach_phy_ops(), ath9k_hw_ani_cache_ini_regs(), ath9k_hw_ani_control(), ath9k_hw_compute_pll_control(), ath9k_hw_do_getnf(), ath9k_hw_init_bb(), ath9k_hw_init_cal(), ath9k_hw_init_cal_settings(), ath9k_hw_init_mode_gain_regs(), ath9k_hw_init_mode_regs(), ath9k_hw_mark_phy_inactive(), ath9k_hw_process_ini(), ath9k_hw_restore_chainmask(), ath9k_hw_rf_alloc_ext_banks(), ath9k_hw_rf_free_ext_banks(), ath9k_hw_rf_set_freq(), ath9k_hw_rfbus_done(), ath9k_hw_rfbus_req(), ath9k_hw_set_channel_regs(), ath9k_hw_set_delta_slope(), ath9k_hw_set_diversity(), ath9k_hw_set_rf_regs(), ath9k_hw_set_rfmode(), ath9k_hw_setup_calibration(), ath9k_hw_spur_mitigate_freq(), and ath9k_olc_init().
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inlinestatic |
Definition at line 884 of file hw.h.
References ah.
Referenced by ar9002_hw_attach_calib_ops(), ar9002_hw_attach_mac_ops(), ar9002_hw_attach_ops(), ar9002_hw_attach_phy_ops(), ar9003_hw_attach_calib_ops(), ar9003_hw_attach_mac_ops(), ar9003_hw_attach_ops(), ar9003_hw_attach_phy_ops(), ath9k_hw_antdiv_comb_conf_get(), ath9k_hw_antdiv_comb_conf_set(), ath9k_hw_calibrate(), ath9k_hw_clr11n_aggr(), ath9k_hw_configpcipowersave(), ath9k_hw_filltxdesc(), ath9k_hw_get_desc_link(), ath9k_hw_getisr(), ath9k_hw_rxena(), ath9k_hw_set11n_aggr_first(), ath9k_hw_set11n_aggr_last(), ath9k_hw_set11n_aggr_middle(), ath9k_hw_set11n_ratescenario(), ath9k_hw_set11n_txdesc(), ath9k_hw_set_clrdmask(), ath9k_hw_set_desc_link(), and ath9k_hw_txprocdesc().
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inlinestatic |
void ath9k_hw_deinit | ( | struct ath_hw * | ah | ) |
Definition at line 850 of file ath9k_hw.c.
References ah, ath9k_hw_common(), ath9k_hw_rf_free_ext_banks(), ath9k_hw_setpower(), ATH9K_PM_FULL_SLEEP, ATH_HW_INITIALIZED, and common.
Referenced by ath9k_deinit_softc(), and ath9k_init_softc().
int ath9k_hw_init | ( | struct ath_hw * | ah | ) |
Definition at line 569 of file ath9k_hw.c.
References __ath9k_hw_init(), ah, AR2427_DEVID_PCIE, AR5416_AR9100_DEVID, AR5416_DEVID_PCI, AR5416_DEVID_PCIE, AR9160_DEVID_PCI, AR9280_DEVID_PCI, AR9280_DEVID_PCIE, AR9285_DEVID_PCIE, AR9287_DEVID_PCI, AR9287_DEVID_PCIE, AR9300_DEVID_AR9340, AR9300_DEVID_AR9485_PCIE, AR9300_DEVID_PCIE, ath9k_hw_common(), ATH_USB, common, DBG, and EOPNOTSUPP.
Referenced by ath9k_init_softc().
int ath9k_hw_reset | ( | struct ath_hw * | ah, |
struct ath9k_channel * | chan, | ||
struct ath9k_hw_cal_data * | caldata, | ||
int | bChannelChange | ||
) |
Definition at line 1216 of file ath9k_hw.c.
References ah, ar9002_hw_enable_async_fifo(), ar9002_hw_enable_wep_aggregation(), ar9002_hw_load_ani_reg(), ar9002_hw_update_async_fifo(), ar9003_hw_disable_phy_restart(), AR9271_GATE_MAC_CTL, AR9271_RADIO_RF_RST, AR9271_RESET_POWER_DOWN_CONTROL, AR_AES_MUTE_MASK1, AR_AES_MUTE_MASK1_FC_MGMT, AR_CFG, AR_CFG_LED, AR_CFG_LED_ASSOC_CTL, AR_CFG_LED_BLINK_SLOW, AR_CFG_LED_BLINK_THRESH_SEL, AR_CFG_LED_MODE_SEL, AR_CFG_SCLK_32KHZ, AR_CFG_SWRB, AR_CFG_SWRD, AR_CFG_SWRG, AR_CFG_SWTB, AR_CFG_SWTD, AR_DEF_ANTENNA, AR_DEVID_7010, AR_DQCUMASK, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE, AR_ISR, AR_NUM_DCU, AR_OBS, AR_PCU_MISC_MODE2, AR_PCU_MISC_MODE2_MGMT_CRYPTO_ENABLE, AR_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT, AR_RIMT, AR_RIMT_FIRST, AR_RIMT_LAST, AR_RSSI_THR, AR_SREV_9100, AR_SREV_9160_10_OR_LATER, AR_SREV_9271, AR_SREV_9280, AR_SREV_9280_20_OR_LATER, AR_SREV_9300_20_OR_LATER, AR_SREV_9340, AR_STA_ID0, AR_STA_ID1, AR_STA_ID1_ACKCTS_6MB, AR_STA_ID1_BASE_RATE_11B, AR_STA_ID1_PRESERVE_SEQNUM, AR_STA_ID1_RTS_USE_DEF, AR_TIMT, AR_TIMT_FIRST, AR_TIMT_LAST, ath9k_hw_ani_cache_ini_regs(), ath9k_hw_apply_gpio_override(), ATH9K_HW_CAP_RFSILENT, ath9k_hw_cfg_gpio_input(), ath9k_hw_channel_change(), ath9k_hw_chip_reset(), ath9k_hw_common(), ath9k_hw_getnf(), ath9k_hw_init_bb(), ath9k_hw_init_cal(), ath9k_hw_init_global_settings(), ath9k_hw_init_interrupt_masks(), ath9k_hw_loadnf(), ath9k_hw_mark_phy_inactive(), ath9k_hw_process_ini(), ath9k_hw_resettxqueue(), ath9k_hw_restore_chainmask(), ath9k_hw_rf_set_freq(), ath9k_hw_set_clockrate(), ath9k_hw_set_delta_slope(), ath9k_hw_set_dma(), ath9k_hw_set_operating_mode(), ath9k_hw_setpower(), ath9k_hw_spur_mitigate_freq(), ath9k_hw_start_nfcal(), ath9k_hw_write_associd(), ath9k_init_nfcal_hist_buffer(), ATH9K_NUM_TX_QUEUES, ATH9K_PM_AWAKE, ath_hw_setbssidmask(), ATH_USB, ath9k_channel::chan, ath9k_hw_cal_data::channel, CHANNEL_ALL, CHANNEL_CW_INT, ath9k_hw_cal_data::channelFlags, common, DBG, DBG2, EINVAL, EIO, ENABLE_REGWRITE_BUFFER, get_unaligned_le16(), get_unaligned_le32(), INIT_CONFIG_STATUS, INIT_RSSI_THR, IS_CHAN_HT, IS_CHAN_OFDM, memset(), NULL, r, REG_CLR_BIT, REG_READ, REG_RMW, REG_RMW_FIELD, REG_SET_BIT, REG_WRITE, REGWRITE_BUFFER_FLUSH, and udelay().
Referenced by ath9k_start(), ath_radio_disable(), ath_reset(), and ath_set_channel().
int ath9k_hw_fill_cap_info | ( | struct ath_hw * | ah | ) |
Definition at line 1569 of file ath9k_hw.c.
References ah, AR5416_DEVID_PCI, AR5416_EEP_MINOR_VER_16, AR5416_OPFLAGS_11A, AR5416_OPFLAGS_11G, AR7010_NUM_GPIO, AR9271_NUM_GPIO, AR9285_NUM_GPIO, AR9285_RDEXT_DEFAULT, AR928X_NUM_GPIO, AR_DEVID_7010, AR_ENT_OTP, AR_NUM_GPIO, AR_PCU_ALWAYS_PERFORM_KEYSEARCH, AR_PCU_MIC_NEW_LOC_ENA, AR_SREV_9100, AR_SREV_9160_10_OR_LATER, AR_SREV_9271, AR_SREV_9280, AR_SREV_9280_20, AR_SREV_9280_20_OR_LATER, AR_SREV_9285, AR_SREV_9285_12_OR_LATER, AR_SREV_9287_11_OR_LATER, AR_SREV_9300_20_OR_LATER, AR_SREV_9485, AR_SREV_9485_10, AR_SUBVENDOR_ID_NEW_A, ATH9K_HW_CAP_2GHZ, ATH9K_HW_CAP_4KB_SPLITTRANS, ATH9K_HW_CAP_5GHZ, ATH9K_HW_CAP_ANT_DIV_COMB, ATH9K_HW_CAP_APM, ATH9K_HW_CAP_AUTOSLEEP, ATH9K_HW_CAP_CST, ATH9K_HW_CAP_FASTCLOCK, ATH9K_HW_CAP_HT, ATH9K_HW_CAP_LDPC, ATH9K_HW_CAP_PAPRD, ATH9K_HW_CAP_RAC_SUPPORTED, ATH9K_HW_CAP_RFSILENT, ATH9K_HW_CAP_SGI_20, ath9k_hw_common(), ath9k_hw_gpio_get(), ath9k_hw_regulatory(), ATH9K_HW_RX_HP_QDEPTH, ATH9K_HW_RX_LP_QDEPTH, ATH_AMPDU_LIMIT_MAX, ATH_CRYPT_CAP_CIPHER_AESCCM, BIT, common, ath_regulatory::current_rd, ath_regulatory::current_rd_ext, DBG, DBG2, EEP_ANT_DIV_CTL1, EEP_CHAIN_MASK_REDUCE, EEP_FSTCLK_5G, EEP_MINOR_REV, EEP_MODAL_VER, EEP_OP_MODE, EEP_PAPRD, EEP_REG_0, EEP_REG_1, EEP_RF_SILENT, EEP_RFSILENT_ENABLED, EEP_RFSILENT_GPIO_SEL, EEP_RFSILENT_POLARITY, EEP_RX_MASK, EEP_TX_MASK, EINVAL, ath9k_hw_capabilities::hw_caps, if(), ath9k_hw_capabilities::max_rxchains, ath9k_hw_capabilities::max_txchains, MS, ath9k_hw_capabilities::num_gpio_pins, ath9k_hw_capabilities::pcie_lcr_extsync_en, ath9k_hw_capabilities::pcie_lcr_offset, REG_READ, ath_common::regulatory, ath9k_hw_capabilities::rts_aggr_limit, ath9k_hw_capabilities::rx_chainmask, ath_common::rx_chainmask, ath9k_hw_capabilities::rx_hp_qdepth, ath9k_hw_capabilities::rx_lp_qdepth, ath9k_hw_capabilities::rx_status_len, ath9k_hw_capabilities::tx_chainmask, ath_common::tx_chainmask, ath9k_hw_capabilities::tx_desc_len, and ath9k_hw_capabilities::txs_len.
Referenced by __ath9k_hw_init().
u32 ath9k_regd_get_ctl | ( | struct ath_regulatory * | reg, |
struct ath9k_channel * | chan | ||
) |
Definition at line 867 of file ath9k_hw.c.
References ath_regd_get_band_ctl(), net80211_channel::band, ath9k_channel::chan, CTL_11A, CTL_11B, CTL_11G, IS_CHAN_B, IS_CHAN_G, and reg.
Referenced by ar5008_hw_process_ini(), ar9003_hw_process_ini(), ath9k_hw_channel_change(), and ath9k_hw_set_txpowerlimit().
Definition at line 1783 of file ath9k_hw.c.
References ah, AR7010_GPIO_OE, AR7010_GPIO_OE_AS_INPUT, AR7010_GPIO_OE_MASK, AR_DEVID_7010, AR_GPIO_OE_OUT, AR_GPIO_OE_OUT_DRV, AR_GPIO_OE_OUT_DRV_NO, gpio, and REG_RMW.
Referenced by ath9k_hw_reset(), and ath_radio_disable().
Definition at line 1802 of file ath9k_hw.c.
References ah, AR7010_GPIO_IN, AR7010_GPIO_IN_VAL, AR9300_GPIO_IN_VAL, AR_DEVID_7010, AR_GPIO_BIT, AR_GPIO_IN, AR_SREV_9271, AR_SREV_9280_20_OR_LATER, AR_SREV_9285_12_OR_LATER, AR_SREV_9287_11_OR_LATER, AR_SREV_9300_20_OR_LATER, gpio, MS, MS_REG_READ, REG_READ, and val.
Referenced by ath9k_hw_fill_cap_info().
Definition at line 1829 of file ath9k_hw.c.
References ah, AR7010_GPIO_OE, AR7010_GPIO_OE_AS_OUTPUT, AR7010_GPIO_OE_MASK, AR_DEVID_7010, AR_GPIO_OE_OUT, AR_GPIO_OE_OUT_DRV, AR_GPIO_OE_OUT_DRV_ALL, ath9k_hw_gpio_cfg_output_mux(), gpio, and REG_RMW.
Referenced by ath9k_hw_apply_gpio_override().
Definition at line 1850 of file ath9k_hw.c.
References ah, AR7010_GPIO_OUT, AR_DEVID_7010, AR_GPIO_BIT, AR_GPIO_IN_OUT, AR_SREV_9271, gpio, REG_RMW, and val.
Referenced by ath9k_hw_apply_gpio_override(), and ath_radio_disable().
Definition at line 1866 of file ath9k_hw.c.
References ah, AR_DEF_ANTENNA, and REG_READ.
Referenced by ath9k_init_misc().
Definition at line 1871 of file ath9k_hw.c.
References ah, AR_DEF_ANTENNA, and REG_WRITE.
Referenced by ath_setdefantenna().
Definition at line 93 of file ath9k_hw.c.
References ah, AH_TIME_QUANTUM, DBG, reg, REG_READ, timeout(), udelay(), and val.
Referenced by ar5008_hw_rfbus_req(), ar9002_hw_init_cal(), ar9003_hw_init_cal(), ar9003_hw_rfbus_req(), ar9003_hw_tx_iq_cal_run(), ar9285_hw_cl_cal(), ar9300_otp_read_word(), ath9k_hw_set_reset(), ath9k_hw_set_reset_power_on(), ath9k_hw_setrxabort(), and ath_pci_eeprom_read().
void ath9k_hw_write_array | ( | struct ath_hw * | ah, |
struct ar5416IniArray * | array, | ||
int | column, | ||
unsigned int * | writecnt | ||
) |
Definition at line 111 of file ath9k_hw.c.
References ah, array, DO_DELAY, ENABLE_REGWRITE_BUFFER, INI_RA, r, REG_WRITE, and REGWRITE_BUFFER_FLUSH.
Definition at line 125 of file ath9k_hw.c.
Referenced by ar5008_hw_force_bias(), ar5008_hw_phy_modify_rx_buffer(), ar5008_hw_set_channel(), and ar9002_hw_get_radiorev().
u16 ath9k_hw_computetxtime | ( | struct ath_hw * | ah, |
u8 | phy, | ||
int | kbps, | ||
u32 | frameLen, | ||
u16 | rateix, | ||
int | shortPreamble | ||
) |
Definition at line 137 of file ath9k_hw.c.
References ah, CCK_PLCP_BITS, CCK_PREAMBLE_BITS, CCK_SIFS_TIME, CHANNEL_CCK, CHANNEL_OFDM, DBG, DIV_ROUND_UP, IS_CHAN_HALF_RATE, IS_CHAN_QUARTER_RATE, OFDM_PLCP_BITS, OFDM_PREAMBLE_TIME, OFDM_PREAMBLE_TIME_HALF, OFDM_PREAMBLE_TIME_QUARTER, OFDM_SIFS_TIME, OFDM_SIFS_TIME_HALF, OFDM_SIFS_TIME_QUARTER, OFDM_SYMBOL_TIME, OFDM_SYMBOL_TIME_HALF, and OFDM_SYMBOL_TIME_QUARTER.
Referenced by ath_buf_set_rate().
void ath9k_hw_get_channel_centers | ( | struct ath_hw * | ah, |
struct ath9k_channel * | chan, | ||
struct chan_centers * | centers | ||
) |
Definition at line 1880 of file ath9k_hw.c.
References ah, AR_PHY_ERR, AR_PHY_ERR_CCK_TIMING, AR_PHY_ERR_OFDM_TIMING, AR_PHY_ERR_RADAR, AR_RX_FILTER, ATH9K_RX_FILTER_PHYERR, ATH9K_RX_FILTER_PHYRADAR, bits, and REG_READ.
Referenced by ath9k_ani_reset_old(), and ath_calcrxfilter().
Definition at line 1893 of file ath9k_hw.c.
References ah, AR_PHY_ERR, AR_PHY_ERR_CCK_TIMING, AR_PHY_ERR_OFDM_TIMING, AR_PHY_ERR_RADAR, AR_RX_FILTER, AR_RXCFG, AR_RXCFG_ZLFDMA, ATH9K_RX_FILTER_PHYERR, ATH9K_RX_FILTER_PHYRADAR, bits, ENABLE_REGWRITE_BUFFER, REG_CLR_BIT, REG_SET_BIT, REG_WRITE, and REGWRITE_BUFFER_FLUSH.
Referenced by ath9k_ani_reset_old(), ath_opmode_init(), and ath_stoprecv().
int ath9k_hw_phy_disable | ( | struct ath_hw * | ah | ) |
Definition at line 1916 of file ath9k_hw.c.
References ah, ath9k_hw_init_pll(), ath9k_hw_set_reset_reg(), ATH9K_RESET_WARM, and NULL.
Referenced by ath9k_stop(), and ath_radio_disable().
int ath9k_hw_disable | ( | struct ath_hw * | ah | ) |
Definition at line 1925 of file ath9k_hw.c.
References ah, ath9k_hw_init_pll(), ath9k_hw_set_reset_reg(), ath9k_hw_setpower(), ATH9K_PM_AWAKE, ATH9K_RESET_COLD, and NULL.
Referenced by ath9k_stop().
Definition at line 1937 of file ath9k_hw.c.
References ah, ath9k_hw_regulatory(), ath9k_regd_get_ctl(), ath9k_channel::chan, channel, limit, MAX_RATE_POWER, min, ath_regulatory::power_limit, and test.
Referenced by ath9k_cmn_update_txpow(), and ath9k_init_band_txpower().
void ath9k_hw_setopmode | ( | struct ath_hw * | ah | ) |
Definition at line 1953 of file ath9k_hw.c.
References ah, and ath9k_hw_set_operating_mode().
Referenced by ath_opmode_init().
Definition at line 1958 of file ath9k_hw.c.
References ah, AR_MCAST_FIL0, AR_MCAST_FIL1, and REG_WRITE.
Referenced by ath_opmode_init().
void ath9k_hw_setbssidmask | ( | struct ath_hw * | ah | ) |
void ath9k_hw_write_associd | ( | struct ath_hw * | ah | ) |
Definition at line 1964 of file ath9k_hw.c.
References ah, AR_BSS_ID0, AR_BSS_ID1, AR_BSS_ID1_AID_S, ath9k_hw_common(), common, get_unaligned_le16(), get_unaligned_le32(), and REG_WRITE.
Referenced by ath9k_bss_iter(), ath9k_config_bss(), and ath9k_hw_reset().
void ath9k_hw_init_global_settings | ( | struct ath_hw * | ah | ) |
Definition at line 812 of file ath9k_hw.c.
References ah, AR_PCU_MISC, ath9k_hw_set_ack_timeout(), ath9k_hw_set_cts_timeout(), ath9k_hw_set_global_txtimeout(), ath9k_hw_setslottime(), DBG2, NET80211_BAND_2GHZ, NET80211_BAND_5GHZ, and REG_SET_BIT.
Referenced by ath9k_bss_info_changed(), and ath9k_hw_reset().
Definition at line 609 of file ath9k_hw.c.
References ah, PLL3, PLL3_DO_MEAS_MASK, PLL4, PLL4_MEAS_DONE, REG_CLR_BIT, REG_READ, REG_SET_BIT, SQSUM_DVC_MASK, and udelay().
Referenced by ath_hw_pll_work().
void ath9k_hw_set11nmac2040 | ( | struct ath_hw * | ah | ) |
Definition at line 1973 of file ath9k_hw.c.
References ah, AR_2040_MODE, and REG_WRITE.
Referenced by ar5008_hw_set_channel_regs(), and ar9003_hw_set_channel_regs().
int ath9k_hw_check_alive | ( | struct ath_hw * | ah | ) |
Definition at line 1189 of file ath9k_hw.c.
References ah, AR_OBS_BUS_1, AR_SREV_9285_12_OR_LATER, count, reg, and REG_READ.
Referenced by ath_hw_check(), and ath_set_channel().
int ath9k_hw_setpower | ( | struct ath_hw * | ah, |
enum ath9k_power_mode | mode | ||
) |
Definition at line 1532 of file ath9k_hw.c.
References ah, ath9k_hw_set_power_awake(), ATH9K_PM_AWAKE, ATH9K_PM_FULL_SLEEP, ath9k_set_power_sleep(), DBG, DBG2, and status.
Referenced by __ath9k_hw_init(), ath9k_hw_chip_reset(), ath9k_hw_deinit(), ath9k_hw_disable(), ath9k_hw_reset(), and ath9k_setpower().
Definition at line 2045 of file ath9k_hw.c.
References ah, AR_RADIO_SREV_MAJOR, AR_SREV_9280_20_OR_LATER, ath9k_hw_mac_bb_name(), ath9k_hw_rf_name(), len, and snprintf().
Referenced by ath_pci_probe().
void ath9k_hw_htc_resetinit | ( | struct ath_hw * | ah | ) |
void ath9k_hw_get_delta_slope_vals | ( | struct ath_hw * | ah, |
u32 | coef_scaled, | ||
u32 * | coef_mantissa, | ||
u32 * | coef_exponent | ||
) |
void ar9002_hw_cck_chan14_spread | ( | struct ath_hw * | ah | ) |
Definition at line 188 of file ath9k_ar9002_hw.c.
References ah, ar9287Common_japan_2484_cck_fir_coeff_9287_1_1, ar9287Common_normal_cck_fir_coeff_9287_1_1, AR_SREV_9287_11_OR_LATER, ARRAY_SIZE, and INIT_INI_ARRAY.
Referenced by __ath9k_hw_init().
int ar9002_hw_rf_claim | ( | struct ath_hw * | ah | ) |
Definition at line 464 of file ath9k_ar9002_hw.c.
References ah, ar9002_hw_get_radiorev(), AR_PHY, AR_RAD2122_SREV_MAJOR, AR_RAD2133_SREV_MAJOR, AR_RAD5122_SREV_MAJOR, AR_RAD5133_SREV_MAJOR, AR_RADIO_SREV_MAJOR, DBG, EOPNOTSUPP, REG_WRITE, and val.
Referenced by ath9k_hw_post_init().
void ar9002_hw_enable_async_fifo | ( | struct ath_hw * | ah | ) |
Definition at line 492 of file ath9k_ar9002_hw.c.
References ah, AR_MAC_PCU_ASYNC_FIFO_REG3, AR_MAC_PCU_ASYNC_FIFO_REG3_DATAPATH_SEL, AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET, AR_PHY_MODE, AR_PHY_MODE_ASYNCFIFO, AR_SREV_9287_13_OR_LATER, REG_CLR_BIT, and REG_SET_BIT.
Referenced by ath9k_hw_reset().
void ar9002_hw_update_async_fifo | ( | struct ath_hw * | ah | ) |
Definition at line 512 of file ath9k_ar9002_hw.c.
References ah, AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL, AR_AHB_CUSTOM_BURST_EN, AR_AHB_MODE, AR_D_GBL_IFS_EIFS, AR_D_GBL_IFS_EIFS_ASYNC_FIFO_DUR, AR_D_GBL_IFS_SIFS, AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR, AR_D_GBL_IFS_SLOT, AR_D_GBL_IFS_SLOT_ASYNC_FIFO_DUR, AR_MAC_PCU_LOGIC_ANALYZER, AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768, AR_SREV_9287_13_OR_LATER, AR_TIME_OUT, AR_TIME_OUT_ACK_CTS_ASYNC_FIFO_DUR, AR_USEC, AR_USEC_ASYNC_FIFO_DUR, REG_RMW_FIELD, REG_SET_BIT, and REG_WRITE.
Referenced by ath9k_hw_reset().
void ar9002_hw_enable_wep_aggregation | ( | struct ath_hw * | ah | ) |
Definition at line 536 of file ath9k_ar9002_hw.c.
References ah, AR_PCU_MISC_MODE2, AR_PCU_MISC_MODE2_ENABLE_AGGWEP, AR_SREV_9287_13_OR_LATER, and REG_SET_BIT.
Referenced by ath9k_hw_reset().
void ar9003_hw_disable_phy_restart | ( | struct ath_hw * | ah | ) |
Definition at line 1270 of file ath9k_ar9003_phy.c.
References ah, AR_PHY_RESTART, AR_PHY_RESTART_ENA, REG_READ, REG_WRITE, and val.
Referenced by ath9k_hw_reset().
void ar5008_hw_attach_phy_ops | ( | struct ath_hw * | ah | ) |
Definition at line 1618 of file ath9k_ar5008_phy.c.
References ah, ath_hw_private_ops::ani_cache_ini_regs, ath_hw_private_ops::ani_control, ar5008_hw_ani_cache_ini_regs(), ar5008_hw_ani_control_new(), ar5008_hw_ani_control_old(), ar5008_hw_compute_pll_control(), ar5008_hw_do_getnf(), ar5008_hw_init_bb(), ar5008_hw_mark_phy_inactive(), ar5008_hw_process_ini(), ar5008_hw_rf_alloc_ext_banks(), ar5008_hw_rf_free_ext_banks(), ar5008_hw_rfbus_done(), ar5008_hw_rfbus_req(), ar5008_hw_set_channel(), ar5008_hw_set_channel_regs(), ar5008_hw_set_delta_slope(), ar5008_hw_set_nf_limits(), ar5008_hw_set_radar_conf(), ar5008_hw_set_radar_params(), ar5008_hw_set_rf_regs(), ar5008_hw_set_rfmode(), ar5008_hw_spur_mitigate(), ar5008_restore_chainmask(), ar5008_set_diversity(), ar9100_hw_compute_pll_control(), ar9160_hw_compute_pll_control(), AR_PHY_CCA, AR_PHY_CH1_CCA, AR_PHY_CH1_EXT_CCA, AR_PHY_CH2_CCA, AR_PHY_CH2_EXT_CCA, AR_PHY_EXT_CCA, AR_SREV_9100, AR_SREV_9160_10_OR_LATER, ath9k_hw_private_ops(), ath_hw_private_ops::compute_pll_control, ath_hw_private_ops::do_getnf, ath_hw_private_ops::init_bb, ath_hw_private_ops::mark_phy_inactive, memcpy(), modparam_force_new_ani, ath_hw_private_ops::process_ini, ath_hw_private_ops::restore_chainmask, ath_hw_private_ops::rf_alloc_ext_banks, ath_hw_private_ops::rf_free_ext_banks, ath_hw_private_ops::rf_set_freq, ath_hw_private_ops::rfbus_done, ath_hw_private_ops::rfbus_req, ath_hw_private_ops::set_channel_regs, ath_hw_private_ops::set_delta_slope, ath_hw_private_ops::set_diversity, ath_hw_private_ops::set_radar_params, ath_hw_private_ops::set_rf_regs, ath_hw_private_ops::set_rfmode, and ath_hw_private_ops::spur_mitigate_freq.
Referenced by ar9002_hw_attach_ops().
void ar9002_hw_attach_phy_ops | ( | struct ath_hw * | ah | ) |
Definition at line 561 of file ath9k_ar9002_phy.c.
References ah, ath_hw_ops::antdiv_comb_conf_get, ath_hw_ops::antdiv_comb_conf_set, ar9002_hw_antdiv_comb_conf_get(), ar9002_hw_antdiv_comb_conf_set(), ar9002_hw_compute_pll_control(), ar9002_hw_do_getnf(), ar9002_hw_set_channel(), ar9002_hw_set_nf_limits(), ar9002_hw_spur_mitigate(), ar9002_olc_init(), ath9k_hw_ops(), ath9k_hw_private_ops(), ath_hw_private_ops::compute_pll_control, ath_hw_private_ops::do_getnf, NULL, ath_hw_private_ops::olc_init, ath_hw_private_ops::rf_alloc_ext_banks, ath_hw_private_ops::rf_free_ext_banks, ath_hw_private_ops::rf_set_freq, ath_hw_private_ops::set_rf_regs, and ath_hw_private_ops::spur_mitigate_freq.
Referenced by ar9002_hw_attach_ops().
void ar9003_hw_attach_phy_ops | ( | struct ath_hw * | ah | ) |
Definition at line 1232 of file ath9k_ar9003_phy.c.
References ah, ath_hw_private_ops::ani_cache_ini_regs, ath_hw_private_ops::ani_control, ath_hw_ops::antdiv_comb_conf_get, ath_hw_ops::antdiv_comb_conf_set, ar9003_hw_ani_cache_ini_regs(), ar9003_hw_ani_control(), ar9003_hw_antdiv_comb_conf_get(), ar9003_hw_antdiv_comb_conf_set(), ar9003_hw_compute_pll_control(), ar9003_hw_do_getnf(), ar9003_hw_init_bb(), ar9003_hw_mark_phy_inactive(), ar9003_hw_process_ini(), ar9003_hw_rfbus_done(), ar9003_hw_rfbus_req(), ar9003_hw_set_channel(), ar9003_hw_set_channel_regs(), ar9003_hw_set_delta_slope(), ar9003_hw_set_diversity(), ar9003_hw_set_nf_limits(), ar9003_hw_set_radar_conf(), ar9003_hw_set_radar_params(), ar9003_hw_set_rfmode(), ar9003_hw_spur_mitigate(), AR_PHY_CCA_0, AR_PHY_CCA_1, AR_PHY_CCA_2, AR_PHY_EXT_CCA, AR_PHY_EXT_CCA_1, AR_PHY_EXT_CCA_2, ath9k_hw_ops(), ath9k_hw_private_ops(), ath_hw_private_ops::compute_pll_control, ath_hw_private_ops::do_getnf, ath_hw_private_ops::init_bb, ath_hw_private_ops::mark_phy_inactive, memcpy(), ath_hw_private_ops::process_ini, ath_hw_private_ops::rf_set_freq, ath_hw_private_ops::rfbus_done, ath_hw_private_ops::rfbus_req, ath_hw_private_ops::set_channel_regs, ath_hw_private_ops::set_delta_slope, ath_hw_private_ops::set_diversity, ath_hw_private_ops::set_radar_params, ath_hw_private_ops::set_rfmode, and ath_hw_private_ops::spur_mitigate_freq.
Referenced by ar9003_hw_attach_ops().
void ar9002_hw_attach_calib_ops | ( | struct ath_hw * | ah | ) |
Definition at line 987 of file ath9k_ar9002_calib.c.
References ah, ar9002_hw_calibrate(), ar9002_hw_init_cal(), ar9002_hw_init_cal_settings(), ar9002_hw_setup_calibration(), ath9k_hw_ops(), ath9k_hw_private_ops(), ath_hw_ops::calibrate, ath_hw_private_ops::init_cal, ath_hw_private_ops::init_cal_settings, and ath_hw_private_ops::setup_calibration.
Referenced by ar9002_hw_attach_ops().
void ar9003_hw_attach_calib_ops | ( | struct ath_hw * | ah | ) |
Definition at line 922 of file ath9k_ar9003_calib.c.
References ah, ar9003_hw_calibrate(), ar9003_hw_init_cal(), ar9003_hw_init_cal_settings(), ar9003_hw_setup_calibration(), ath9k_hw_ops(), ath9k_hw_private_ops(), ath_hw_ops::calibrate, ath_hw_private_ops::init_cal, ath_hw_private_ops::init_cal_settings, and ath_hw_private_ops::setup_calibration.
Referenced by ar9003_hw_attach_ops().
void ar9002_hw_attach_ops | ( | struct ath_hw * | ah | ) |
Definition at line 545 of file ath9k_ar9002_hw.c.
References ah, ar5008_hw_attach_phy_ops(), ar9002_hw_attach_calib_ops(), ar9002_hw_attach_mac_ops(), ar9002_hw_attach_phy_ops(), ar9002_hw_configpcipowersave(), ar9002_hw_init_mode_gain_regs(), ar9002_hw_init_mode_regs(), AR_SREV_9280_20_OR_LATER, ath9k_hw_ops(), ath9k_hw_private_ops(), ath_hw_ops::config_pci_powersave, ath_hw_private_ops::init_mode_gain_regs, and ath_hw_private_ops::init_mode_regs.
Referenced by ath9k_hw_attach_ops().
void ar9003_hw_attach_ops | ( | struct ath_hw * | ah | ) |
Definition at line 396 of file ath9k_ar9003_hw.c.
References ah, ar9003_hw_attach_calib_ops(), ar9003_hw_attach_mac_ops(), ar9003_hw_attach_phy_ops(), ar9003_hw_configpcipowersave(), ar9003_hw_init_mode_gain_regs(), ar9003_hw_init_mode_regs(), ath9k_hw_ops(), ath9k_hw_private_ops(), ath_hw_ops::config_pci_powersave, ath_hw_private_ops::init_mode_gain_regs, and ath_hw_private_ops::init_mode_regs.
Referenced by ath9k_hw_attach_ops().
void ar9002_hw_load_ani_reg | ( | struct ath_hw * | ah, |
struct ath9k_channel * | chan | ||
) |
Definition at line 563 of file ath9k_ar9002_hw.c.
References ah, AR_PHY_CCK_DETECT, AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK, ath9k_channel::chanmode, CHANNEL_A, CHANNEL_A_HT20, CHANNEL_A_HT40MINUS, CHANNEL_A_HT40PLUS, CHANNEL_B, CHANNEL_G, CHANNEL_G_HT20, CHANNEL_G_HT40MINUS, CHANNEL_G_HT40PLUS, ENABLE_REGWRITE_BUFFER, INI_RA, reg, REG_READ, REG_WRITE, REGWRITE_BUFFER_FLUSH, and val.
Referenced by ath9k_hw_reset().
void ath9k_ani_reset | ( | struct ath_hw * | ah, |
int | is_scanning | ||
) |
Definition at line 466 of file ath9k_ani.c.
References ah, AR_PHY_ERR_CCK_TIMING, AR_PHY_ERR_MASK_1, AR_PHY_ERR_MASK_2, AR_PHY_ERR_OFDM_TIMING, ATH9K_ANI_CCK_DEF_LEVEL, ATH9K_ANI_MODE, ATH9K_ANI_OFDM_DEF_LEVEL, ath9k_ani_reset_old(), ath9k_ani_restart(), ath9k_hw_set_cck_nil(), ath9k_hw_set_ofdm_nil(), ar5416AniState::cckNoiseImmunityLevel, ath9k_channel::chan, DBG, DBG2, DO_ANI, ENABLE_REGWRITE_BUFFER, ar5416AniState::ofdmNoiseImmunityLevel, REG_WRITE, REGWRITE_BUFFER_FLUSH, and use_new_ani().
Referenced by ath9k_hw_startpcureceive().
void ath9k_hw_proc_mib_event | ( | struct ath_hw * | ah | ) |
void ath9k_hw_ani_monitor | ( | struct ath_hw * | ah, |
struct ath9k_channel * | chan | ||
) |
int modparam_force_new_ani |
Definition at line 28 of file ath9k_ar9002_hw.c.
Referenced by ar5008_hw_attach_phy_ops(), and use_new_ani().